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@ -107,6 +107,24 @@ R convertUIntTo12Bit(uint16_t counts)
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return res;
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return res;
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}
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}
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std::string formatByteArr(const std::ranges::range auto& bytes, std::string_view delim = ", ")
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requires std::integral<std::ranges::range_value_t<decltype(bytes)>>
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{
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std::string res;
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auto sz = std::ranges::size(bytes);
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if (!sz) {
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return res;
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}
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for (auto const& el : bytes | std::views::take(sz - 1)) {
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res += std::format("0x{:02X}{}", el, delim);
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}
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res += std::format("0x{:02X}", *(bytes.end() - 1));
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return res;
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}
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} // namespace details
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} // namespace details
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@ -392,22 +410,21 @@ size_t RaptorEagleCCD::clRead(byte_seq_t& bytes)
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xclibApiCall(nbytes = pxd_serialRead(_cameraUnitmap, 0, nullptr, 0),
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xclibApiCall(nbytes = pxd_serialRead(_cameraUnitmap, 0, nullptr, 0),
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std::format("pxd_serialRead({}, 0, NULL, 0)", _cameraUnitmap));
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std::format("pxd_serialRead({}, 0, NULL, 0)", _cameraUnitmap));
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if (!nbytes) {
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logWarn("There are no bytes in Rx-buffer! Waiting for {} as timeout ...", CL_DEFAULT_TIMEOUT);
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logWarn("There are no bytes in Rx-buffer! Waiting for {} as timeout ...", CL_DEFAULT_TIMEOUT);
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// if (!nbytes) {
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// logWarn("There are no bytes in Rx-buffer! Nothing to do!");
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// return 0;
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// }
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while ((std::chrono::steady_clock::now() - start_tp) <= CL_DEFAULT_TIMEOUT) {
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while ((std::chrono::steady_clock::now() - start_tp) <= CL_DEFAULT_TIMEOUT) {
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std::this_thread::sleep_for(std::chrono::milliseconds(5));
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std::this_thread::sleep_for(std::chrono::milliseconds(5));
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nbytes = pxd_serialRead(_cameraUnitmap, 0, nullptr, 0);
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nbytes = pxd_serialRead(_cameraUnitmap, 0, nullptr, 0);
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if (nbytes) {
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break;
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}
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}
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}
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if (!nbytes) {
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if (!nbytes) {
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logWarn("Cameralink reading operation timeout!");
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logWarn("Cameralink reading operation timeout!");
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return 0;
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return 0;
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}
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}
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}
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nbytes += _clCommandAckBit + _clChecksumBit;
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nbytes += _clCommandAckBit + _clChecksumBit;
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@ -416,15 +433,16 @@ size_t RaptorEagleCCD::clRead(byte_seq_t& bytes)
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}
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}
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xclibApiCall(pxd_serialRead(_cameraUnitmap, 0, (char*)bytes.data(), nbytes),
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xclibApiCall(pxd_serialRead(_cameraUnitmap, 0, (char*)bytes.data(), nbytes),
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std::format("pxd_serialRead({}, 0, {}, {})", _cameraUnitmap, (void*)bytes.data(), nbytes));
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std::format("pxd_serialRead({}, 0, {}, {}) -> [{}]", _cameraUnitmap, (void*)bytes.data(), nbytes,
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details::formatByteArr(bytes)));
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if (_loggerSPtr->level() == spdlog::level::trace) {
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// if (_loggerSPtr->level() == spdlog::level::trace) {
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std::string s;
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// std::string s;
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adc::utils::AdcCharRangeFromValueRange(s, bytes, std::string_view(", "));
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// adc::utils::AdcCharRangeFromValueRange(s, bytes, std::string_view(", "));
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logTrace("Received from controller: [{}]", s);
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// logTrace("Received from controller: [{}]", s);
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}
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// }
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return nbytes;
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return nbytes;
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}
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}
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@ -503,9 +521,14 @@ size_t RaptorEagleCCD::clWrite(const byte_seq_t& bytes)
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logDebug("Write trailing ETX byte");
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logDebug("Write trailing ETX byte");
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}
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}
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xclibApiCall(
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xclibApiCall(pxd_serialWrite(_cameraUnitmap, 0, (char*)etx_checksum_bytes, tr_nbytes),
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pxd_serialWrite(_cameraUnitmap, 0, (char*)etx_checksum_bytes, tr_nbytes),
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std::format("pxd_serialWrite({}, 0, {}, {})", _cameraUnitmap,
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std::format("pxd_serialWrite({}, 0, {}, {})", _cameraUnitmap, (void*)etx_checksum_bytes, tr_nbytes));
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details::formatByteArr(std::string_view((const char*)etx_checksum_bytes, 2) |
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std::views::take(tr_nbytes)),
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tr_nbytes));
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// xclibApiCall(
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// pxd_serialWrite(_cameraUnitmap, 0, (char*)etx_checksum_bytes, tr_nbytes),
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// std::format("pxd_serialWrite({}, 0, {}, {})", _cameraUnitmap, (void*)etx_checksum_bytes, tr_nbytes));
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}
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}
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} else {
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} else {
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logWarn("No available space in the internal Tx-buffer! Nothing to do!");
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logWarn("No available space in the internal Tx-buffer! Nothing to do!");
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@ -644,9 +667,11 @@ bool RaptorEagleCCD::resetFPGA(const std::chrono::milliseconds& timeout)
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std::chrono::milliseconds sleep_dur =
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std::chrono::milliseconds sleep_dur =
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cnt > 10 ? std::chrono::milliseconds(cnt / 10) : std::chrono::milliseconds(10);
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cnt > 10 ? std::chrono::milliseconds(cnt / 10) : std::chrono::milliseconds(10);
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clearSystemStateBit(CL_SYSTEM_STATUS_FPGA_RST_HOLD_BIT); // set bit to 0 to hold FPGA in reset state
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// clearSystemStateBit(CL_SYSTEM_STATUS_FPGA_RST_HOLD_BIT); // set bit to 0 to hold FPGA in reset state
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std::this_thread::sleep_for(std::chrono::milliseconds(100));
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setSystemState(0x52);
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setSystemStateBit(CL_SYSTEM_STATUS_FPGA_RST_HOLD_BIT); // set bit to 1 to boot FPGA
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std::this_thread::sleep_for(std::chrono::milliseconds(200));
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setSystemState(0x50);
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// setSystemStateBit(CL_SYSTEM_STATUS_FPGA_RST_HOLD_BIT); // set bit to 1 to boot FPGA
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// according to instruction manual rev 1.1 FPGA will take approximately 500msecs to reset
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// according to instruction manual rev 1.1 FPGA will take approximately 500msecs to reset
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std::this_thread::sleep_for(std::chrono::milliseconds(500));
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std::this_thread::sleep_for(std::chrono::milliseconds(500));
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