mirror of
https://github.com/eddyem/stm32samples.git
synced 2025-12-06 02:35:23 +03:00
Add DMA to I2C reading/writing
This commit is contained in:
Edward Emelianov
parent
dd8d567464
commit
c76d7aacb0
@ -1,2 +1,16 @@
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I2C @
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I2C @ PB6/PB7
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Scan available addresses, read/write data directly or over DMA
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Proto:
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i0..2 - setup I2C with lowest..highest speed (7.7, 10 and 100kHz)
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Ia addr - set I2C address
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Ig - dump content of I2Cbuf
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Iw bytes - send bytes (hex/dec/oct/bin) to I2C
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IW bytes - the same over DMA
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Ir reg n - read n bytes from I2C reg
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I2 reg16 n - read n bytes from 16-bit register
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In n - just read n bytes
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IN n - the same but with DMA
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Is - scan I2C bus
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U - send long buffer over USART
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@ -17,19 +17,35 @@
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*/
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#include <stm32g0.h>
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#include "strfunc.h" // mymemcpy
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#include "usart.h"
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#include "i2c.h"
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/*
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* GPIO Resources: I2C1_SCL - PB6 (AF6), I2C1_SDA - PB7 (AF6)
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*/
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I2C_SPEED curI2Cspeed = LOW_SPEED;
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extern volatile uint32_t Tms;
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static uint32_t cntr;
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static uint8_t i2c_got_DMA_Rx = 0;
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volatile uint8_t I2C_scan_mode = 0; // == 1 when I2C is in scan mode
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static uint8_t i2caddr = I2C_ADDREND; // current address in scan mode
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static volatile int I2Cbusy = 0, goterr = 0; // busy==1 when DMA active, goterr==1 if 't was error @ last sent
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static uint8_t I2Cbuf[256], i2cbuflen = 0; // buffer for DMA tx/rx and its len
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// macros for I2C rx/tx
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#define DMARXCCR (DMA_CCR_MINC | DMA_CCR_TCIE | DMA_CCR_TEIE)
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#define DMATXCCR (DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE | DMA_CCR_TEIE)
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// macro for I2CCR1
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#define I2CCR1 (I2C_CR1_PE | I2C_CR1_RXDMAEN | I2C_CR1_TXDMAEN)
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// return 1 if I2Cbusy is set & timeout reached
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static inline int isI2Cbusy(){
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cntr = Tms;
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do{
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if(Tms - cntr > I2C_TIMEOUT){ USND("Timeout, DMA transfer in progress?\n"); return 1;}
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}while(I2Cbusy);
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return 0;
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}
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// GPIO Resources: I2C1_SCL - PB6 (AF6), I2C1_SDA - PB7 (AF6)
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void i2c_setup(I2C_SPEED speed){
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if(speed >= CURRENT_SPEED){
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speed = curI2Cspeed;
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@ -38,6 +54,7 @@ void i2c_setup(I2C_SPEED speed){
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}
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RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
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I2C1->CR1 = 0;
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I2C1->ICR = 0x3f38; // clear all errors
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GPIOB->AFR[0] = (GPIOB->AFR[0] & ~(GPIO_AFRL_AFSEL6 | GPIO_AFRL_AFSEL7)) |
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6 << (6 * 4) | 6 << (7 * 4);
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GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODE6 | GPIO_MODER_MODE7)) |
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@ -53,74 +70,29 @@ void i2c_setup(I2C_SPEED speed){
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}else{ // VERYLOW_SPEED - the lowest speed by STM register: ~7.7kHz
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I2C1->TIMINGR = (0xF<<28) | (4<<20) | (2<<16) | (0xff<<8) | (0xff);
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}
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I2C1->CR1 = I2C_CR1_PE;
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I2C1->CR1 = I2CCR1;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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NVIC_EnableIRQ(DMA1_Channel1_IRQn);
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I2Cbusy = 0;
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}
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/**
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* write command byte to I2C
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* @param addr - device address (TSYS01_ADDR0 or TSYS01_ADDR1)
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* @param data - bytes to write
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* @param nbytes - amount of bytes to write
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* @param stop - to set STOP
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* @return 0 if error
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*/
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static uint8_t write_i2cs(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t stop){
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cntr = Tms;
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I2C1->CR1 = 0; // clear busy flag
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I2C1->ICR = 0x3f38; // clear all errors
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I2C1->CR1 = I2C_CR1_PE;
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Line busy\n");
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return 0; // check busy
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}}
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cntr = Tms;
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while(I2C1->CR2 & I2C_CR2_START){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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return 0; // check start
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}}
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//I2C1->ICR = 0x3f38; // clear all errors
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I2C1->CR2 = nbytes << 16 | addr;
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if(stop) I2C1->CR2 |= I2C_CR2_AUTOEND; // autoend
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// now start transfer
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I2C1->CR2 |= I2C_CR2_START;
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for(int i = 0; i < nbytes; ++i){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_TXIS)){ // ready to transmit
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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//USND("NAK\n");
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return 0;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Timeout\n");
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return 0;
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}
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}
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I2C1->TXDR = data[i]; // send data
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// setup DMA for rx (tx==0) or tx (tx==1)
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// DMAMUX: 10 - Rx, 11 - Tx
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static void i2cDMAsetup(int tx, uint8_t len){
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if(tx){
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DMA1_Channel1->CCR = DMATXCCR;
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DMA1_Channel1->CPAR = (uint32_t) &I2C1->TXDR;
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DMAMUX1_Channel0->CCR = 11;
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}else{
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DMA1_Channel1->CCR = DMARXCCR;
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DMA1_Channel1->CPAR = (uint32_t) &I2C1->RXDR;
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DMAMUX1_Channel0->CCR = 10;
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}
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// wait for data gone
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){break;}
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}
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return 1;
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DMA1_Channel1->CMAR = (uint32_t) I2Cbuf;
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DMA1_Channel1->CNDTR = i2cbuflen = len;
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}
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uint8_t write_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes){
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return write_i2cs(addr, data, nbytes, 1);
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}
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/**
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* read nbytes of data from I2C line
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* all functions with `addr` should have addr = address << 1
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* `data` should be an array with at least `nbytes` length
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* @return 1 if all OK, 0 if NACK or no device found
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*/
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static uint8_t read_i2cb(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t busychk){
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static uint8_t i2c_start(uint8_t busychk){
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if(busychk){
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cntr = Tms;
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while(I2C1->ISR & I2C_ISR_BUSY){
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@ -137,9 +109,88 @@ static uint8_t read_i2cb(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t bu
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USND("No start\n");
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return 0; // check start
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}}
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return 1;
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}
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// start writing
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static uint8_t i2c_startw(uint8_t addr, uint8_t nbytes, uint8_t stop){
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if(!i2c_start(1)) return 0;
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I2C1->CR2 = nbytes << 16 | addr;
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if(stop) I2C1->CR2 |= I2C_CR2_AUTOEND; // autoend
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// now start transfer
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I2C1->CR2 |= I2C_CR2_START;
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return 1;
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}
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/**
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* write command byte to I2C
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* @param addr - device address (TSYS01_ADDR0 or TSYS01_ADDR1)
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* @param data - bytes to write
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* @param nbytes - amount of bytes to write
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* @param stop - to set STOP
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* @return 0 if error
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*/
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static uint8_t write_i2cs(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t stop){
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if(!i2c_startw(addr, nbytes, stop)) return 0;
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for(int i = 0; i < nbytes; ++i){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_TXIS)){ // ready to transmit
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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//USND("NAK\n");
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return 0;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Timeout\n");
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return 0;
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}
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}
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I2C1->TXDR = data[i]; // send data
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}
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cntr = Tms;
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// wait for data gone
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){break;}
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}
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return 1;
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}
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uint8_t write_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes){
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if(isI2Cbusy()) return 0;
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return write_i2cs(addr, data, nbytes, 1);
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}
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uint8_t write_i2c_dma(uint8_t addr, uint8_t *data, uint8_t nbytes){
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if(!data || nbytes < 1) return 0;
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mymemcpy((char*)I2Cbuf, (char*)data, nbytes);
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if(isI2Cbusy()) return 0;
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i2cDMAsetup(1, nbytes);
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goterr = 0;
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if(!i2c_startw(addr, nbytes, 1)) return 0;
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I2Cbusy = 1;
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DMA1_Channel1->CCR = DMATXCCR | DMA_CCR_EN; // start transfer
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return 1;
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}
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// start reading
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static uint8_t i2c_startr(uint8_t addr, uint8_t nbytes, uint8_t busychk){
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if(!i2c_start(busychk)) return 0;
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// read N bytes
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I2C1->CR2 = (nbytes<<16) | addr | 1 | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN;
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I2C1->CR2 |= I2C_CR2_START;
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return 1;
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}
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/**
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* read nbytes of data from I2C line
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* all functions with `addr` should have addr = address << 1
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* `data` should be an array with at least `nbytes` length
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* @return 1 if all OK, 0 if NACK or no device found
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*/
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static uint8_t read_i2cb(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t busychk){
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if(!i2c_startr(addr, nbytes, busychk)) return 0;
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uint8_t i;
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for(i = 0; i < nbytes; ++i){
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cntr = Tms;
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@ -161,23 +212,38 @@ static uint8_t read_i2cb(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t bu
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}
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uint8_t read_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes){
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if(isI2Cbusy()) return 0;
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return read_i2cb(addr, data, nbytes, 1);
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}
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uint8_t read_i2c_dma(uint8_t addr, uint8_t nbytes){
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if(nbytes < 1) return 0;
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if(isI2Cbusy()) return 0;
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i2cDMAsetup(0, nbytes);
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goterr = 0;
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if(!i2c_startr(addr, nbytes, 1)) return 0;
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I2Cbusy = 1;
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DMA1_Channel1->CCR = DMARXCCR | DMA_CCR_EN; // start transfer
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return 1;
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}
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// read register reg
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uint8_t read_i2c_reg(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t nbytes){
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if(isI2Cbusy()) return 0;
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if(!write_i2cs(addr, ®, 1, 0)) return 0;
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return read_i2cb(addr, data, nbytes, 0);
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}
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// read 16bit register reg
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uint8_t read_i2c_reg16(uint8_t addr, uint16_t reg16, uint8_t *data, uint8_t nbytes){
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if(isI2Cbusy()) return 0;
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if(!write_i2cs(addr, (uint8_t*)®16, 2, 0)) return 0;
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return read_i2cb(addr, data, nbytes, 0);
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}
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void i2c_init_scan_mode(){
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i2caddr = 0;
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i2caddr = 1; // start from 1 as 0 is a broadcast address
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I2C_scan_mode = 1;
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}
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@ -185,12 +251,50 @@ void i2c_init_scan_mode(){
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// if addresses are over, return 1 and set addr to I2C_NOADDR
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// if scan mode inactive, return 0 and set addr to I2C_NOADDR
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int i2c_scan_next_addr(uint8_t *addr){
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if(isI2Cbusy()) return 0;
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*addr = i2caddr;
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if(i2caddr == I2C_ADDREND){
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*addr = I2C_ADDREND;
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I2C_scan_mode = 0;
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return 0;
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}
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/*while(!u3txrdy);
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USND("Addr: "); USND(uhex2str(i2caddr)); USND("\n");
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usart3_sendbuf();*/
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if(!read_i2c_reg((i2caddr++)<<1, 0, NULL, 0)) return 0;
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return 1;
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}
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// dump I2Cbuf
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void i2c_bufdudump(){
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if(goterr){
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USND("Last transfer ends with error!\n");
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goterr = 0;
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}
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USND("I2C buffer:\n");
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hexdump(usart3_sendstr, I2Cbuf, i2cbuflen);
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}
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void i2c_have_DMA_Rx(){
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if(!i2c_got_DMA_Rx) return;
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i2c_got_DMA_Rx = 0;
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i2c_bufdudump();
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}
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int i2cdma_haderr(){
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int r = goterr;
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goterr = 0;
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return r;
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}
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// Rx/Tx interrupts
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void dma1_channel1_isr(){
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uint32_t isr = DMA1->ISR;
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if(isr & (DMA_ISR_TCIF1 | DMA_ISR_TEIF1)){
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if(isr & DMA_ISR_TEIF1) goterr = 1;
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if(!(DMA1_Channel1->CCR & DMA_CCR_DIR)) i2c_got_DMA_Rx = 1; // last transfer was Rx
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DMA1_Channel1->CCR = 0;
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I2Cbusy = 0;
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}
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DMA1->IFCR = 0xf; // clear all flags for channel1
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}
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@ -17,6 +17,7 @@
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*/
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#pragma once
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#include <stdint.h>
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#define I2C_ADDREND (0x80)
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@ -38,6 +39,12 @@ uint8_t read_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes);
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uint8_t read_i2c_reg(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t nbytes);
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uint8_t read_i2c_reg16(uint8_t addr, uint16_t reg16, uint8_t *data, uint8_t nbytes);
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uint8_t write_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes);
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uint8_t write_i2c_dma(uint8_t addr, uint8_t *data, uint8_t nbytes);
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uint8_t read_i2c_dma(uint8_t addr, uint8_t nbytes);
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void i2c_bufdudump();
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void i2c_have_DMA_Rx();
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int i2cdma_haderr();
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void i2c_init_scan_mode();
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int i2c_scan_next_addr(uint8_t *addr);
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Binary file not shown.
@ -75,5 +75,6 @@ int main(void){
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if(wasbo) usart3_sendstr("Buffer overflow occured @ last message\n");
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if(rcv) rcv = parse_cmd(rcv);
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if(rcv) usart3_sendstr(rcv);
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i2c_have_DMA_Rx(); // check if there's DMA Rx complete
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}
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}
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@ -28,10 +28,13 @@ static uint8_t locBuffer[LOCBUFFSZ];
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const char *helpstring =
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"i0..2 - setup I2C with lowest..highest speed (7.7, 10 and 100kHz)\n"
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"Ia addr - set I2C address\n"
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"Ig - dump content of I2Cbuf\n"
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"Iw bytes - send bytes (hex/dec/oct/bin) to I2C\n"
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"IW bytes - the same over DMA\n"
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"Ir reg n - read n bytes from I2C reg\n"
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"IR reg16 n - read n bytes from 16-bit register\n"
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"I2 reg16 n - read n bytes from 16-bit register\n"
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"In n - just read n bytes\n"
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"IN n - the same but with DMA\n"
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"Is - scan I2C bus\n"
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"U - send long buffer over USART\n"
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;
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@ -47,7 +50,7 @@ static void U3sendlong(const char *str){
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}
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static uint8_t i2cinited = 0;
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static inline char *setupI2C(char *buf){
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TRUE_INLINE char *setupI2C(char *buf){
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buf = omit_spaces(buf);
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if(*buf < '0' || *buf > '2') return "Wrong speed";
|
||||
i2c_setup(*buf - '0');
|
||||
@ -56,27 +59,30 @@ static inline char *setupI2C(char *buf){
|
||||
}
|
||||
|
||||
static uint8_t I2Caddress = 0;
|
||||
static inline char *saI2C(char *buf){
|
||||
TRUE_INLINE char *saI2C(char *buf){
|
||||
uint32_t addr;
|
||||
if(!getnum(buf, &addr) || addr > 0x7f) return "Wrong address";
|
||||
I2Caddress = (uint8_t) addr << 1;
|
||||
USND("I2Caddr="); USND(uhex2str(addr)); USND("\n");
|
||||
return "OK";
|
||||
}
|
||||
static inline void rdI2C(char *buf, int is16){
|
||||
static void rdI2C(char *buf, int is16){
|
||||
uint32_t N;
|
||||
int noreg = 0;
|
||||
int noreg = 0; // write register (==1 - just read, ==2 - -//- using DMA)
|
||||
char *nxt = NULL;
|
||||
if(*buf != 'n'){
|
||||
if(*buf == 'n'){
|
||||
++buf;
|
||||
noreg = 1;
|
||||
}else if(*buf == 'N'){
|
||||
++buf;
|
||||
noreg = 2;
|
||||
}else{
|
||||
nxt = getnum(buf, &N);
|
||||
if(!nxt || buf == nxt || N > 0xffff || (!is16 && N > 0xff)){
|
||||
USND("Bad register number\n");
|
||||
return;
|
||||
}
|
||||
buf = nxt;
|
||||
}else{
|
||||
++buf;
|
||||
noreg = 1;
|
||||
}
|
||||
uint16_t reg = N;
|
||||
nxt = getnum(buf, &N);
|
||||
@ -86,8 +92,16 @@ static inline void rdI2C(char *buf, int is16){
|
||||
}
|
||||
const char *erd = "Error reading I2C\n";
|
||||
if(noreg){ // don't write register
|
||||
if(!read_i2c(I2Caddress, locBuffer, N)){
|
||||
USND(erd);
|
||||
if(noreg == 1){
|
||||
USND("Simple read:\n");
|
||||
if(!read_i2c(I2Caddress, locBuffer, N)){
|
||||
USND(erd);
|
||||
return;
|
||||
}
|
||||
}else{
|
||||
USND("Try to read using DMA .. ");
|
||||
if(!read_i2c_dma(I2Caddress, N)) USND(erd);
|
||||
else USND("OK\n");
|
||||
return;
|
||||
}
|
||||
}else{
|
||||
@ -104,11 +118,11 @@ static inline void rdI2C(char *buf, int is16){
|
||||
}
|
||||
}
|
||||
if(N == 0){ USND("OK"); return; }
|
||||
USND("Register "); USND(uhex2str(reg)); USND(":\n");
|
||||
if(!noreg){USND("Register "); USND(uhex2str(reg)); USND(":\n");}
|
||||
hexdump(usart3_sendstr, locBuffer, N);
|
||||
}
|
||||
// read N numbers from buf, @return 0 if wrong or none
|
||||
static uint16_t readNnumbers(char *buf){
|
||||
TRUE_INLINE uint16_t readNnumbers(char *buf){
|
||||
uint32_t D;
|
||||
char *nxt;
|
||||
uint16_t N = 0;
|
||||
@ -120,9 +134,11 @@ static uint16_t readNnumbers(char *buf){
|
||||
USND("Send "); USND(u2str(N)); USND(" bytes\n");
|
||||
return N;
|
||||
}
|
||||
static inline char *wrI2C(char *buf){
|
||||
static char *wrI2C(char *buf, int isdma){
|
||||
uint16_t N = readNnumbers(buf);
|
||||
if(!write_i2c(I2Caddress, locBuffer, N)) return "Error writing I2C";
|
||||
int result = isdma ? write_i2c_dma(I2Caddress, locBuffer, N) :
|
||||
write_i2c(I2Caddress, locBuffer, N);
|
||||
if(!result) return "Error writing I2C";
|
||||
return "OK";
|
||||
}
|
||||
|
||||
@ -138,10 +154,13 @@ char *parse_cmd(char *buf){
|
||||
buf = omit_spaces(buf + 1);
|
||||
if(*buf == 'a') return saI2C(buf + 1);
|
||||
else if(*buf == 'r'){ rdI2C(buf + 1, 0); return NULL; }
|
||||
else if(*buf == 'R'){ rdI2C(buf + 1, 1); return NULL; }
|
||||
else if(*buf == '2'){ rdI2C(buf + 1, 1); return NULL; }
|
||||
else if(*buf == 'n'){ rdI2C(buf, 0); return NULL; }
|
||||
else if(*buf == 'w') return wrI2C(buf + 1);
|
||||
else if(*buf == 'N'){ rdI2C(buf, 0); return NULL; }
|
||||
else if(*buf == 'w') return wrI2C(buf + 1, 0);
|
||||
else if(*buf == 'W') return wrI2C(buf + 1, 1);
|
||||
else if(*buf == 's'){ i2c_init_scan_mode(); return "Start scan\n"; }
|
||||
else if(*buf == 'g'){ i2c_bufdudump(); return NULL; }
|
||||
else return "Command should be 'Ia', 'Iw', 'Ir' or 'Is'\n";
|
||||
break;
|
||||
}
|
||||
|
||||
@ -246,3 +246,8 @@ char *getnum(const char *txt, uint32_t *N){
|
||||
}
|
||||
return nxt;
|
||||
}
|
||||
|
||||
void mymemcpy(char *dest, const char *src, int len){
|
||||
if(len < 1) return;
|
||||
while(len--) *dest++ = *src++;
|
||||
}
|
||||
|
||||
@ -26,3 +26,4 @@ char *i2str(int32_t i);
|
||||
char *uhex2str(uint32_t val);
|
||||
char *getnum(const char *txt, uint32_t *N);
|
||||
char *omit_spaces(const char *buf);
|
||||
void mymemcpy(char *dest, const char *src, int len);
|
||||
|
||||
@ -19,13 +19,14 @@
|
||||
#include <stm32g0.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "strfunc.h" // mymemcpy
|
||||
#include "usart.h"
|
||||
|
||||
// RX/TX DMA->CCR without EN flag
|
||||
#define DMARXCCR (DMA_CCR_MINC | DMA_CCR_TCIE | DMA_CCR_TEIE)
|
||||
#define DMATXCCR (DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE | DMA_CCR_TEIE)
|
||||
|
||||
static int txrdy = 1, rxrdy = 0; // transmission done, next line received
|
||||
volatile int u3txrdy = 1, u3rxrdy = 0; // transmission done, next line received
|
||||
static int bufovr = 0, wasbufovr = 0; // Rx buffer overflow or error flag -> delete next line
|
||||
static int rbufno = 0, tbufno = 0; // current buf number
|
||||
static char rbuf[2][UARTBUFSZ], tbuf[2][UARTBUFSZ]; // receive & transmit buffers
|
||||
@ -34,8 +35,8 @@ static int rxlen[2] = {0}, txlen[2] = {0};
|
||||
char *usart3_getline(int *wasbo){
|
||||
if(wasbo) *wasbo = wasbufovr;
|
||||
wasbufovr = 0;
|
||||
if(!rxrdy) return NULL;
|
||||
rxrdy = 0; // clear ready flag
|
||||
if(!u3rxrdy) return NULL;
|
||||
u3rxrdy = 0; // clear ready flag
|
||||
return rbuf[!rbufno]; // current buffer is in filling stage, return old - filled - buffer
|
||||
}
|
||||
|
||||
@ -79,17 +80,13 @@ void usart3_setup(){
|
||||
NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
|
||||
}
|
||||
|
||||
static void mymemcpy(char *dest, const char *src, int len){
|
||||
while(len--) *dest++ = *src++;
|
||||
}
|
||||
|
||||
int usart3_send(const char *str, int len){
|
||||
int rest = UARTBUFSZ - txlen[tbufno];
|
||||
if(rest == 0 && !txrdy) return 0; // buffer is full while transmission in process
|
||||
if(rest == 0 && !u3txrdy) return 0; // buffer is full while transmission in process
|
||||
if(len < rest) rest = len;
|
||||
mymemcpy(tbuf[tbufno] + txlen[tbufno], str, rest);
|
||||
txlen[tbufno] += rest;
|
||||
if(!txrdy) return rest;
|
||||
if(!u3txrdy) return rest;
|
||||
if(txlen[tbufno] == UARTBUFSZ) usart3_sendbuf();
|
||||
if(rest == len) return len;
|
||||
len -= rest;
|
||||
@ -109,13 +106,13 @@ int usart3_sendstr(const char *str){
|
||||
* @brief usart3_sendbuf - send current buffer
|
||||
*/
|
||||
void usart3_sendbuf(){
|
||||
if(!txrdy || txlen[tbufno] == 0) return;
|
||||
if(!u3txrdy || txlen[tbufno] == 0) return;
|
||||
// set up DMA
|
||||
DMA1_Channel2->CCR = DMATXCCR;
|
||||
DMA1_Channel2->CMAR = (uint32_t)&tbuf[tbufno];
|
||||
DMA1_Channel2->CNDTR = txlen[tbufno];
|
||||
USART3->ICR = USART_ICR_TCCF; // clear TC flag
|
||||
txrdy = 0;
|
||||
u3txrdy = 0;
|
||||
// activate DMA
|
||||
DMA1_Channel2->CCR = DMATXCCR | DMA_CCR_EN;
|
||||
tbufno = !tbufno; // swap buffers
|
||||
@ -124,7 +121,7 @@ void usart3_sendbuf(){
|
||||
|
||||
// return amount of bytes sents
|
||||
int usart3_send_blocking(const char *str, int len){
|
||||
if(!txrdy) return 0;
|
||||
if(!u3txrdy) return 0;
|
||||
USART3->CR1 |= USART_CR1_TE;
|
||||
for(int i = 0; i < len; ++i){
|
||||
while(!(USART3->ISR & USART_ISR_TXE_TXFNF));
|
||||
@ -138,7 +135,7 @@ void usart3_4_isr(){
|
||||
if(USART3->ISR & USART_ISR_CMF){ // got '\n' @ USART3
|
||||
DMA1_Channel3->CCR = DMARXCCR;
|
||||
if(!bufovr){ // forget about broken line @ buffer overflow
|
||||
rxrdy = 1;
|
||||
u3rxrdy = 1;
|
||||
int l = UARTBUFSZ - DMA1_Channel3->CNDTR - 1; // strlen
|
||||
rxlen[rbufno] = l;
|
||||
rbuf[rbufno][l] = 0;
|
||||
@ -159,7 +156,7 @@ void usart3_4_isr(){
|
||||
void dma1_channel2_3_isr(){
|
||||
uint32_t isr = DMA1->ISR;
|
||||
if(isr & (DMA_ISR_TCIF2 | DMA_ISR_TEIF2)){ // transfer complete or error
|
||||
txrdy = 1;
|
||||
u3txrdy = 1;
|
||||
//DMA1_Channel2->CCR = DMATXCCR;
|
||||
}
|
||||
if(isr & (DMA_ISR_TCIF3 | DMA_ISR_TEIF3)){ // receive complete or error -> buffer overflow
|
||||
@ -170,5 +167,5 @@ void dma1_channel2_3_isr(){
|
||||
DMA1_Channel3->CCR = DMARXCCR | DMA_CCR_EN;
|
||||
}
|
||||
}
|
||||
DMA1->IFCR = 0xffffffff; // clear all flags
|
||||
DMA1->IFCR = 0xff0; // clear all flags for 2&3
|
||||
}
|
||||
|
||||
@ -22,6 +22,8 @@
|
||||
|
||||
#define USND(t) do{usart3_sendstr(t);}while(0)
|
||||
|
||||
extern volatile int u3txrdy, u3rxrdy;
|
||||
|
||||
void usart3_setup();
|
||||
int usart3_send_blocking(const char *str, int len);
|
||||
int usart3_send(const char *str, int len);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user