mirror of
https://github.com/eddyem/stm32samples.git
synced 2025-12-06 18:55:13 +03:00
add spi, not tested yet
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@ -1,6 +1,6 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE QtCreatorProject>
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<!DOCTYPE QtCreatorProject>
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<!-- Written by QtCreator 12.0.1, 2024-01-08T22:45:09. -->
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<!-- Written by QtCreator 12.0.2, 2024-03-07T19:39:35. -->
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<qtcreator>
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<qtcreator>
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<data>
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<data>
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<variable>EnvironmentId</variable>
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<variable>EnvironmentId</variable>
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@ -4,6 +4,8 @@ can.c
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can.h
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can.h
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commonfunctions.c
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commonfunctions.c
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commonfunctions.h
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commonfunctions.h
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encoder.c
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encoder.h
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flash.c
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flash.c
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flash.h
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flash.h
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gpio.c
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gpio.c
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@ -14,6 +16,8 @@ main.c
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proto.h
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proto.h
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ringbuffer.c
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ringbuffer.c
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ringbuffer.h
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ringbuffer.h
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spi.c
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spi.h
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strfunc.c
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strfunc.c
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strfunc.h
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strfunc.h
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textfunctions.c
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textfunctions.c
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@ -19,9 +19,11 @@
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#include "adc.h"
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#include "adc.h"
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#include "can.h"
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#include "can.h"
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#include "commonfunctions.h"
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#include "commonfunctions.h"
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#include "encoder.h"
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#include "flash.h"
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#include "flash.h"
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#include "gpio.h"
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#include "gpio.h"
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#include "proto.h"
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#include "proto.h"
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#include "spi.h"
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#include "usb.h"
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#include "usb.h"
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#define FIXDL(m) do{m->length = 8;}while(0)
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#define FIXDL(m) do{m->length = 8;}while(0)
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@ -64,16 +66,6 @@ static errcodes adcv(CAN_message *msg){
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*(uint32_t*)&msg->data[4] = (uint32_t) v; // or float??
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*(uint32_t*)&msg->data[4] = (uint32_t) v; // or float??
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return ERR_OK;
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return ERR_OK;
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}
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}
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// get/set CAN speed
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static errcodes canspeed(CAN_message *msg){
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if(ISSETTER(msg->data)){
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uint32_t spd = *(uint32_t*)&msg->data[4];
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CAN_reinit(spd);
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the_conf.CANspeed = CAN_speed();
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}else FIXDL(msg);
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*(uint32_t*)&msg->data[4] = CAN_speed();
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return ERR_OK;
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}
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// get/set CAN ID
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// get/set CAN ID
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static errcodes canid(CAN_message *msg){
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static errcodes canid(CAN_message *msg){
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if(ISSETTER(msg->data)){
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if(ISSETTER(msg->data)){
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@ -128,12 +120,56 @@ static errcodes esw(CAN_message *msg){
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*(uint32_t*)&msg->data[4] = getESW(no);
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*(uint32_t*)&msg->data[4] = getESW(no);
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return ERR_OK;
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return ERR_OK;
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}
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}
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// bounce constant, ms
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// init SPI2
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static errcodes bounce(CAN_message *msg){
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static errcodes initspi2(CAN_message _U_ *msg){
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spi_setup(2);
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return ERR_OK;
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}
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// send/read 1..4 bytes
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static errcodes sendspi2(CAN_message *msg){
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int n = msg->length - 4;
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if(n < 1) return ERR_BADVAL;
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if(spi_writeread(2, msg->data + 4, n)) return ERR_OK;
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return ERR_CANTRUN;
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}
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// read encoder value and send over CAN
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static errcodes encget(CAN_message *msg){
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FIXDL(msg);
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if(read_encoder(msg->data + 4)) return ERR_OK;
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return ERR_CANTRUN;
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}
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// common uint32_t setter/getter
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static errcodes u32setget(CAN_message *msg){
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uint16_t idx = *(uint16_t*)msg->data;
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uint32_t *ptr = NULL;
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switch(idx){
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case CMD_CANSPEED: ptr = &the_conf.CANspeed; break;
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case CMD_BOUNCE: ptr = &the_conf.bounce_ms; break;
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case CMD_USARTSPEED: ptr = &the_conf.usartspeed; break;
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default: break;
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}
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if(!ptr) return ERR_CANTRUN; // unknown error
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if(ISSETTER(msg->data)){
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if(ISSETTER(msg->data)){
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the_conf.bounce_ms = *(uint32_t*)&msg->data[4];
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*ptr = *(uint32_t*)&msg->data[4];
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}else FIXDL(msg);
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}else FIXDL(msg);
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*(uint32_t*)&msg->data[4] = the_conf.bounce_ms;
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*(uint32_t*)&msg->data[4] = *ptr;
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return ERR_OK;
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}
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// common bitflag setter/getter
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static errcodes flagsetget(CAN_message *msg){
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uint16_t idx = *(uint16_t*)msg->data;
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uint8_t bit = 32;
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switch(idx){
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case CMD_ENCISSSI: bit = FLAGBIT(ENC_IS_SSI); break;
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default: break;
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}
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if(bit > 31) return ERR_CANTRUN; // unknown error
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if(ISSETTER(msg->data)){
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if(msg->data[4]) the_conf.flags |= 1<<bit;
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else the_conf.flags &= ~(1<<bit);
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}else FIXDL(msg);
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*(uint32_t*)&msg->data[4] = (the_conf.flags & (1<<bit)) ? 1 : 0;
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return ERR_OK;
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return ERR_OK;
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}
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}
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/************ END of all common functions list (for `funclist`) ************/
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/************ END of all common functions list (for `funclist`) ************/
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@ -143,7 +179,7 @@ typedef struct{
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errcodes (*fn)(CAN_message *msg); // function to run with can packet `msg`
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errcodes (*fn)(CAN_message *msg); // function to run with can packet `msg`
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int32_t minval; // minimal/maximal values of *(int32_t*)(&data[4]) - if minval != maxval
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int32_t minval; // minimal/maximal values of *(int32_t*)(&data[4]) - if minval != maxval
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int32_t maxval;
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int32_t maxval;
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uint8_t datalen; // nominal data length
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uint8_t datalen; // minimal data length (full CAN packet, bytes)
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} commonfunction;
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} commonfunction;
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// list of common (CAN/USB) functions
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// list of common (CAN/USB) functions
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@ -154,7 +190,7 @@ static const commonfunction funclist[CMD_AMOUNT] = {
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[CMD_MCUTEMP] = {mcut, 0, 0, 0},
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[CMD_MCUTEMP] = {mcut, 0, 0, 0},
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[CMD_ADCRAW] = {adcraw, 0, 0, 3}, // need parno: 0..4
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[CMD_ADCRAW] = {adcraw, 0, 0, 3}, // need parno: 0..4
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[CMD_ADCV] = {adcv, 0, 0, 3}, // need parno: 0..3
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[CMD_ADCV] = {adcv, 0, 0, 3}, // need parno: 0..3
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[CMD_CANSPEED] = {canspeed, CAN_MIN_SPEED, CAN_MAX_SPEED, 0},
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[CMD_CANSPEED] = {u32setget, CAN_MIN_SPEED, CAN_MAX_SPEED, 0},
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[CMD_CANID] = {canid, 1, 0x7ff, 0},
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[CMD_CANID] = {canid, 1, 0x7ff, 0},
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[CMD_ADCMUL] = {adcmul, 0, 0, 3}, // at least parno
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[CMD_ADCMUL] = {adcmul, 0, 0, 3}, // at least parno
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[CMD_SAVECONF] = {saveconf, 0, 0, 0},
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[CMD_SAVECONF] = {saveconf, 0, 0, 0},
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@ -162,7 +198,12 @@ static const commonfunction funclist[CMD_AMOUNT] = {
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[CMD_RELAY] = {relay, 0, 1, 0},
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[CMD_RELAY] = {relay, 0, 1, 0},
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[CMD_GETESW_BLK] = {eswblk, 0, 0, 3},
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[CMD_GETESW_BLK] = {eswblk, 0, 0, 3},
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[CMD_GETESW] = {esw, 0, 0, 3},
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[CMD_GETESW] = {esw, 0, 0, 3},
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[CMD_BOUNCE] = {bounce, 0, 300, 0},
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[CMD_BOUNCE] = {u32setget, 0, 300, 0},
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[CMD_USARTSPEED] = {u32setget, 1200, 3000000, 0},
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[CMD_ENCISSSI] = {flagsetget, 0, 0, 0},
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[CMD_SPIINIT] = {initspi2, 0, 0, 0},
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[CMD_SPISEND] = {sendspi2, 0, 0, 5},
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[CMD_ENCGET] = {encget, 0, 0, 0},
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};
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};
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@ -196,7 +237,7 @@ void run_can_cmd(CAN_message *msg){
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if(idx >= CMD_AMOUNT || funclist[idx].fn == NULL){ // bad command index
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if(idx >= CMD_AMOUNT || funclist[idx].fn == NULL){ // bad command index
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FORMERR(msg, ERR_BADCMD); return;
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FORMERR(msg, ERR_BADCMD); return;
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}
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}
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// check minimal length (2 or 3)
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// check minimal length
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if(funclist[idx].datalen > datalen){
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if(funclist[idx].datalen > datalen){
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FORMERR(msg, ERR_WRONGLEN); return;
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FORMERR(msg, ERR_WRONGLEN); return;
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}
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}
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36
F3:F303/CANbus4BTA/encoder.c
Normal file
36
F3:F303/CANbus4BTA/encoder.c
Normal file
@ -0,0 +1,36 @@
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/*
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* This file is part of the canbus4bta project.
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* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "encoder.h"
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#include "flash.h"
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#include "spi.h"
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#include "usart.h"
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void encoder_setup(){
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if(FLAG(ENC_IS_SSI)) spi_setup(ENCODER_SPI);
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else usart_setup();
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}
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// read encoder value into buffer `outbuf`
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// return TRUE if all OK
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int read_encoder(uint8_t outbuf[4]){
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if(!FLAG(ENC_IS_SSI)) return FALSE;
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*((uint32_t*)outbuf) = 0;
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return spi_writeread(ENCODER_SPI, outbuf, 4);
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}
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24
F3:F303/CANbus4BTA/encoder.h
Normal file
24
F3:F303/CANbus4BTA/encoder.h
Normal file
@ -0,0 +1,24 @@
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/*
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* This file is part of the canbus4bta project.
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* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
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||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <stdint.h>
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void encoder_setup();
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int read_encoder(uint8_t outbuf[4]);
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@ -31,23 +31,23 @@ const uint32_t FLASH_blocksize = (uint32_t)&_BLOCKSIZE;
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static uint32_t maxCnum = 1024 / sizeof(user_conf); // can't use blocksize here
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static uint32_t maxCnum = 1024 / sizeof(user_conf); // can't use blocksize here
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#define USERCONF_INITIALIZER { \
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.userconf_sz = sizeof(user_conf) \
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,.CANspeed = 100000 \
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,.CANID = 0xaa \
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,.bounce_ms = 50 \
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,.adcmul[0] = 10.930f \
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,.adcmul[1] = 2.028f \
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,.adcmul[2] = 1.f \
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,.adcmul[3] = 1.f \
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}
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static int write2flash(const void*, const void*, uint32_t);
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static int write2flash(const void*, const void*, uint32_t);
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// don't write `static` here, or get error:
|
// don't write `static` here, or get error:
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// 'memcpy' forming offset 8 is out of the bounds [0, 4] of object '__varsstart' with type 'uint32_t'
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// 'memcpy' forming offset 8 is out of the bounds [0, 4] of object '__varsstart' with type 'uint32_t'
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const user_conf *Flash_Data = (const user_conf *)(&__varsstart);
|
const user_conf *Flash_Data = (const user_conf *)(&__varsstart);
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|
|
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user_conf the_conf = USERCONF_INITIALIZER;
|
user_conf the_conf = {
|
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|
.userconf_sz = sizeof(user_conf),
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|
.CANspeed = 100000,
|
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|
.CANID = 0xaa,
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|
.bounce_ms = 50,
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|
.adcmul[0] = 10.930f,
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|
.adcmul[1] = 2.028f,
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|
.adcmul[2] = 1.f,
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|
.adcmul[3] = 1.f,
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|
.usartspeed = 115200,
|
||||||
|
.flags = FLAGP(ENC_IS_SSI),
|
||||||
|
};
|
||||||
|
|
||||||
int currentconfidx = -1; // index of current configuration
|
int currentconfidx = -1; // index of current configuration
|
||||||
|
|
||||||
@ -179,9 +179,6 @@ int erase_storage(int npage){
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FLASH->KEYR = FLASH_KEY1;
|
FLASH->KEYR = FLASH_KEY1;
|
||||||
FLASH->KEYR = FLASH_KEY2;
|
FLASH->KEYR = FLASH_KEY2;
|
||||||
}
|
}
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||||||
/*USB_sendstr("size/block size/nblocks/FLASH_SIZE: "); printu(flsz);
|
|
||||||
USB_putbyte('/'); printu(FLASH_blocksize); USB_putbyte('/');
|
|
||||||
printu(nblocks); USB_putbyte('/'); printu(FLASH_SIZE); newline(); USB_sendall();*/
|
|
||||||
while(FLASH->SR & FLASH_SR_BSY) IWDG->KR = IWDG_REFRESH;
|
while(FLASH->SR & FLASH_SR_BSY) IWDG->KR = IWDG_REFRESH;
|
||||||
FLASH->SR = FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR;
|
FLASH->SR = FLASH_SR_EOP | FLASH_SR_PGERR | FLASH_SR_WRPERR;
|
||||||
FLASH->CR |= FLASH_CR_PER;
|
FLASH->CR |= FLASH_CR_PER;
|
||||||
|
|||||||
@ -28,6 +28,21 @@
|
|||||||
|
|
||||||
#define FLASH_SIZE *((uint16_t*)FLASH_SIZE_BASE)
|
#define FLASH_SIZE *((uint16_t*)FLASH_SIZE_BASE)
|
||||||
|
|
||||||
|
// bit flags positions
|
||||||
|
// encoder have SSI (1) or RS-422 (0)
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||||||
|
#define ENC_IS_SSI_BIT 0
|
||||||
|
|
||||||
|
// bit number
|
||||||
|
#define FLAGBIT(f) (f ## _BIT)
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||||||
|
// flag position
|
||||||
|
#define FLAGP(f) (1 << FLAGBIT(f))
|
||||||
|
// flag value
|
||||||
|
#define FLAG(f) ((the_conf.flags & FLAGP(f)) ? 1 : 0)
|
||||||
|
// set flag
|
||||||
|
#define FLAGS(f) do{the_conf.flags |= FLAGP(f);}while(0)
|
||||||
|
// reset flag
|
||||||
|
#define FLAGR(f) do{the_conf.flags &= ~FLAGP(f);}while(0)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* struct to save user configurations
|
* struct to save user configurations
|
||||||
*/
|
*/
|
||||||
@ -35,8 +50,10 @@ typedef struct __attribute__((packed, aligned(4))){
|
|||||||
uint16_t userconf_sz; // "magick number"
|
uint16_t userconf_sz; // "magick number"
|
||||||
uint16_t CANID; // identifier
|
uint16_t CANID; // identifier
|
||||||
uint32_t CANspeed; // default CAN speed
|
uint32_t CANspeed; // default CAN speed
|
||||||
uint32_t bounce_ms; // a
|
uint32_t bounce_ms; // debounce wait
|
||||||
float adcmul[ADC_TSENS]; // ADC voltage multipliers
|
float adcmul[ADC_TSENS]; // ADC voltage multipliers
|
||||||
|
uint32_t usartspeed; // USART1 speed (baud/s)
|
||||||
|
uint32_t flags; // bit flags
|
||||||
} user_conf;
|
} user_conf;
|
||||||
|
|
||||||
extern user_conf the_conf; // global user config (read from FLASH to RAM)
|
extern user_conf the_conf; // global user config (read from FLASH to RAM)
|
||||||
|
|||||||
@ -49,25 +49,24 @@ TRUE_INLINE void iwdg_setup(){
|
|||||||
static inline void gpio_setup(){
|
static inline void gpio_setup(){
|
||||||
RELAY_OFF(); MUL_OFF(0); MUL_OFF(1);
|
RELAY_OFF(); MUL_OFF(0); MUL_OFF(1);
|
||||||
RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN;
|
RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN;
|
||||||
// PWM - AF1 @PA7; USB - alternate function 14 @ pins PA11/PA12; USART1 = AF7 @PA9/10; SWD - AF0 @PA13/14
|
// PWM - AF1 @PA7; USB - alternate function 14 @ pins PA11/PA12; SWD - AF0 @PA13/14
|
||||||
GPIOA->AFR[0] = AFRf(1, 7);
|
GPIOA->AFR[0] = AFRf(1, 7);
|
||||||
GPIOA->AFR[1] = AFRf(7, 9) | AFRf(7, 10) | AFRf(14, 11) | AFRf(14, 12);
|
GPIOA->AFR[1] = AFRf(14, 11) | AFRf(14, 12);
|
||||||
// PA4 - din (PU in), USART1: PA10(Rx, pullup), PA9(Tx); USB - PA11, PA12; SWDIO - PA13, PA14; PA8 & PA15 - PU in
|
// PA4 - din (PU in); USB - PA11, PA12; SWDIO - PA13, PA14; PA8 & PA15 - PU in
|
||||||
GPIOA->PUPDR = (GPIOA->PUPDR & PUPD_CLR(4) & PUPD_CLR(8) & PUPD_CLR(10) & PUPD_CLR(15)) |
|
GPIOA->PUPDR = (GPIOA->PUPDR & PUPD_CLR(4) & PUPD_CLR(8) & PUPD_CLR(10) & PUPD_CLR(15)) |
|
||||||
PUPD_PU(4) | PUPD_PU(8) | PUPD_PU(10) | PUPD_PU(15);
|
PUPD_PU(4) | PUPD_PU(8) | PUPD_PU(10) | PUPD_PU(15);
|
||||||
GPIOA->MODER = MODER_AI(0) | MODER_AI(1) | MODER_AI(2) | MODER_AI(3) | MODER_I(4) | MODER_O(5) |
|
GPIOA->MODER = MODER_AI(0) | MODER_AI(1) | MODER_AI(2) | MODER_AI(3) | MODER_I(4) | MODER_O(5) |
|
||||||
MODER_O(6) | MODER_AF(7) | MODER_I(8) | MODER_AF(9) | MODER_AF(10) | MODER_AF(11) |
|
MODER_O(6) | MODER_AF(7) | MODER_I(8) | MODER_AF(11) |
|
||||||
MODER_AF(12) | MODER_AF(13) | MODER_AF(14) | MODER_I(15);
|
MODER_AF(12) | MODER_AF(13) | MODER_AF(14) | MODER_I(15);
|
||||||
GPIOA->OSPEEDR = OSPEED_HI(4) | OSPEED_MED(7) | OSPEED_MED(9) | OSPEED_MED(10) | OSPEED_HI(11) |
|
GPIOA->OSPEEDR = OSPEED_HI(4) | OSPEED_MED(7) | OSPEED_MED(9) | OSPEED_MED(10) | OSPEED_HI(11) |
|
||||||
OSPEED_HI(12) | OSPEED_HI(13) | OSPEED_HI(14);
|
OSPEED_HI(12) | OSPEED_HI(13) | OSPEED_HI(14);
|
||||||
// SPI for SSI: AF5 @PB3, PB4; I2C1: AF4 @PB6, PB7; CAN: AF9 @PB8, PB9; SPI2: AF5 @PB12..PB15
|
// I2C1: AF4 @PB6, PB7; CAN: AF9 @PB8, PB9; SPI2: AF5 @PB12..PB15
|
||||||
GPIOB->AFR[0] = AFRf(5, 3) | AFRf(5, 4) | AFRf(4, 6) | AFRf(4, 7);
|
GPIOB->AFR[0] = AFRf(5, 3) | AFRf(5, 4) | AFRf(4, 6) | AFRf(4, 7);
|
||||||
GPIOB->AFR[1] = AFRf(9, 8) | AFRf(9, 9) | AFRf(5, 12) | AFRf(5, 13) | AFRf(5, 14) | AFRf(5, 15);
|
GPIOB->AFR[1] = AFRf(9, 8) | AFRf(9, 9);
|
||||||
// PB10,11 - PU in
|
// PB10,11 - PU in
|
||||||
GPIOB->PUPDR = PUPD_PU(10) | PUPD_PU(11);
|
GPIOB->PUPDR = PUPD_PU(10) | PUPD_PU(11);
|
||||||
GPIOB->MODER = MODER_O(0) | MODER_O(1) | MODER_O(2) | MODER_AF(3) | MODER_AF(4) | MODER_AF(6) | MODER_AF(7) |
|
GPIOB->MODER = MODER_O(0) | MODER_O(1) | MODER_O(2) | MODER_AF(6) | MODER_AF(7) |
|
||||||
MODER_AF(8) | MODER_AF(9) | MODER_I(10) | MODER_I(11) | MODER_AF(12) | MODER_AF(13) |
|
MODER_AF(8) | MODER_AF(9) | MODER_I(10) | MODER_I(11);
|
||||||
MODER_AF(14) | MODER_AF(15);
|
|
||||||
GPIOB->OSPEEDR = OSPEED_HI(3) | OSPEED_HI(4) | OSPEED_HI(6) | OSPEED_HI(7) | OSPEED_HI(8) | OSPEED_HI(9) |
|
GPIOB->OSPEEDR = OSPEED_HI(3) | OSPEED_HI(4) | OSPEED_HI(6) | OSPEED_HI(7) | OSPEED_HI(8) | OSPEED_HI(9) |
|
||||||
OSPEED_HI(12) | OSPEED_HI(13) | OSPEED_HI(14) | OSPEED_HI(15);
|
OSPEED_HI(12) | OSPEED_HI(13) | OSPEED_HI(14) | OSPEED_HI(15);
|
||||||
GPIOC->MODER = MODER_O(13) | MODER_O(14) | MODER_O(15);
|
GPIOC->MODER = MODER_O(13) | MODER_O(14) | MODER_O(15);
|
||||||
@ -76,7 +75,6 @@ static inline void gpio_setup(){
|
|||||||
void hw_setup(){
|
void hw_setup(){
|
||||||
gpio_setup();
|
gpio_setup();
|
||||||
adc_setup();
|
adc_setup();
|
||||||
//usart_setup(); - power it on only for encoders on RS-422
|
|
||||||
USB_setup();
|
USB_setup();
|
||||||
#ifndef EBUG
|
#ifndef EBUG
|
||||||
iwdg_setup();
|
iwdg_setup();
|
||||||
|
|||||||
@ -41,4 +41,7 @@
|
|||||||
|
|
||||||
extern volatile uint32_t Tms;
|
extern volatile uint32_t Tms;
|
||||||
|
|
||||||
|
// SPI1 is encoder, SPI2 is ext
|
||||||
|
#define ENCODER_SPI (1)
|
||||||
|
|
||||||
void hw_setup();
|
void hw_setup();
|
||||||
|
|||||||
@ -17,6 +17,7 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include "can.h"
|
#include "can.h"
|
||||||
|
#include "encoder.h"
|
||||||
#include "flash.h"
|
#include "flash.h"
|
||||||
#include "gpio.h"
|
#include "gpio.h"
|
||||||
#include "hardware.h"
|
#include "hardware.h"
|
||||||
@ -60,6 +61,7 @@ int main(void){
|
|||||||
hw_setup();
|
hw_setup();
|
||||||
// getSwitches() and set module role & CAN ID
|
// getSwitches() and set module role & CAN ID
|
||||||
CAN_setup(the_conf.CANspeed);
|
CAN_setup(the_conf.CANspeed);
|
||||||
|
encoder_setup();
|
||||||
USBPU_ON();
|
USBPU_ON();
|
||||||
while(1){
|
while(1){
|
||||||
IWDG->KR = IWDG_REFRESH;
|
IWDG->KR = IWDG_REFRESH;
|
||||||
|
|||||||
@ -64,6 +64,11 @@ typedef enum{
|
|||||||
CMD_GETESW_BLK, // 11 - blocking read of ESW
|
CMD_GETESW_BLK, // 11 - blocking read of ESW
|
||||||
CMD_GETESW, // 12 - current ESW state, bounce-free
|
CMD_GETESW, // 12 - current ESW state, bounce-free
|
||||||
CMD_BOUNCE, // 13 - get/set bounce constant (ms)
|
CMD_BOUNCE, // 13 - get/set bounce constant (ms)
|
||||||
|
CMD_USARTSPEED, // 14 - get/set USART1 speed (if encoder on RS-422)
|
||||||
|
CMD_ENCISSSI, // 15 - encoder is SSI (1) or RS-422 (0)
|
||||||
|
CMD_SPIINIT, // 16 - init SPI2
|
||||||
|
CMD_SPISEND, // 17 - send 1..4 bytes over SPI
|
||||||
|
CMD_ENCGET, // 18 - get encoder value
|
||||||
CMD_AMOUNT // amount of CAN commands
|
CMD_AMOUNT // amount of CAN commands
|
||||||
} can_cmd;
|
} can_cmd;
|
||||||
|
|
||||||
|
|||||||
198
F3:F303/CANbus4BTA/spi.c
Normal file
198
F3:F303/CANbus4BTA/spi.c
Normal file
@ -0,0 +1,198 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the canbus4bta project.
|
||||||
|
* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hardware.h"
|
||||||
|
#include "spi.h"
|
||||||
|
|
||||||
|
#include "usb.h"
|
||||||
|
#ifdef EBUG
|
||||||
|
#include "strfunc.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//#define SPIDR *((volatile uint8_t*)&SPI2->DR)
|
||||||
|
|
||||||
|
spiStatus spi_status[AMOUNT_OF_SPI+1] = {0, SPI_NOTREADY, SPI_NOTREADY};
|
||||||
|
static volatile SPI_TypeDef* const SPIs[AMOUNT_OF_SPI+1] = {NULL, SPI1, SPI2};
|
||||||
|
#define WAITX(x) do{volatile uint32_t wctr = 0; while((x) && (++wctr < 360000)) IWDG->KR = IWDG_REFRESH; if(wctr==360000){ DBG("timeout"); return 0;}}while(0)
|
||||||
|
|
||||||
|
// SPI DMA Rx buffer (set by spi_write_dma call) for SPI2
|
||||||
|
//static uint8_t *rxbufptr = NULL;
|
||||||
|
//static uint32_t rxbuflen = 0;
|
||||||
|
|
||||||
|
// init SPI to work with (only SPI2) and without DMA (both)
|
||||||
|
// Channel 4 - SPI2 Rx
|
||||||
|
// Channel 5 - SPI2 Tx
|
||||||
|
void spi_setup(uint8_t idx){
|
||||||
|
if(idx > AMOUNT_OF_SPI) return;
|
||||||
|
volatile SPI_TypeDef *SPI = SPIs[idx];
|
||||||
|
SPI->CR1 = 0; // clear EN
|
||||||
|
SPI->CR2 = 0;
|
||||||
|
if(idx == 1){ // PB3/PB4, without MOSI; SPI for SSI: AF5 @PB3, PB4
|
||||||
|
GPIOB->AFR[0] = (GPIOB->AFR[0] & ~(GPIO_AFRL_AFRL3 | GPIO_AFRL_AFRL4)) |
|
||||||
|
AFRf(5, 3) | AFRf(5, 4);
|
||||||
|
GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER4)) |
|
||||||
|
MODER_AF(3) | MODER_AF(4);
|
||||||
|
RCC->APB1RSTR = RCC_APB2RSTR_SPI1RST;
|
||||||
|
RCC->APB1RSTR = 0; // clear reset
|
||||||
|
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
|
||||||
|
SPI->CR1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_RXONLY; // software slave management (without hardware NSS pin); RX only
|
||||||
|
}else if(idx == 2){ // PB12..PB15
|
||||||
|
GPIOB->AFR[1] = (GPIOB->AFR[1] & ~(GPIO_AFRH_AFRH4 | GPIO_AFRH_AFRH5 | GPIO_AFRH_AFRH6 | GPIO_AFRH_AFRH7)) |
|
||||||
|
AFRf(5, 12) | AFRf(5, 13) | AFRf(5, 14) | AFRf(5, 15);
|
||||||
|
GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER12 | GPIO_MODER_MODER13 | GPIO_MODER_MODER14 | GPIO_MODER_MODER15)) |
|
||||||
|
MODER_AF(12) | MODER_AF(13) | MODER_AF(14) | MODER_AF(15);
|
||||||
|
RCC->APB1RSTR = RCC_APB1RSTR_SPI2RST; // reset SPI
|
||||||
|
RCC->APB1RSTR = 0; // clear reset
|
||||||
|
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
|
||||||
|
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
|
||||||
|
SPI->CR2 = SPI_CR2_SSOE; // hardware NSS management
|
||||||
|
// setup SPI2 DMA
|
||||||
|
//SPI->CR2 |= SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN;
|
||||||
|
// Tx
|
||||||
|
/*DMA1_Channel5->CPAR = (uint32_t)&(SPI2->DR); // hardware
|
||||||
|
DMA1_Channel5->CCR = DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TEIE; // memory increment, mem->hw, error interrupt
|
||||||
|
// Rx
|
||||||
|
DMA1_Channel4->CPAR = (uint32_t)&(SPI2->DR);
|
||||||
|
DMA1_Channel4->CCR = DMA_CCR_MINC | DMA_CCR_TCIE | DMA_CCR_TEIE; // mem inc, hw->mem, Rx complete and error interrupt
|
||||||
|
NVIC_EnableIRQ(DMA1_Channel4_IRQn); // enable Rx interrupt
|
||||||
|
NVIC_EnableIRQ(DMA1_Channel5_IRQn); // enable Tx interrupt
|
||||||
|
*/
|
||||||
|
}else return; // err
|
||||||
|
// Baudrate = 0b110 - fpclk/128
|
||||||
|
SPI->CR1 |= SPI_CR1_MSTR | SPI_CR1_BR_2 | SPI_CR1_BR_1;
|
||||||
|
// DS=8bit; RXNE generates after 8bit of data in FIFO;
|
||||||
|
SPI->CR2 |= SPI_CR2_FRXTH | SPI_CR2_DS_2|SPI_CR2_DS_1|SPI_CR2_DS_0;
|
||||||
|
spi_status[idx] = SPI_READY;
|
||||||
|
SPI->CR1 |= SPI_CR1_SPE;
|
||||||
|
DBG("SPI works");
|
||||||
|
}
|
||||||
|
|
||||||
|
int spi_waitbsy(uint8_t idx){
|
||||||
|
if(idx > AMOUNT_OF_SPI) return 0;
|
||||||
|
WAITX(SPIs[idx]->SR & SPI_SR_BSY);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief spi_writeread - send data over SPI (change data array with received bytes)
|
||||||
|
* @param data - data to write/read
|
||||||
|
* @param n - length of data
|
||||||
|
* @return 0 if failed
|
||||||
|
*/
|
||||||
|
int spi_writeread(uint8_t idx, uint8_t *data, uint32_t n){
|
||||||
|
if(idx > AMOUNT_OF_SPI) return 0;
|
||||||
|
if(spi_status[idx] != SPI_READY || !data || !n){
|
||||||
|
DBG("not ready");
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
for(uint32_t x = 0; x < n; ++x){
|
||||||
|
WAITX(!(SPIs[idx]->SR & SPI_SR_TXE));
|
||||||
|
*((volatile uint8_t*)&SPIs[idx]->DR) = data[x];
|
||||||
|
WAITX(!(SPIs[idx]->SR & SPI_SR_RXNE));
|
||||||
|
data[x] = *((volatile uint8_t*)&SPIs[idx]->DR);
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief spi_send_dma - send data over SPI2 through DMA (used both for writing and reading)
|
||||||
|
* @param data - data to read
|
||||||
|
* @param rxbuf - pointer to receiving buffer (at least n bytes), can be also `data` (if `data` isn't const)
|
||||||
|
* @param n - length of data
|
||||||
|
* @return 0 if failed
|
||||||
|
* !!! `data` buffer can be changed only after SPI_READY flag!
|
||||||
|
*/
|
||||||
|
/*int spi_write_dma(const uint8_t *data, uint8_t *rxbuf, uint32_t n){
|
||||||
|
if(spi_status[2] != SPI_READY) return 0;
|
||||||
|
if(!spi_waitbsy(2)) return 0;
|
||||||
|
rxbufptr = rxbuf;
|
||||||
|
rxbuflen = n;
|
||||||
|
// spi_setup(); - only so we can clear Rx FIFO!
|
||||||
|
DMA1_Channel5->CMAR = (uint32_t) data;
|
||||||
|
DMA1_Channel5->CNDTR = n;
|
||||||
|
// check if user want to receive data
|
||||||
|
if(rxbuf){
|
||||||
|
DMA1_Channel4->CCR |= DMA_CCR_TCIE;
|
||||||
|
DMA1_Channel5->CCR &= ~DMA_CCR_TCIE; // turn off Tx ready interrupt
|
||||||
|
DMA1_Channel4->CMAR = (uint32_t) rxbuf;
|
||||||
|
DMA1_Channel4->CNDTR = n;
|
||||||
|
DMA1_Channel4->CCR |= DMA_CCR_EN; // turn on reception
|
||||||
|
}else DMA1_Channel5->CCR |= DMA_CCR_TCIE; // interrupt by Tx ready - user don't want reception
|
||||||
|
spi_status[2] = SPI_BUSY;
|
||||||
|
DMA1_Channel5->CCR |= DMA_CCR_EN; // turn on transmission
|
||||||
|
return 1;
|
||||||
|
}*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief spi_read - read SPI2 data
|
||||||
|
* @param data - data to read
|
||||||
|
* @param n - length of data
|
||||||
|
* @return n
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
int spi_read(uint8_t idx, uint8_t *data, uint32_t n){
|
||||||
|
if(idx > AMOUNT_OF_SPI) return 0;
|
||||||
|
if(spi_status[idx] != SPI_READY){
|
||||||
|
DBG("not ready");
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
if(!spi_waitbsy(idx)) return 0;
|
||||||
|
// clear SPI Rx FIFO
|
||||||
|
for(int i = 0; i < 4; ++i) (void) SPIs[idx]->DR;
|
||||||
|
for(uint32_t x = 0; x < n; ++x){
|
||||||
|
WAITX(!(SPIs[idx]->SR & SPI_SR_TXE));
|
||||||
|
*((volatile uint8_t*)&SPIs[idx]->DR) = 0;
|
||||||
|
WAITX(!(SPIs[idx]->SR & SPI_SR_RXNE));
|
||||||
|
data[x] = *((volatile uint8_t*)&SPIs[idx]->DR);
|
||||||
|
//USB_sendstr("rd got "); USB_sendstr(uhex2str(data[x]));
|
||||||
|
newline();
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief spi_read_dma - got buffer read by DMA
|
||||||
|
* @param n (o) - length of rxbuffer
|
||||||
|
* @return amount of bytes read
|
||||||
|
*/
|
||||||
|
/*uint8_t *spi_read_dma(uint32_t *n){
|
||||||
|
if(spi_status[2] != SPI_READY || rxbuflen == 0) return NULL;
|
||||||
|
if(n) *n = rxbuflen - DMA1_Channel4->CNDTR; // in case of error buffer would be underfull
|
||||||
|
rxbuflen = 0; // prevent consequent readings
|
||||||
|
return rxbufptr;
|
||||||
|
}*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
// Rx ready interrupt
|
||||||
|
void dma1_channel4_isr(){
|
||||||
|
spi_status[2] = SPI_READY; // ready independent on errors or Rx ready
|
||||||
|
DMA1->IFCR = DMA_IFCR_CTCIF4 | DMA_IFCR_CTEIF4;
|
||||||
|
// turn off DMA
|
||||||
|
DMA1_Channel4->CCR &= ~DMA_CCR_EN;
|
||||||
|
DMA1_Channel5->CCR &= ~DMA_CCR_EN;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Tx ready interrupt
|
||||||
|
void dma1_channel5_isr(){
|
||||||
|
spi_status[2] = SPI_READY; // ready independent on errors or Tx ready
|
||||||
|
DMA1->IFCR = DMA_IFCR_CTCIF5 | DMA_IFCR_CTEIF5;
|
||||||
|
// turn off DMA
|
||||||
|
DMA1_Channel4->CCR &= ~DMA_CCR_EN;
|
||||||
|
DMA1_Channel5->CCR &= ~DMA_CCR_EN;
|
||||||
|
}
|
||||||
|
*/
|
||||||
37
F3:F303/CANbus4BTA/spi.h
Normal file
37
F3:F303/CANbus4BTA/spi.h
Normal file
@ -0,0 +1,37 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the canbus4bta project.
|
||||||
|
* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#include <stm32f3.h>
|
||||||
|
|
||||||
|
#define AMOUNT_OF_SPI (2)
|
||||||
|
|
||||||
|
typedef enum{
|
||||||
|
SPI_NOTREADY,
|
||||||
|
SPI_READY,
|
||||||
|
SPI_BUSY
|
||||||
|
} spiStatus;
|
||||||
|
|
||||||
|
extern spiStatus spi_status[AMOUNT_OF_SPI+1];
|
||||||
|
|
||||||
|
void spi_setup(uint8_t idx);
|
||||||
|
int spi_waitbsy(uint8_t idx);
|
||||||
|
int spi_writeread(uint8_t idx, uint8_t *data, uint32_t n);
|
||||||
|
//int spi_write_dma(const uint8_t *data, uint8_t *rxbuf, uint32_t n);
|
||||||
|
//int spi_read(uint8_t idx, uint8_t *data, uint32_t n);
|
||||||
|
//uint8_t *spi_read_dma(uint32_t *n);
|
||||||
@ -66,6 +66,7 @@ static const funcdescr funclist[] = {
|
|||||||
{"reset", CMD_RESET, "reset MCU"},
|
{"reset", CMD_RESET, "reset MCU"},
|
||||||
{"s", -TCMD_CANSEND, "send CAN message: ID 0..8 data bytes"},
|
{"s", -TCMD_CANSEND, "send CAN message: ID 0..8 data bytes"},
|
||||||
{"saveconf", CMD_SAVECONF, "save configuration"},
|
{"saveconf", CMD_SAVECONF, "save configuration"},
|
||||||
|
{"spiinit", CMD_SPIINIT, "init SPI2"},
|
||||||
{"time", CMD_TIME, "get/set time (ms)"},
|
{"time", CMD_TIME, "get/set time (ms)"},
|
||||||
{"wdtest", -TCMD_WDTEST, "test watchdog"},
|
{"wdtest", -TCMD_WDTEST, "test watchdog"},
|
||||||
{NULL, 0, NULL} // last record
|
{NULL, 0, NULL} // last record
|
||||||
@ -79,6 +80,12 @@ static errcodes wdtest(const char _U_ *str){
|
|||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// names of bit flags (ordered from LSE of[0])
|
||||||
|
static const char * const bitfields[] = {
|
||||||
|
"encisSSI",
|
||||||
|
NULL
|
||||||
|
};
|
||||||
|
|
||||||
static errcodes dumpconf(const char _U_ *str){
|
static errcodes dumpconf(const char _U_ *str){
|
||||||
#ifdef EBUG
|
#ifdef EBUG
|
||||||
uint32_t sz = FLASH_SIZE*1024;
|
uint32_t sz = FLASH_SIZE*1024;
|
||||||
@ -95,6 +102,15 @@ static errcodes dumpconf(const char _U_ *str){
|
|||||||
USB_sendstr("\nadcmul"); USB_putbyte('0'+i); USB_putbyte('=');
|
USB_sendstr("\nadcmul"); USB_putbyte('0'+i); USB_putbyte('=');
|
||||||
USB_sendstr(float2str(the_conf.adcmul[i], 3));
|
USB_sendstr(float2str(the_conf.adcmul[i], 3));
|
||||||
}
|
}
|
||||||
|
USB_sendstr("\nusartspeed="); printu(the_conf.usartspeed);
|
||||||
|
const char * const *p = bitfields;
|
||||||
|
int bit = 0;
|
||||||
|
while(p){
|
||||||
|
newline();
|
||||||
|
USB_sendstr(*p); USB_putbyte('='); USB_putbyte((the_conf.flags & (1<<bit)) ? '1' : '0');
|
||||||
|
if(++bit > 31) break;
|
||||||
|
++p;
|
||||||
|
}
|
||||||
//#define PROPNAME(nm) do{newline(); USB_sendstr(nm); USB_putbyte(cur); USB_putbyte('=');}while(0)
|
//#define PROPNAME(nm) do{newline(); USB_sendstr(nm); USB_putbyte(cur); USB_putbyte('=');}while(0)
|
||||||
//#undef PROPNAME
|
//#undef PROPNAME
|
||||||
newline();
|
newline();
|
||||||
|
|||||||
@ -16,8 +16,9 @@
|
|||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "stm32f3.h"
|
#include <stm32f3.h>
|
||||||
#include "hardware.h"
|
#include "hardware.h"
|
||||||
|
#include "flash.h"
|
||||||
#include "usart.h"
|
#include "usart.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
@ -64,11 +65,16 @@ void usart_send(const char *str){
|
|||||||
usart_sendn(str, L);
|
usart_sendn(str, L);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// USART1: PA10(Rx, pullup), PA9(Tx); USART1 = AF7 @PA9/10;
|
||||||
void usart_setup(){
|
void usart_setup(){
|
||||||
// clock
|
// clock
|
||||||
|
GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER9 | GPIO_MODER_MODER10)) |
|
||||||
|
MODER_AF(9) | MODER_AF(10);
|
||||||
|
GPIOA->AFR[1] = (GPIOA->AFR[1] & ~(GPIO_AFRH_AFRH1 | GPIO_AFRH_AFRH2)) |
|
||||||
|
AFRf(7, 9) | AFRf(7, 10);
|
||||||
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
||||||
USART1->ICR = 0xffffffff; // clear all flags
|
USART1->ICR = 0xffffffff; // clear all flags
|
||||||
USART1->BRR = SysFreq / 115200;
|
USART1->BRR = SysFreq / the_conf.usartspeed;
|
||||||
USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_RXNEIE; // 1start,8data,nstop; enable Rx,Tx,USART
|
USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_RXNEIE; // 1start,8data,nstop; enable Rx,Tx,USART
|
||||||
uint32_t tmout = 16000000;
|
uint32_t tmout = 16000000;
|
||||||
while(!(USART1->ISR & USART_ISR_TC)){if(--tmout == 0) break;} // polling idle frame Transmission
|
while(!(USART1->ISR & USART_ISR_TC)){if(--tmout == 0) break;} // polling idle frame Transmission
|
||||||
|
|||||||
@ -1,2 +1,2 @@
|
|||||||
#define BUILD_NUMBER "68"
|
#define BUILD_NUMBER "80"
|
||||||
#define BUILD_DATE "2024-01-08"
|
#define BUILD_DATE "2024-03-07"
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user