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https://github.com/eddyem/stm32samples.git
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add simple blink for ST32F103-nolib (Makefile still under construction!)
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1
F0-nolib/Snippets/fallthru
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1
F0-nolib/Snippets/fallthru
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@@ -0,0 +1 @@
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__attribute__((fallthrough));
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@@ -23,41 +23,73 @@
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* used by the startup code generator (vector.c) to set the initial values for
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* the interrupt handling routines to the chip family specific _isr weak
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* symbols. */
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#define NVIC_WWDG_IRQ 0
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#define NVIC_PVD_IRQ 1
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#define NVIC_RTC_IRQ 2
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#define NVIC_FLASH_IRQ 3
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#define NVIC_RCC_IRQ 4
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#define NVIC_EXTI0_1_IRQ 5
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#define NVIC_EXTI2_3_IRQ 6
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#define NVIC_EXTI4_15_IRQ 7
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#define NVIC_TSC_IRQ 8
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#define NVIC_DMA1_CHANNEL1_IRQ 9
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#define NVIC_DMA1_CHANNEL2_3_IRQ 10
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#define NVIC_DMA1_CHANNEL4_5_IRQ 11
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#define NVIC_ADC_COMP_IRQ 12
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#define NVIC_TIM1_BRK_UP_TRG_COM_IRQ 13
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#define NVIC_TIM1_CC_IRQ 14
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#define NVIC_TIM2_IRQ 15
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#define NVIC_TIM3_IRQ 16
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#define NVIC_TIM6_DAC_IRQ 17
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#define NVIC_TIM7_IRQ 18
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#define NVIC_TIM14_IRQ 19
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#define NVIC_TIM15_IRQ 20
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#define NVIC_TIM16_IRQ 21
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#define NVIC_TIM17_IRQ 22
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#define NVIC_I2C1_IRQ 23
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#define NVIC_I2C2_IRQ 24
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#define NVIC_SPI1_IRQ 25
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#define NVIC_SPI2_IRQ 26
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#define NVIC_USART1_IRQ 27
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#define NVIC_USART2_IRQ 28
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#define NVIC_USART3_4_IRQ 29
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#define NVIC_CEC_CAN_IRQ 30
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#define NVIC_USB_IRQ 31
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#define NVIC_IRQ_COUNT 32
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#define F0_IRQ_HANDLERS \
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wwdg_isr, \
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pvd_isr, \
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rtc_isr, \
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flash_isr, \
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rcc_isr, \
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exti0_1_isr, \
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exti2_3_isr, \
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exti4_15_isr, \
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tsc_isr, \
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dma1_channel1_isr, \
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dma1_channel2_3_isr, \
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dma1_channel4_5_isr, \
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adc_comp_isr, \
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tim1_brk_up_trg_com_isr, \
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tim1_cc_isr, \
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tim2_isr, \
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tim3_isr, \
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tim6_dac_isr, \
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tim7_isr, \
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tim14_isr, \
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tim15_isr, \
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tim16_isr, \
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tim17_isr, \
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i2c1_isr, \
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i2c2_isr, \
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spi1_isr, \
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spi2_isr, \
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usart1_isr, \
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usart2_isr, \
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usart3_4_isr, \
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cec_can_isr, \
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usb_isr
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[NVIC_WWDG_IRQ] = wwdg_isr, \
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[NVIC_PVD_IRQ] = pvd_isr, \
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[NVIC_RTC_IRQ] = rtc_isr, \
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[NVIC_FLASH_IRQ] = flash_isr, \
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[NVIC_RCC_IRQ] = rcc_isr, \
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[NVIC_EXTI0_1_IRQ] = exti0_1_isr, \
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[NVIC_EXTI2_3_IRQ] = exti2_3_isr, \
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[NVIC_EXTI4_15_IRQ] = exti4_15_isr, \
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[NVIC_TSC_IRQ] = tsc_isr, \
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[NVIC_DMA1_CHANNEL1_IRQ] = dma1_channel1_isr, \
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[NVIC_DMA1_CHANNEL2_3_IRQ] = dma1_channel2_3_isr, \
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[NVIC_DMA1_CHANNEL4_5_IRQ] = dma1_channel4_5_isr, \
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[NVIC_ADC_COMP_IRQ] = adc_comp_isr, \
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[NVIC_TIM1_BRK_UP_TRG_COM_IRQ] = tim1_brk_up_trg_com_isr, \
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[NVIC_TIM1_CC_IRQ] = tim1_cc_isr, \
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[NVIC_TIM2_IRQ] = tim2_isr, \
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[NVIC_TIM3_IRQ] = tim3_isr, \
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[NVIC_TIM6_DAC_IRQ] = tim6_dac_isr, \
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[NVIC_TIM7_IRQ] = tim7_isr, \
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[NVIC_TIM14_IRQ] = tim14_isr, \
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[NVIC_TIM15_IRQ] = tim15_isr, \
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[NVIC_TIM16_IRQ] = tim16_isr, \
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[NVIC_TIM17_IRQ] = tim17_isr, \
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[NVIC_I2C1_IRQ] = i2c1_isr, \
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[NVIC_I2C2_IRQ] = i2c2_isr, \
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[NVIC_SPI1_IRQ] = spi1_isr, \
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[NVIC_SPI2_IRQ] = spi2_isr, \
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[NVIC_USART1_IRQ] = usart1_isr, \
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[NVIC_USART2_IRQ] = usart2_isr, \
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[NVIC_USART3_4_IRQ] = usart3_4_isr, \
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[NVIC_CEC_CAN_IRQ] = cec_can_isr, \
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[NVIC_USB_IRQ] = usb_isr
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typedef void (*vector_table_entry_t)(void);
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typedef void (*funcp_t) (void);
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