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fix some kicad

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This commit is contained in:
Edward Emelianov 2022-09-23 09:16:26 +03:00
parent 8ffe8ab462
commit 40c1030049
3 changed files with 40613 additions and 662 deletions
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41261
F0:F030,F042,F072/usbcan/kicad/fp-info-cache
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3
F0:F030,F042,F072/usbcan/kicad/stm32.kicad_prl
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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 44,
"active_layer_preset": "All Layers",
"auto_track_width": true,
"hidden_nets": [],
@ -33,7 +33,6 @@
3,
4,
5,
6,
8,
9,
10,

11
F0:F030,F042,F072/usbcan/kicad/stm32.kicad_pro
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@ -64,6 +64,7 @@
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
@ -79,9 +80,10 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "error",
"silk_overlap": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
@ -100,7 +102,7 @@
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.075,
"min_hole_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
@ -108,7 +110,8 @@
"min_through_hole_diameter": 0.6,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.7999999999999999
"min_via_diameter": 0.7999999999999999,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,