mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-03-20 08:40:57 +03:00
added blink for STM32G0B1, next -> add USART
This commit is contained in:
Edward Emelianov
@@ -38,8 +38,7 @@ void null_handler(void);
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#define NVIC_IRQ_COUNT 32
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#if defined STM32G070xx
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#define IRQ_HANDLERS \
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#if defined(STM32G070xx)
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[WWDG_IRQn] = wwdg_isr, \
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[RTC_TAMP_IRQn] = rtc_isr, \
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[FLASH_IRQn] = flash_isr, \
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@@ -49,30 +48,61 @@ void null_handler(void);
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[EXTI4_15_IRQn] = exti4_15_isr, \
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[DMA1_Channel1_IRQn] = dma1_channel1_isr, \
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[DMA1_Channel2_3_IRQn] = dma1_channel2_3_isr, \
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[DMA1_Ch4_7_DMAMUX1_OVR_IRQn] = dmamux_isr, \
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[DMA1_Ch4_7_DMAMUX1_OVR_IRQn] = dma1_ch4_7_dma2_ch1_5_dmamux_ovr_isr, \
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[ADC1_IRQn] = adc_comp_isr, \
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[TIM1_BRK_UP_TRG_COM_IRQn] = tim1_brk_up_trg_com_isr, \
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[TIM1_CC_IRQn] = tim1_cc_isr, \
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[TIM3_IRQn] = tim3_4_isr, \
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[TIM6_IRQn] = tim6_dac_isr, \
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[TIM7_IRQn] = tim7_isr, \
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[TIM6_IRQn] = tim6_dac_lptim1_isr, \
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[TIM7_IRQn] = tim7_lptim2_isr, \
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[TIM14_IRQn] = tim14_isr, \
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[TIM15_IRQn] = tim15_isr, \
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[TIM16_IRQn] = tim16_isr, \
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[TIM17_IRQn] = tim17_isr, \
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[TIM16_IRQn] = tim16_fdcan_it0_isr, \
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[TIM17_IRQn] = tim17_fdcan_it1_isr, \
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[I2C1_IRQn] = i2c1_isr, \
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[I2C2_IRQn] = i2c2_3_isr, \
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[SPI1_IRQn] = spi1_isr, \
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[SPI2_IRQn] = spi2_3_isr, \
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[USART1_IRQn] = usart1_isr, \
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[USART2_IRQn] = usart2_isr, \
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[USART3_4_IRQn] = usart3_4_isr
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[USART2_IRQn] = usart2_lpuart2_isr, \
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[USART3_4_IRQn] = usart3_6_lpuart1_isr
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#elif defined(STM32G0B1xx)
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#define IRQ_HANDLERS \
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[WWDG_IRQn] = wwdg_isr, \
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[PVD_VDDIO2_IRQn] = pvd_vddio2_isr, \
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[RTC_TAMP_IRQn] = rtc_isr, \
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[FLASH_IRQn] = flash_isr, \
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[RCC_CRS_IRQn] = rcc_isr, \
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[EXTI0_1_IRQn] = exti0_1_isr, \
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[EXTI2_3_IRQn] = exti2_3_isr, \
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[EXTI4_15_IRQn] = exti4_15_isr, \
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[USB_UCPD1_2_IRQn] = usb_ucpd1_2_isr, \
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[DMA1_Channel1_IRQn] = dma1_channel1_isr, \
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[DMA1_Channel2_3_IRQn] = dma1_channel2_3_isr, \
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[DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn] = dma1_ch4_7_dma2_ch1_5_dmamux_ovr_isr, \
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[ADC1_COMP_IRQn] = adc_comp_isr, \
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[TIM1_BRK_UP_TRG_COM_IRQn] = tim1_brk_up_trg_com_isr, \
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[TIM1_CC_IRQn] = tim1_cc_isr, \
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[TIM2_IRQn] = tim2_isr, \
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[TIM3_TIM4_IRQn] = tim3_4_isr, \
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[TIM6_DAC_LPTIM1_IRQn] = tim6_dac_lptim1_isr, \
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[TIM7_LPTIM2_IRQn] = tim7_lptim2_isr, \
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[TIM14_IRQn] = tim14_isr, \
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[TIM15_IRQn] = tim15_isr, \
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[TIM16_FDCAN_IT0_IRQn] = tim16_fdcan_it0_isr, \
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[TIM17_FDCAN_IT1_IRQn] = tim17_fdcan_it1_isr, \
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[I2C1_IRQn] = i2c1_isr, \
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[I2C2_3_IRQn] = i2c2_3_isr, \
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[SPI1_IRQn] = spi1_isr, \
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[SPI2_3_IRQn] = spi2_3_isr, \
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[USART1_IRQn] = usart1_isr, \
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[USART2_LPUART2_IRQn] = usart2_lpuart2_isr, \
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[USART3_4_5_6_LPUART1_IRQn] = usart3_6_lpuart1_isr, \
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[CEC_IRQn] = cec_isr
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#else
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#error "Not supported STM32G0 MCU"
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#endif
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typedef struct {
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unsigned int *initial_sp_value; /**< Initial stack pointer value. */
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vector_table_entry_t reset;
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@@ -140,7 +170,7 @@ void null_handler(void)
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#pragma weak pend_sv_handler = null_handler
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#pragma weak sys_tick_handler = null_handler
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#if defined STM32G0
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#if defined STM32G070xx
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#pragma weak wwdg_isr = blocking_handler
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#pragma weak rtc_isr = blocking_handler
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#pragma weak flash_isr = blocking_handler
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@@ -150,25 +180,54 @@ void null_handler(void)
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#pragma weak exti4_15_isr = blocking_handler
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#pragma weak dma1_channel1_isr = blocking_handler
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#pragma weak dma1_channel2_3_isr = blocking_handler
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#pragma weak dmamux_isr = blocking_handler
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#pragma weak dma1_ch4_7_dma2_ch1_5_dmamux_ovr_isr = blocking_handler
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#pragma weak adc_comp_isr = blocking_handler
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#pragma weak tim1_brk_up_trg_com_isr = blocking_handler
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#pragma weak tim1_cc_isr = blocking_handler
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#pragma weak tim3_4_isr = blocking_handler
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#pragma weak tim6_dac_isr = blocking_handler
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#pragma weak tim7_isr = blocking_handler
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#pragma weak tim6_dac_lptim1_isr = blocking_handler
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#pragma weak tim7_lptim2_isr = blocking_handler
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#pragma weak tim14_isr = blocking_handler
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#pragma weak tim15_isr = blocking_handler
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#pragma weak tim16_isr = blocking_handler
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#pragma weak tim17_isr = blocking_handler
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#pragma weak tim16_fdcan_it0_isr = blocking_handler
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#pragma weak tim17_fdcan_it1_isr = blocking_handler
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#pragma weak i2c1_isr = blocking_handler
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#pragma weak i2c2_3_isr = blocking_handler
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#pragma weak spi1_isr = blocking_handler
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#pragma weak spi2_3_isr = blocking_handler
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#pragma weak usart1_isr = blocking_handler
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#pragma weak usart2_isr = blocking_handler
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#pragma weak usart3_4_isr = blocking_handler
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#pragma weak cec_can_isr = blocking_handler
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#pragma weak usb_isr = blocking_handler
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#pragma weak usart2_lpuart2_isr = blocking_handler
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#pragma weak usart3_6_lpuart1_isr = blocking_handler
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#pragma weak cec_isr = blocking_handler
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#elif defined STM32G0B1xx
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#pragma weak wwdg_isr = blocking_handler
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#pragma weak pvd_vddio2_isr = blocking_handler
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#pragma weak rtc_isr = blocking_handler
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#pragma weak flash_isr = blocking_handler
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#pragma weak rcc_isr = blocking_handler
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#pragma weak exti0_1_isr = blocking_handler
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#pragma weak exti2_3_isr = blocking_handler
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#pragma weak exti4_15_isr = blocking_handler
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#pragma weak usb_ucpd1_2_isr = blocking_handler
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#pragma weak dma1_channel1_isr = blocking_handler
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#pragma weak dma1_channel2_3_isr = blocking_handler
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#pragma weak dma1_ch4_7_dma2_ch1_5_dmamux_ovr_isr = blocking_handler
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#pragma weak adc_comp_isr = blocking_handler
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#pragma weak tim1_brk_up_trg_com_isr = blocking_handler
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#pragma weak tim1_cc_isr = blocking_handler
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#pragma weak tim3_4_isr = blocking_handler
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#pragma weak tim6_dac_lptim1_isr = blocking_handler
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#pragma weak tim7_lptim2_isr = blocking_handler
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#pragma weak tim14_isr = blocking_handler
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#pragma weak tim15_isr = blocking_handler
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#pragma weak tim16_fdcan_it0_isr = blocking_handler
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#pragma weak tim17_fdcan_it1_isr = blocking_handler
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#pragma weak i2c1_isr = blocking_handler
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#pragma weak i2c2_3_isr = blocking_handler
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#pragma weak spi1_isr = blocking_handler
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#pragma weak spi2_3_isr = blocking_handler
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#pragma weak usart1_isr = blocking_handler
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#pragma weak usart2_lpuart2_isr = blocking_handler
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#pragma weak usart3_6_lpuart1_isr = blocking_handler
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#pragma weak cec_isr = blocking_handler
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#endif
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