mirror of
https://github.com/eddyem/STM8_samples.git
synced 2025-12-06 02:35:21 +03:00
208 lines
6.1 KiB
C
208 lines
6.1 KiB
C
/*
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* interrupts.c
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*
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* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "ports_definition.h"
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#include "main.h"
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#include "stepper.h"
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#define TREG(N, R) TIM##N##_##R
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#define STPR_INTR(X) \
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if(TREG(X, SR1) & TIM_SR1_UIF){ \
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TREG(X, SR1) &= ~TIM_SR1_UIF; \
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if(Nsteps[X-1]){ \
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if(++usteps[X-1] == USteps){ \
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usteps[X-1] = 0; \
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if(!StepperInfty) \
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if(--Nsteps[X-1] == 0){ \
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stop_motor(X-1); \
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} \
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} \
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} \
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}
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// Top Level Interrupt
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INTERRUPT_HANDLER(TLI_IRQHandler, 0){}
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// Auto Wake Up Interrupt
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INTERRUPT_HANDLER(AWU_IRQHandler, 1){}
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// Clock Controller Interrupt
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INTERRUPT_HANDLER(CLK_IRQHandler, 2){}
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// External Interrupt PORTA
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INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3){
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check_EP();
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}
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// External Interrupt PORTB
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INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4){
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check_EP();
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}
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// External Interrupt PORTC
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INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5){
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check_EP();
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}
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// External Interrupt PORTD
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INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6){
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check_EP();
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}
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// External Interrupt PORTE
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INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7){
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check_EP();
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}
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#ifdef STM8S903
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// External Interrupt PORTF
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INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8){}
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#endif // STM8S903
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#if defined (STM8S208) || defined (STM8AF52Ax)
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// CAN RX Interrupt routine.
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INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8){}
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// CAN TX Interrupt routine.
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INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9){}
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#endif // STM8S208 || STM8AF52Ax
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// SPI Interrupt routine.
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INTERRUPT_HANDLER(SPI_IRQHandler, 10){}
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// Timer1 Update/Overflow/Trigger/Break Interrupt
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INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11){
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STPR_INTR(1);
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}
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// Timer1 Capture/Compare Interrupt routine.
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INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12){}
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#ifdef STM8S903
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// Timer5 Update/Overflow/Break/Trigger Interrupt
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INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13){}
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// Timer5 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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// Timer2 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){ // generate pulses for stepper CLK
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STPR_INTR(2);
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}
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// Timer2 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){
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}
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#endif // STM8S903
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
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defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
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// Timer3 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15){
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STPR_INTR(3);
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}
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// Timer3 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16){}
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#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
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defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
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// UART1 TX Interrupt
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INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){}
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// UART1 RX Interrupt
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INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){}
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#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
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// I2C Interrupt
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INTERRUPT_HANDLER(I2C_IRQHandler, 19){}
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#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
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// UART2 TX interrupt
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INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20){}
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// UART2 RX interrupt
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INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21){
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U8 rb;
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if(UART2_SR & UART_SR_RXNE){ // data received
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rb = UART2_DR; // read received byte & clear RXNE flag
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//while(!(UART2_SR & UART_SR_TXE));
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// get marked byte?
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if(UART2_CR1 & UART_CR1_R8){ // Master wanna change device?
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if(rb != UART_devNUM){ // another device number
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UART_is_our = 0;
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UART2_CR2 &= ~UART_CR2_TEN; // disable transmitter
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}else{ // our device
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UART_is_our = 1;
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UART2_CR2 |= UART_CR2_TEN; // enable transmitter
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UART_send_byte('*'); // send '*' - we got the command
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}
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return;
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}
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if(!UART_is_our) return; // this isn't our business - !marked & !our
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UART_send_byte(rb); // echo received symbol
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UART_rx[UART_rx_cur_i++] = rb; // put received byte into cycled buffer
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if(UART_rx_cur_i == UART_rx_start_i){ // Oops: buffer overflow! Just forget old data
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UART_rx_start_i++;
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check_UART_pointer(UART_rx_start_i);
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}
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check_UART_pointer(UART_rx_cur_i);
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}
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}
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#endif // STM8S105 or STM8AF626x
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// UART3 TX interrupt
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INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20){}
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// UART3 RX interrupt
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INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21){}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// ADC2 interrupt
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INTERRUPT_HANDLER(ADC2_IRQHandler, 22){}
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#else
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// ADC1 interrupt
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INTERRUPT_HANDLER(ADC1_IRQHandler, 22){
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}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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#ifdef STM8S903
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// Timer6 Update/Overflow/Trigger Interrupt
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INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
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// Timer4 Update/Overflow Interrupt
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INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23){
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if(TIM4_SR & TIM_SR1_UIF){ // update interrupt
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Global_time++; // increase timer
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}
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TIM4_SR = 0; // clear all interrupt flags
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}
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#endif // STM8S903
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// Eeprom EEC Interrupt
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INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24){}
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