mirror of
https://github.com/eddyem/tsys01.git
synced 2025-12-06 10:35:14 +03:00
430 lines
24 KiB
Plaintext
430 lines
24 KiB
Plaintext
(kicad_pcb (version 4) (host pcbnew 4.0.4-stable)
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(general
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(links 15)
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(no_connects 3)
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(area 127.465 99.716666 181.635715 115.950001)
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(thickness 1.6)
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(drawings 6)
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(tracks 96)
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(zones 0)
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(modules 5)
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(nets 8)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user hide)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(segment_width 0.2)
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(edge_width 0.15)
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(via_size 1)
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(via_drill 0.6)
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(via_min_size 1)
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(via_min_drill 0.6)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.2)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x00030_80000001)
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(usegerberextensions false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 GND)
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(net 2 VDD)
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(net 3 "Net-(R1-Pad2)")
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(net 4 "Net-(P1-Pad2)")
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(net 5 "Net-(P1-Pad3)")
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(net 6 "Net-(U1-Pad10)")
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(net 7 "Net-(U1-Pad17)")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 1)
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(via_drill 0.6)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net GND)
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(add_net "Net-(P1-Pad2)")
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(add_net "Net-(P1-Pad3)")
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(add_net "Net-(R1-Pad2)")
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(add_net "Net-(U1-Pad10)")
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(add_net "Net-(U1-Pad17)")
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(add_net VDD)
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)
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(module Resistors_SMD.pretty:R_0603 placed (layer F.Cu) (tedit 58307A47) (tstamp 58BC3D1B)
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(at 138.1252 101.7016 270)
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(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
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(tags "resistor 0603")
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(path /58B85BA0)
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(attr smd)
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(fp_text reference R2 (at 0 -1.9 270) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 4k7 (at 0 1.9 270) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
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(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
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(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
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(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
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(fp_line (start -1.3 -0.8) (end 1.3 -0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.3 -0.8) (end -1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.3 -0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
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(fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
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(pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
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(net 1 GND))
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(pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
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(net 3 "Net-(R1-Pad2)"))
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(model Resistors_SMD.3dshapes/R_0603.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Capacitors_SMD.pretty:C_0603 placed (layer F.Cu) (tedit 5415D631) (tstamp 58BC3CFB)
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(at 159.4104 106.2228 270)
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(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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(tags "capacitor 0603")
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(path /58B85507)
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(attr smd)
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(fp_text reference C1 (at 0 -1.9 270) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 100n (at 0 1.9 270) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
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(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
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(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
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(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
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(fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
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(fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
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(pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
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(net 1 GND))
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(pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
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(net 2 VDD))
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(model Capacitors_SMD.3dshapes/C_0603.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Resistors_SMD.pretty:R_0603 placed (layer F.Cu) (tedit 58307A47) (tstamp 58BC3D0B)
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(at 138.1252 107.7976 90)
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(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
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(tags "resistor 0603")
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(path /58B85A14)
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(attr smd)
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(fp_text reference R1 (at 0 -1.9 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 4k7 (at 0 1.9 90) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
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(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
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(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
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(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
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(fp_line (start -1.3 -0.8) (end 1.3 -0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.3 -0.8) (end -1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.3 -0.8) (end 1.3 0.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
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(fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
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(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
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(net 2 VDD))
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(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
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(net 3 "Net-(R1-Pad2)"))
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(model Resistors_SMD.3dshapes/R_0603.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module QFN-16-1EP_4x4mm_Pitch0.65mm placed (layer B.Cu) (tedit 54130A77) (tstamp 58BC3D43)
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(at 165 104.5)
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(descr "16-Lead Plastic Quad Flat, No Lead Package (ML) - 4x4x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf)")
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(tags "QFN 0.65")
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(path /58B8439D)
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(attr smd)
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(fp_text reference U1 (at 0 3.4) (layer B.SilkS)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_text value TSYS01 (at 0 -3.4) (layer B.Fab)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_line (start -1 2) (end 2 2) (layer B.Fab) (width 0.15))
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(fp_line (start 2 2) (end 2 -2) (layer B.Fab) (width 0.15))
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(fp_line (start 2 -2) (end -2 -2) (layer B.Fab) (width 0.15))
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(fp_line (start -2 -2) (end -2 1) (layer B.Fab) (width 0.15))
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(fp_line (start -2 1) (end -1 2) (layer B.Fab) (width 0.15))
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(fp_line (start -2.65 2.65) (end -2.65 -2.65) (layer B.CrtYd) (width 0.05))
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(fp_line (start 2.65 2.65) (end 2.65 -2.65) (layer B.CrtYd) (width 0.05))
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(fp_line (start -2.65 2.65) (end 2.65 2.65) (layer B.CrtYd) (width 0.05))
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(fp_line (start -2.65 -2.65) (end 2.65 -2.65) (layer B.CrtYd) (width 0.05))
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(fp_line (start 2.15 2.15) (end 2.15 1.375) (layer B.SilkS) (width 0.15))
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(fp_line (start -2.15 -2.15) (end -2.15 -1.375) (layer B.SilkS) (width 0.15))
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(fp_line (start 2.15 -2.15) (end 2.15 -1.375) (layer B.SilkS) (width 0.15))
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(fp_line (start -2.15 2.15) (end -1.375 2.15) (layer B.SilkS) (width 0.15))
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(fp_line (start -2.15 -2.15) (end -1.375 -2.15) (layer B.SilkS) (width 0.15))
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(fp_line (start 2.15 -2.15) (end 1.375 -2.15) (layer B.SilkS) (width 0.15))
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(fp_line (start 2.15 2.15) (end 1.375 2.15) (layer B.SilkS) (width 0.15))
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(pad 1 smd rect (at -2 0.975) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 1 GND))
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(pad 2 smd rect (at -2 0.325) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 3 "Net-(R1-Pad2)"))
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(pad 3 smd rect (at -2 -0.325) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 4 "Net-(P1-Pad2)"))
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(pad 4 smd rect (at -2 -0.975) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 5 "Net-(P1-Pad3)"))
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(pad 5 smd rect (at -0.975 -2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 6 smd rect (at -0.325 -2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 7 smd rect (at 0.325 -2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 8 smd rect (at 0.975 -2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 9 smd rect (at 2 -0.975) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 10 smd rect (at 2 -0.325) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 6 "Net-(U1-Pad10)"))
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(pad 11 smd rect (at 2 0.325) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 6 "Net-(U1-Pad10)"))
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(pad 12 smd rect (at 2 0.975) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 13 smd rect (at 0.975 2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 14 smd rect (at 0.325 2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask))
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(pad 15 smd rect (at -0.325 2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 2 VDD))
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(pad 16 smd rect (at -0.975 2 270) (size 0.8 0.35) (layers B.Cu B.Paste B.Mask)
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(net 2 VDD))
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(pad 17 smd rect (at 0.625 -0.625) (size 1.25 1.25) (layers B.Cu B.Paste B.Mask)
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(net 7 "Net-(U1-Pad17)") (solder_paste_margin_ratio -0.2))
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(pad 17 smd rect (at 0.625 0.625) (size 1.25 1.25) (layers B.Cu B.Paste B.Mask)
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(net 7 "Net-(U1-Pad17)") (solder_paste_margin_ratio -0.2))
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(pad 17 smd rect (at -0.625 -0.625) (size 1.25 1.25) (layers B.Cu B.Paste B.Mask)
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(net 7 "Net-(U1-Pad17)") (solder_paste_margin_ratio -0.2))
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(pad 17 smd rect (at -0.625 0.625) (size 1.25 1.25) (layers B.Cu B.Paste B.Mask)
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(net 7 "Net-(U1-Pad17)") (solder_paste_margin_ratio -0.2))
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(model Housings_DFN_QFN.3dshapes/QFN-16-1EP_4x4mm_Pitch0.65mm.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module my_footprints:SMD_conn_4x2.5mm (layer F.Cu) (tedit 58B861D6) (tstamp 58C38C0B)
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(at 132.25 104.75 270)
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(path /58B85ED6)
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(fp_text reference P1 (at 0 3.81 270) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_01X04 (at 0 -3.81 270) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(pad 1 smd rect (at -3.81 0 270) (size 1.5 5) (layers F.Cu F.Paste F.Mask)
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(net 1 GND))
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(pad 2 smd rect (at -1.27 0 270) (size 1.5 5) (layers F.Cu F.Paste F.Mask)
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(net 4 "Net-(P1-Pad2)"))
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(pad 3 smd rect (at 1.27 0 270) (size 1.5 5) (layers F.Cu F.Paste F.Mask)
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(net 5 "Net-(P1-Pad3)"))
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(pad 4 smd rect (at 3.81 0 270) (size 1.5 5) (layers F.Cu F.Paste F.Mask)
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(net 2 VDD))
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)
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(gr_line (start 129.5 109.5) (end 129.5 100) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 169 109.5) (end 129.5 109.5) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 169 100) (end 169 109.5) (angle 90) (layer Edge.Cuts) (width 0.15))
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(gr_line (start 129.5 100) (end 169 100) (angle 90) (layer Edge.Cuts) (width 0.15))
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(dimension 9.5 (width 0.3) (layer Dwgs.User)
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(gr_text "9.500 mm" (at 175.85 104.75 90) (layer Dwgs.User)
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(effects (font (size 1.5 1.5) (thickness 0.3)))
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)
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(feature1 (pts (xy 169 100) (xy 177.2 100)))
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(feature2 (pts (xy 169 109.5) (xy 177.2 109.5)))
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(crossbar (pts (xy 174.5 109.5) (xy 174.5 100)))
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(arrow1a (pts (xy 174.5 100) (xy 175.086421 101.126504)))
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(arrow1b (pts (xy 174.5 100) (xy 173.913579 101.126504)))
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(arrow2a (pts (xy 174.5 109.5) (xy 175.086421 108.373496)))
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(arrow2b (pts (xy 174.5 109.5) (xy 173.913579 108.373496)))
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)
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(dimension 40 (width 0.3) (layer Dwgs.User)
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(gr_text "40.000 mm" (at 149.5 114.6) (layer Dwgs.User)
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(effects (font (size 1.5 1.5) (thickness 0.3)))
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)
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(feature1 (pts (xy 169.5 110.5) (xy 169.5 115.95)))
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