replace old files

This commit is contained in:
eddyem 2020-01-30 11:06:05 +03:00
parent 352e790706
commit 77496c7be7
15 changed files with 41 additions and 4665 deletions

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STM32/2sensors_logging/tsys01.bin Executable file → Normal file
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@ -35,7 +35,13 @@ extern volatile uint8_t canerror;
static char buff[UARTBUFSZ+1], *bptr = buff; static char buff[UARTBUFSZ+1], *bptr = buff;
static uint8_t blen = 0, USBcmd = 0; static uint8_t blen = 0, USBcmd = 0;
// LEDs are OFF by default // LEDs are OFF by default
uint8_t noLED = 1; uint8_t noLED =
#ifdef EBUG
0
#else
1
#endif
;
void sendbuf(){ void sendbuf(){
IWDG->KR = IWDG_REFRESH; IWDG->KR = IWDG_REFRESH;

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@ -25,6 +25,7 @@
#define __PROTO_H__ #define __PROTO_H__
#include "stm32f0.h" #include "stm32f0.h"
#include "hardware.h"
// macro for static strings // macro for static strings
#define SEND(str) do{addtobuf(str);}while(0) #define SEND(str) do{addtobuf(str);}while(0)

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@ -1,44 +0,0 @@
[editor]
line_wrapping=false
line_break_column=100
auto_continue_multiline=true
[file_prefs]
final_new_line=true
ensure_convert_new_lines=true
strip_trailing_spaces=true
replace_tabs=true
[indentation]
indent_width=4
indent_type=0
indent_hard_tab_width=4
detect_indent=false
detect_indent_width=false
indent_mode=3
[project]
name=tsys01
base_path=/home/eddy/Docs/SAO/BTA/Зеркалоонтроль/Project/STM32src/TSYS_controller
description=
[long line marker]
long_line_behaviour=1
long_line_column=100
[files]
current_page=2
FILE_NAME_0=7848;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fcan.c;0;4
FILE_NAME_1=1413;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fcan.h;0;4
FILE_NAME_2=3014;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fmain.c;0;4
FILE_NAME_3=3352;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fsensors_manage.c;0;4
FILE_NAME_4=1408;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fsensors_manage.h;0;4
FILE_NAME_5=2492;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fcan_process.c;0;4
FILE_NAME_6=1585;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fcan_process.h;0;4
FILE_NAME_7=2511;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fhardware.h;0;4
FILE_NAME_8=2520;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fusart.c;0;4
FILE_NAME_9=1049;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2Fusart.h;0;4
FILE_NAME_10=196;Make;0;EUTF-8;1;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2FTSYS_controller%2FMakefile;0;4
[VTE]
last_dir=/home/eddy

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@ -26,6 +26,10 @@
#include <stdint.h> #include <stdint.h>
#include <string.h> // memcpy #include <string.h> // memcpy
#ifdef EBUG
#undef EBUG
#endif
ep_t endpoints[ENDPOINTS_NUM]; ep_t endpoints[ENDPOINTS_NUM];
static usb_dev_t USB_Dev; static usb_dev_t USB_Dev;
@ -333,7 +337,7 @@ static uint16_t EP0_Handler(ep_t ep){
} }
}else if (ep.rx_flag){ // got data over EP0 or host acknowlegement }else if (ep.rx_flag){ // got data over EP0 or host acknowlegement
if(ep.rx_cnt){ if(ep.rx_cnt){
// EP_WriteIRQ(0, (uint8_t *)0, 0); EP_WriteIRQ(0, (uint8_t *)0, 0);
if(setup_packet.bRequest == SET_LINE_CODING){ if(setup_packet.bRequest == SET_LINE_CODING){
//WRITEDUMP("SET_LINE_CODING"); //WRITEDUMP("SET_LINE_CODING");
linecoding_handler((usb_LineCoding*)ep0databuf); linecoding_handler((usb_LineCoding*)ep0databuf);

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STM32/Tcalc/tsys01.bin Executable file → Normal file
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STM32/Tcalc_screen/tsys01.bin Executable file → Normal file
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STM32/Tcalc_screen_ver2/tcalc_screen.bin Executable file → Normal file
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@ -105,34 +105,33 @@ TRUE_INLINE void sysreset(void){
/* Wait till PLL is used as system clock source */ /* Wait till PLL is used as system clock source */
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL){} while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL){}
} }
/* wrong
TRUE_INLINE void StartHSE(){ TRUE_INLINE void StartHSE(){
// disable PLL // disable PLL
RCC->CR &= ~RCC_CR_PLLON; RCC->CR &= ~RCC_CR_PLLON;
RCC->CR |= RCC_CR_HSEON; RCC->CR |= RCC_CR_HSEON;
while ((RCC->CIR & RCC_CIR_HSERDYF) != 0); while ((RCC->CIR & RCC_CIR_HSERDYF) == 0);
RCC->CIR |= RCC_CIR_HSERDYC; // clear rdy flag RCC->CIR |= RCC_CIR_HSERDYC; // clear rdy flag
/* PLL configuration = (HSE) * 12 = ~48 MHz */ // PLL configuration = (HSE) * 12 = ~48 MHz
RCC->CFGR &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL); RCC->CFGR &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL);
RCC->CFGR |= RCC_CFGR_PLLSRC_HSE_PREDIV | RCC_CFGR_PLLMUL12; RCC->CFGR |= RCC_CFGR_PLLSRC_HSE_PREDIV | RCC_CFGR_PLLMUL12;
RCC->CR |= RCC_CR_PLLON; RCC->CR |= RCC_CR_PLLON;
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL){} while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL){}
} } */
#if !defined (STM32F030x4) && !defined (STM32F030x6) && !defined (STM32F030x8) && !defined (STM32F031x6) && !defined (STM32F038xx) && !defined (STM32F030xC) #if defined (STM32F042x6) || defined (STM32F072xb)
TRUE_INLINE void StartHSI48(){ TRUE_INLINE void StartHSI48(){
// disable PLL RCC->APB1ENR |= RCC_APB1ENR_CRSEN | RCC_APB1ENR_USBEN; // enable CRS (hsi48 sync) & USB
RCC->CR &= ~RCC_CR_PLLON; RCC->CFGR3 &= ~RCC_CFGR3_USBSW; // reset USB
RCC->CR2 &= RCC_CR2_HSI48ON; // turn on HSI48 RCC->CR2 |= RCC_CR2_HSI48ON; // turn ON HSI48
while((RCC->CR2 & RCC_CR2_HSI48RDY) == 0); uint32_t tmout = 16000000;
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL)); while(!(RCC->CR2 & RCC_CR2_HSI48RDY)){if(--tmout == 0) break;}
// HSI48/2 * 2 = HSI48 FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI48_PREDIV | RCC_CFGR_PLLMUL2); CRS->CFGR &= ~CRS_CFGR_SYNCSRC;
RCC->CR |= RCC_CR_PLLON; CRS->CFGR |= CRS_CFGR_SYNCSRC_1; // USB SOF selected as sync source
// select HSI48 as system clock source CRS->CR |= CRS_CR_AUTOTRIMEN; // enable auto trim
RCC->CFGR &= ~RCC_CFGR_SW; CRS->CR |= CRS_CR_CEN; // enable freq counter & block CRS->CFGR as read-only
RCC->CFGR |= RCC_CFGR_SW_HSI48; RCC->CFGR |= RCC_CFGR_SW;
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI48){}
} }
#endif #endif
@ -200,14 +199,15 @@ TRUE_INLINE void StartHSI48(){
/************************* ADC *************************/ /************************* ADC *************************/
/* inner termometer calibration values /* inner termometer calibration values
* Temp = (Vsense - V30)/Avg_Slope + 30 * Temp = (V30 - Vsense)/Avg_Slope + 30
* Avg_Slope = (V110 - V30) / (110 - 30) * Avg_Slope = (V30 - V110) / (110 - 30)
*/ */
#define TEMP110_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7C2)) #define TEMP110_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7C2))
#define TEMP30_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7B8)) #define TEMP30_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7B8))
// VDDA_Actual = 3.3V * VREFINT_CAL / average vref value // VDDA_Actual = 3.3V * VREFINT_CAL / average vref value
#define VREFINT_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7BA)) #define VREFINT_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7BA))
#define VDD_CALIB ((uint16_t) (330))
#define VDD_APPLI ((uint16_t) (300))
/************************* USART *************************/ /************************* USART *************************/
@ -215,6 +215,12 @@ TRUE_INLINE void StartHSI48(){
// set address/character match value // set address/character match value
#define USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT) #define USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT)
/************************* IWDG *************************/
#define IWDG_REFRESH (uint32_t)(0x0000AAAA)
#define IWDG_WRITE_ACCESS (uint32_t)(0x00005555)
#define IWDG_START (uint32_t)(0x0000CCCC)
//#define do{}while(0) //#define do{}while(0)

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STM32/inc/gen042 Executable file → Normal file
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STM32/src4multiplexer/tsys01.bin Executable file → Normal file
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@ -72,8 +72,6 @@ static void logT(_U_ int signo){
int main(int argc, char **argv){ int main(int argc, char **argv){
initial_setup(); initial_setup();
G = parse_args(argc, argv); G = parse_args(argc, argv);
if(G->rest_pars_num)
openlogfile(G->rest_pars[0]);
if(G->makegraphs && !G->savepath){ if(G->makegraphs && !G->savepath){
ERRX(_("Point the path to graphical files")); ERRX(_("Point the path to graphical files"));
} }
@ -95,6 +93,8 @@ int main(int argc, char **argv){
return 1; return 1;
} }
if(runningproc) ERRX("Found running process, pid=%d.", runningproc); if(runningproc) ERRX("Found running process, pid=%d.", runningproc);
if(G->rest_pars_num)
openlogfile(G->rest_pars[0]);
// ignore almost all possible signals // ignore almost all possible signals
for(int sig = 0; sig < 256; ++sig) signal(sig, repsig); for(int sig = 0; sig < 256; ++sig) signal(sig, repsig);
signal(SIGTERM, signals); // kill (-15) - quit signal(SIGTERM, signals); // kill (-15) - quit

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src/netdaemon/plot Executable file → Normal file
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