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/*
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* usart.c
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*
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* Copyright 2017 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <string.h>
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#include "stm32f0.h"
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#include "hardware.h"
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#include "usart.h"
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extern volatile uint32_t Tms;
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static int datalen[2] = {0,0}; // received data line length (including '\n')
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volatile int linerdy = 0, // received data ready
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dlen = 0, // length of data (including '\n') in current buffer
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bufovr = 0, // input buffer overfull
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txrdy = 1 // transmission done
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;
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int rbufno = 0; // current rbuf number
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static char rbuf[UARTBUFSZ][2], tbuf[UARTBUFSZ]; // receive & transmit buffers
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static char *recvdata = NULL;
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/**
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* return length of received data (without trailing zero
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*/
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int usart_getline(char **line){
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if(bufovr){
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bufovr = 0;
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linerdy = 0;
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return 0;
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}
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*line = recvdata;
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linerdy = 0;
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return dlen;
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}
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TXstatus usart_send(const char *str, int len){
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if(!txrdy) return LINE_BUSY;
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if(len > UARTBUFSZ) return STR_TOO_LONG;
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txrdy = 0;
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memcpy(tbuf, str, len);
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#if USARTNUM == 2
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DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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DMA1_Channel4->CNDTR = len;
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DMA1_Channel4->CCR |= DMA_CCR_EN; // start transmission
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#elif USARTNUM == 1
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DMA1_Channel2->CCR &= ~DMA_CCR_EN;
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DMA1_Channel2->CNDTR = len;
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DMA1_Channel2->CCR |= DMA_CCR_EN;
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#else
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#error "Not implemented"
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#endif
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return ALL_OK;
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}
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TXstatus usart_send_blocking(const char *str, int len){
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if(!txrdy) return LINE_BUSY;
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int i;
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bufovr = 0;
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for(i = 0; i < len; ++i){
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USARTX -> TDR = *str++;
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while(!(USARTX->ISR & USART_ISR_TXE)){IWDG->KR = IWDG_REFRESH;};
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}
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return ALL_OK;
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}
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void usart_send_blck(const char *str){
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while(!txrdy){IWDG->KR = IWDG_REFRESH;}
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bufovr = 0;
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while(*str){
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USARTX -> TDR = *str++;
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while(!(USARTX->ISR & USART_ISR_TXE)){IWDG->KR = IWDG_REFRESH;};
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}
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}
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void usart_setup(){
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// Nucleo's USART2 connected to VCP proxy of st-link
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#if USARTNUM == 2
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// setup pins: PA2 (Tx - AF1), PA15 (Rx - AF1)
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// AF mode (AF1)
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GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER2|GPIO_MODER_MODER15))\
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| (GPIO_MODER_MODER2_AF | GPIO_MODER_MODER15_AF);
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GPIOA->AFR[0] = (GPIOA->AFR[0] &~GPIO_AFRH_AFRH2) | 1 << (2 * 4); // PA2
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GPIOA->AFR[1] = (GPIOA->AFR[1] &~GPIO_AFRH_AFRH7) | 1 << (7 * 4); // PA15
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// DMA: Tx - Ch4
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DMA1_Channel4->CPAR = (uint32_t) &USART2->TDR; // periph
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DMA1_Channel4->CMAR = (uint32_t) tbuf; // mem
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DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
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// Tx CNDTR set @ each transmission due to data size
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NVIC_SetPriority(DMA1_Channel4_5_IRQn, 3);
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NVIC_EnableIRQ(DMA1_Channel4_5_IRQn);
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NVIC_SetPriority(USART2_IRQn, 0);
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// setup usart2
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RCC->APB1ENR |= RCC_APB1ENR_USART2EN; // clock
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// oversampling by16, 115200bps (fck=48mHz)
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//USART2_BRR = 0x1a1; // 48000000 / 115200
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USART2->BRR = 480000 / 1152;
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USART2->CR3 = USART_CR3_DMAT; // enable DMA Tx
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USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
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while(!(USART2->ISR & USART_ISR_TC)); // polling idle frame Transmission
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USART2->ICR |= USART_ICR_TCCF; // clear TC flag
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USART2->CR1 |= USART_CR1_RXNEIE;
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NVIC_EnableIRQ(USART2_IRQn);
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// USART1 of main board
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#elif USARTNUM == 1
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// PA9 - Tx, PA10 - Rx (AF1)
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GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER9 | GPIO_MODER_MODER10))\
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| (GPIO_MODER_MODER9_AF | GPIO_MODER_MODER10_AF);
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GPIOA->AFR[1] = (GPIOA->AFR[1] & ~(GPIO_AFRH_AFRH1 | GPIO_AFRH_AFRH2)) |
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1 << (1 * 4) | 1 << (2 * 4); // PA9, PA10
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// USART1 Tx DMA - Channel2 (default value in SYSCFG_CFGR1)
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DMA1_Channel2->CPAR = (uint32_t) &USART1->TDR; // periph
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DMA1_Channel2->CMAR = (uint32_t) tbuf; // mem
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DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
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// Tx CNDTR set @ each transmission due to data size
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NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3);
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NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
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NVIC_SetPriority(USART1_IRQn, 0);
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// setup usart1
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
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USART1->BRR = 480000 / 1152;
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USART1->CR3 = USART_CR3_DMAT; // enable DMA Tx
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USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
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while(!(USART1->ISR & USART_ISR_TC)); // polling idle frame Transmission
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USART1->ICR |= USART_ICR_TCCF; // clear TC flag
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USART1->CR1 |= USART_CR1_RXNEIE;
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NVIC_EnableIRQ(USART1_IRQn);
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#else
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#error "Not implemented"
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#endif
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}
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#if USARTNUM == 2
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void usart2_isr(){
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// USART1
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#elif USARTNUM == 1
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void usart1_isr(){
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#else
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#error "Not implemented"
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#endif
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#ifdef CHECK_TMOUT
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static uint32_t tmout = 0;
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#endif
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if(USARTX->ISR & USART_ISR_RXNE){ // RX not emty - receive next char
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#ifdef CHECK_TMOUT
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if(tmout && Tms >= tmout){ // set overflow flag
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bufovr = 1;
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datalen[rbufno] = 0;
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}
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tmout = Tms + TIMEOUT_MS;
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if(!tmout) tmout = 1; // prevent 0
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#endif
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// read RDR clears flag
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uint8_t rb = USARTX->RDR;
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if(datalen[rbufno] < UARTBUFSZ){ // put next char into buf
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rbuf[rbufno][datalen[rbufno]++] = rb;
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if(rb == '\n'){ // got newline - line ready
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linerdy = 1;
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dlen = datalen[rbufno];
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recvdata = rbuf[rbufno];
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// prepare other buffer
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rbufno = !rbufno;
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datalen[rbufno] = 0;
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#ifdef CHECK_TMOUT
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// clear timeout at line end
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tmout = 0;
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#endif
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}
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}else{ // buffer overrun
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bufovr = 1;
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datalen[rbufno] = 0;
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#ifdef CHECK_TMOUT
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tmout = 0;
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#endif
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}
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}
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}
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#if USARTNUM == 2
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void dma1_channel4_5_isr(){
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if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx
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DMA1->IFCR |= DMA_IFCR_CTCIF4; // clear TC flag
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txrdy = 1;
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}
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}
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// USART1
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#elif USARTNUM == 1
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void dma1_channel2_3_isr(){
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if(DMA1->ISR & DMA_ISR_TCIF2){ // Tx
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DMA1->IFCR |= DMA_IFCR_CTCIF2; // clear TC flag
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txrdy = 1;
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}
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}
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#else
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#error "Not implemented"
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#endif
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@ -1,49 +0,0 @@
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/*
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* usart.h
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*
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* Copyright 2017 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#pragma once
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#ifndef __USART_H__
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#define __USART_H__
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// input and output buffers size
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#define UARTBUFSZ (64)
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// timeout between data bytes
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#ifndef TIMEOUT_MS
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#define TIMEOUT_MS (1500)
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#endif
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typedef enum{
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ALL_OK,
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LINE_BUSY,
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STR_TOO_LONG
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} TXstatus;
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#define usartrx() (linerdy)
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#define usartovr() (bufovr)
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extern volatile int linerdy, bufovr, txrdy;
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void usart_setup();
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int usart_getline(char **line);
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TXstatus usart_send(const char *str, int len);
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TXstatus usart_send_blocking(const char *str, int len);
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void usart_send_blck(const char *str);
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#endif // __USART_H__
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@ -1,106 +0,0 @@
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/*
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* geany_encoding=koi8-r
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* usb_defs.h
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*
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* Copyright 2018 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
|
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||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
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||||||
* (at your option) any later version.
|
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*
|
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||||||
* This program is distributed in the hope that it will be useful,
|
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||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
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||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
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||||||
* MA 02110-1301, USA.
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*
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*/
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#pragma once
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#ifndef __USB_DEFS_H__
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#define __USB_DEFS_H__
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#include <stm32f0xx.h>
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/**
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* Buffers size definition
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**/
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// !!! when working with CAN bus change USB_BTABLE_SIZE to 768 !!!
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#define USB_BTABLE_SIZE 1024
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// first 64 bytes of USB_BTABLE are registers!
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#define USB_EP0_BASEADDR 64
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// for USB FS EP0 buffers are from 8 to 64 bytes long (64 for PL2303)
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#define USB_EP0_BUFSZ 64
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// USB transmit buffer size (64 for PL2303)
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#define USB_TXBUFSZ 64
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// USB receive buffer size (64 for PL2303)
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#define USB_RXBUFSZ 64
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#define USB_BTABLE_BASE 0x40006000
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#undef USB_BTABLE
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#define USB_BTABLE ((USB_BtableDef *)(USB_BTABLE_BASE))
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#define USB_ISTR_EPID 0x0000000F
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#define USB_FNR_LSOF_0 0x00000800
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#define USB_FNR_lSOF_1 0x00001000
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#define USB_LPMCSR_BESL_0 0x00000010
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#define USB_LPMCSR_BESL_1 0x00000020
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#define USB_LPMCSR_BESL_2 0x00000040
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#define USB_LPMCSR_BESL_3 0x00000080
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#define USB_EPnR_CTR_RX 0x00008000
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#define USB_EPnR_DTOG_RX 0x00004000
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#define USB_EPnR_STAT_RX 0x00003000
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#define USB_EPnR_STAT_RX_0 0x00001000
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#define USB_EPnR_STAT_RX_1 0x00002000
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#define USB_EPnR_SETUP 0x00000800
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#define USB_EPnR_EP_TYPE 0x00000600
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#define USB_EPnR_EP_TYPE_0 0x00000200
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#define USB_EPnR_EP_TYPE_1 0x00000400
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#define USB_EPnR_EP_KIND 0x00000100
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#define USB_EPnR_CTR_TX 0x00000080
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#define USB_EPnR_DTOG_TX 0x00000040
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#define USB_EPnR_STAT_TX 0x00000030
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#define USB_EPnR_STAT_TX_0 0x00000010
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#define USB_EPnR_STAT_TX_1 0x00000020
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#define USB_EPnR_EA 0x0000000F
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#define USB_COUNTn_RX_BLSIZE 0x00008000
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#define USB_COUNTn_NUM_BLOCK 0x00007C00
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#define USB_COUNTn_RX 0x0000003F
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||||||
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#define USB_TypeDef USB_TypeDef_custom
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typedef struct{
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__IO uint32_t EPnR[8];
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__IO uint32_t RESERVED1;
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__IO uint32_t RESERVED2;
|
|
||||||
__IO uint32_t RESERVED3;
|
|
||||||
__IO uint32_t RESERVED4;
|
|
||||||
__IO uint32_t RESERVED5;
|
|
||||||
__IO uint32_t RESERVED6;
|
|
||||||
__IO uint32_t RESERVED7;
|
|
||||||
__IO uint32_t RESERVED8;
|
|
||||||
__IO uint32_t CNTR;
|
|
||||||
__IO uint32_t ISTR;
|
|
||||||
__IO uint32_t FNR;
|
|
||||||
__IO uint32_t DADDR;
|
|
||||||
__IO uint32_t BTABLE;
|
|
||||||
__IO uint32_t LPMCSR;
|
|
||||||
__IO uint32_t BCDR;
|
|
||||||
} USB_TypeDef;
|
|
||||||
|
|
||||||
typedef struct{
|
|
||||||
__IO uint16_t USB_ADDR_TX;
|
|
||||||
__IO uint16_t USB_COUNT_TX;
|
|
||||||
__IO uint16_t USB_ADDR_RX;
|
|
||||||
__IO uint16_t USB_COUNT_RX;
|
|
||||||
} USB_EPDATA_TypeDef;
|
|
||||||
|
|
||||||
typedef struct{
|
|
||||||
__IO USB_EPDATA_TypeDef EP[8];
|
|
||||||
} USB_BtableDef;
|
|
||||||
|
|
||||||
#endif // __USB_DEFS_H__
|
|
||||||
Loading…
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Reference in New Issue
Block a user