From 32fef9cc9fa219f48eff08dfaf30c5a638a5f196 Mon Sep 17 00:00:00 2001 From: eddyem Date: Sun, 27 May 2018 18:44:28 +0300 Subject: [PATCH] add degrC calculation --- STM32/Tcalc/Makefile | 144 ++ STM32/Tcalc/Readme.md | 15 + STM32/Tcalc/hardware.c | 66 + STM32/Tcalc/hardware.h | 61 + STM32/Tcalc/i2c.c | 99 + STM32/Tcalc/i2c.h | 39 + STM32/Tcalc/ld/stm32f042k.ld | 12 + STM32/Tcalc/main.c | 253 ++ STM32/Tcalc/tsys01.bin | Bin 0 -> 11108 bytes STM32/Tcalc/tsys01.c.tags | 4407 ++++++++++++++++++++++++++++++++++ STM32/Tcalc/tsys01.geany | 50 + STM32/Tcalc/usart.c | 173 ++ STM32/Tcalc/usart.h | 53 + 13 files changed, 5372 insertions(+) create mode 100644 STM32/Tcalc/Makefile create mode 100644 STM32/Tcalc/Readme.md create mode 100644 STM32/Tcalc/hardware.c create mode 100644 STM32/Tcalc/hardware.h create mode 100644 STM32/Tcalc/i2c.c create mode 100644 STM32/Tcalc/i2c.h create mode 100644 STM32/Tcalc/ld/stm32f042k.ld create mode 100644 STM32/Tcalc/main.c create mode 100755 STM32/Tcalc/tsys01.bin create mode 100644 STM32/Tcalc/tsys01.c.tags create mode 100644 STM32/Tcalc/tsys01.geany create mode 100644 STM32/Tcalc/usart.c create mode 100644 STM32/Tcalc/usart.h diff --git a/STM32/Tcalc/Makefile b/STM32/Tcalc/Makefile new file mode 100644 index 0000000..7162a71 --- /dev/null +++ b/STM32/Tcalc/Makefile @@ -0,0 +1,144 @@ +BINARY = tsys01 +BOOTPORT ?= /dev/ttyUSB0 +BOOTSPEED ?= 9600 +# MCU FAMILY +FAMILY = F0 +# MCU code +MCU = F042x6 +# hardware definitions +#DEFS := -DUSARTNUM=2 -DI2CPINS=A9A10 +DEFS += -DEBUG +# change this linking script depending on particular MCU model, +# for example, if you have STM32F103VBT6, you should write: +LDSCRIPT = ld/stm32f042k.ld + +INDEPENDENT_HEADERS= + +FP_FLAGS ?= -msoft-float +ASM_FLAGS = -mthumb -mcpu=cortex-m0 -march=armv6-m -mtune=cortex-m0 +ARCH_FLAGS = $(ASM_FLAGS) $(FP_FLAGS) + +############################################################################### +# Executables +OPREFIX ?= /opt/bin/arm-none-eabi +#PREFIX ?= /usr/x86_64-pc-linux-gnu/arm-none-eabi/gcc-bin/7.3.0/arm-none-eabi +PREFIX ?= $(OPREFIX) + +RM := rm -f +RMDIR := rmdir +CC := $(PREFIX)-gcc +LD := $(PREFIX)-gcc +AR := $(PREFIX)-ar +AS := $(PREFIX)-as +OBJCOPY := $(OPREFIX)-objcopy +OBJDUMP := $(OPREFIX)-objdump +GDB := $(OPREFIX)-gdb +STFLASH := $(shell which st-flash) +STBOOT := $(shell which stm32flash) + +############################################################################### +# Source files +OBJDIR = mk +LDSCRIPT ?= $(BINARY).ld +SRC := $(wildcard *.c) +OBJS := $(addprefix $(OBJDIR)/, $(SRC:%.c=%.o)) +STARTUP = $(OBJDIR)/startup.o +OBJS += $(STARTUP) +DEPS := $(OBJS:.o=.d) + +INC_DIR ?= ../inc + +INCLUDE := -I$(INC_DIR)/F0 -I$(INC_DIR)/cm +LIB_DIR := $(INC_DIR)/ld + +############################################################################### +# C flags +CFLAGS += -O2 -g -MD -D__thumb2__=1 +CFLAGS += -Wall -Wextra -Wshadow -Wimplicit-function-declaration +CFLAGS += -Wredundant-decls $(INCLUDE) +# -Wmissing-prototypes -Wstrict-prototypes +CFLAGS += -fno-common -ffunction-sections -fdata-sections + +############################################################################### +# Linker flags +LDFLAGS += --static -nostartfiles +#--specs=nano.specs +LDFLAGS += -L$(LIB_DIR) +LDFLAGS += -T$(LDSCRIPT) +LDFLAGS += -Wl,-Map=$(OBJDIR)/$(BINARY).map +LDFLAGS += -Wl,--gc-sections + +############################################################################### +# Used libraries +LDLIBS += -Wl,--start-group -lc -lgcc -Wl,--end-group +LDLIBS += $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) + +DEFS += -DSTM32$(FAMILY) -DSTM32$(MCU) + +#.SUFFIXES: .elf .bin .hex .srec .list .map .images +#.SECONDEXPANSION: +#.SECONDARY: + +ELF := $(OBJDIR)/$(BINARY).elf +LIST := $(OBJDIR)/$(BINARY).list +BIN := $(BINARY).bin +HEX := $(BINARY).hex + +all: bin list + +elf: $(ELF) +bin: $(BIN) +hex: $(HEX) +list: $(LIST) + +ifneq ($(MAKECMDGOALS),clean) +-include $(DEPS) +endif + +$(OBJDIR): + mkdir $(OBJDIR) + +$(STARTUP): $(INC_DIR)/startup/vector.c + $(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $< + +$(OBJDIR)/%.o: %.c + @echo " CC $<" + $(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $< + +#$(OBJDIR)/%.d: %.c $(OBJDIR) +# $(CC) -MM -MG $< | sed -e 's,^\([^:]*\)\.o[ ]*:,$(@D)/\1.o $(@D)/\1.d:,' >$@ + +$(BIN): $(ELF) + @echo " OBJCOPY $(BIN)" + $(OBJCOPY) -Obinary $(ELF) $(BIN) + +$(HEX): $(ELF) + @echo " OBJCOPY $(HEX)" + $(OBJCOPY) -Oihex $(ELF) $(HEX) + +$(LIST): $(ELF) + @echo " OBJDUMP $(LIST)" + $(OBJDUMP) -S $(ELF) > $(LIST) + +$(ELF): $(OBJDIR) $(OBJS) + @echo " LD $(ELF)" + $(LD) $(LDFLAGS) $(ARCH_FLAGS) $(OBJS) $(LDLIBS) -o $(ELF) + +clean: + @echo " CLEAN" + $(RM) $(OBJS) $(DEPS) $(ELF) $(HEX) $(LIST) $(OBJDIR)/*.map + @rmdir $(OBJDIR) 2>/dev/null || true + + +flash: $(BIN) + @echo " FLASH $(BIN)" + $(STFLASH) write $(BIN) 0x8000000 + +boot: $(BIN) + @echo " LOAD $(BIN) through bootloader" + $(STBOOT) -b$(BOOTSPEED) $(BOOTPORT) -w $(BIN) + +gentags: + CFLAGS="$(CFLAGS) $(DEFS)" geany -g $(BINARY).c.tags *[hc] 2>/dev/null + +.PHONY: clean flash boot gentags diff --git a/STM32/Tcalc/Readme.md b/STM32/Tcalc/Readme.md new file mode 100644 index 0000000..8bb94b6 --- /dev/null +++ b/STM32/Tcalc/Readme.md @@ -0,0 +1,15 @@ +# Check temperature on sensors pair and show values of T measured by USART. +USART speed 115200. Code for NUCLEO-042 + +### Serial interface commands (ends with '\n'): + +- **C** show coefficients for both thermosensors +- **D** detect seosors (reseting them) +- **H** switch I2C to high speed (100kHz) +- **L** switch I2C to low speed (default, 10kHz) +- **R** reset both sensors +- **T** get temperature in degrC + +### PINOUT +- I2C: PA9 (SCL) & PA10 (SDA) +- USART2: PA2 (Tx) & PA15 (Rx) diff --git a/STM32/Tcalc/hardware.c b/STM32/Tcalc/hardware.c new file mode 100644 index 0000000..cf7dbe7 --- /dev/null +++ b/STM32/Tcalc/hardware.c @@ -0,0 +1,66 @@ +/* + * geany_encoding=koi8-r + * hardware.c - hardware-dependent macros & functions + * + * Copyright 2018 Edward V. Emelianov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + */ + +#include "hardware.h" + +void gpio_setup(void){ + // Set green led (PB3) as output + RCC->AHBENR |= RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOAEN; + GPIOB->MODER = GPIO_MODER_MODER3_O; + // setup of multiplexer channel address bus: PA3..8 + GPIOA->MODER = GPIO_MODER_MODER3_O | GPIO_MODER_MODER4_O | GPIO_MODER_MODER5_O | + GPIO_MODER_MODER6_O | GPIO_MODER_MODER7_O | GPIO_MODER_MODER8_O; +} + +void i2c_setup(I2C_SPEED speed){ + I2C1->CR1 = 0; +#if I2CPINS == A9A10 +/* + * GPIO Resources: I2C1_SCL - PA9, I2C1_SDA - PA10 + * GPIOA->AFR[1] AF4 -- GPIOA->AFR[1] &= ~0xff0, GPIOA->AFR[1] |= 0x440 + */ + RCC->AHBENR |= RCC_AHBENR_GPIOAEN; // clock + GPIOA->AFR[1] &= ~0xff0; // alternate function F4 for PA9/PA10 + GPIOA->AFR[1] |= 0x440; + GPIOA->MODER &= ~(GPIO_MODER_MODER9 | GPIO_MODER_MODER10); + GPIOA->MODER |= GPIO_MODER_MODER9_AF | GPIO_MODER_MODER10_AF; // alternate function + GPIOA->OTYPER |= GPIO_OTYPER_OT_9 | GPIO_OTYPER_OT_10; // opendrain + //GPIOA->OTYPER |= GPIO_OTYPER_OT_10; // opendrain +#else // undefined +#error "Not implemented" +#endif + // I2C + RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; // timing + RCC->CFGR3 |= RCC_CFGR3_I2C1SW; // use sysclock for timing + if(speed == LOW_SPEED){ // 10kHz + // PRESC=B, SCLDEL=4, SDADEL=2, SCLH=0xC3, SCLL=0xC7 + //I2C1->TIMINGR = (0xB<<28) | (4<<20) | (2<<16) | (0xC3<<8) | (0xC7); + I2C1->TIMINGR = (0xB<<28) | (4<<20) | (2<<16) | (0xC3<<8) | (0xB0); + }else{ // 100kHz + // Clock = 6MHz, 0.16(6)us, need 5us (*30) + // PRESC=4 (f/5), SCLDEL=0 (t_SU=5/6us), SDADEL=0 (t_HD=5/6us), SCLL,SCLH=14 (2.(3)us) + //I2C1->TIMINGR = (4<<28) | (14<<8) | (14); // 0x40000e0e + I2C1->TIMINGR = (0xB<<28) | (4<<20) | (2<<16) | (0x12<<8) | (0x11); + } + I2C1->CR1 = I2C_CR1_PE;// | I2C_CR1_RXIE; // Enable I2C & (interrupt on receive - not supported yet) +} diff --git a/STM32/Tcalc/hardware.h b/STM32/Tcalc/hardware.h new file mode 100644 index 0000000..24f8041 --- /dev/null +++ b/STM32/Tcalc/hardware.h @@ -0,0 +1,61 @@ +/* + * geany_encoding=koi8-r + * hardware.h + * + * Copyright 2018 Edward V. Emelianov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + */ + +#include "stm32f0.h" + +#define LED0_port GPIOB +#define LED0_pin (1<<3) + +#ifndef USARTNUM +#define USARTNUM 2 +#endif + +#define CONCAT(a,b) a ## b +#define STR_HELPER(s) #s +#define STR(s) STR_HELPER(s) + +#define FORMUSART(X) CONCAT(USART, X) +#define USARTX FORMUSART(USARTNUM) + +#ifndef I2CPINS +#define I2CPINS A9A10 +#endif + +#ifndef LED1_port +#define LED1_port LED0_port +#endif +#ifndef LED1_pin +#define LED1_pin LED0_pin +#endif +#define LED_blink(x) pin_toggle(x ## _port, x ## _pin) + +// set active channel number +#define MUL_ADDRESS(x) do{GPIOA->BSRR = (0x1F8 << 16) | (x << 3);}while(0) + +typedef enum{ + LOW_SPEED, + HIGH_SPEED +} I2C_SPEED; + +void gpio_setup(void); +void i2c_setup(I2C_SPEED speed); diff --git a/STM32/Tcalc/i2c.c b/STM32/Tcalc/i2c.c new file mode 100644 index 0000000..11412df --- /dev/null +++ b/STM32/Tcalc/i2c.c @@ -0,0 +1,99 @@ +/* + * geany_encoding=koi8-r + * i2c.c + * + * Copyright 2017 Edward V. Emelianov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + */ +#include "stm32f0.h" +#include "hardware.h" +#include "i2c.h" + +/** + * I2C for TSYS01 + * Speed <= 400kHz (200) + * t_SCLH > 21ns + * t_SCLL > 21ns + * while reading, sends NACK + * after reading get 24bits of T value, we need upper 2 bytes: ADC16 = ADC>>8 + * T = (-2) * k4 * 10^{-21} * ADC16^4 + * + 4 * k3 * 10^{-16} * ADC16^3 + * + (-2) * k2 * 10^{-11} * ADC16^2 + * + 1 * k1 * 10^{-6} * ADC16 + * +(-1.5)* k0 * 10^{-2} + * All coefficiens are in registers: + * k4 - 0xA2, k3 - 0xA4, k2 - 0xA6, k1 - 0xA8, k0 - 0xAA + */ + +extern volatile uint32_t Tms; +static uint32_t cntr; + +/** + * write command byte to I2C + * @param addr - device address (TSYS01_ADDR0 or TSYS01_ADDR1) + * @param data - byte to write + * @return 0 if error + */ +uint8_t write_i2c(uint8_t addr, uint8_t data){ + cntr = Tms; + while(I2C1->ISR & I2C_ISR_BUSY) if(Tms - cntr > I2C_TIMEOUT) return 0; // check busy + cntr = Tms; + while(I2C1->CR2 & I2C_CR2_START) if(Tms - cntr > I2C_TIMEOUT) return 0; // check start + I2C1->CR2 = 1<<16 | addr | I2C_CR2_AUTOEND; // 1 byte, autoend + // now start transfer + I2C1->CR2 |= I2C_CR2_START; + cntr = Tms; + while(!(I2C1->ISR & I2C_ISR_TXIS)){ // ready to transmit + if(I2C1->ISR & I2C_ISR_NACKF){ + I2C1->ICR |= I2C_ICR_NACKCF; + return 0; + } + if(Tms - cntr > I2C_TIMEOUT) return 0; + } + I2C1->TXDR = data; // send data + return 1; +} + +/** + * read nbytes (2 or 3) of data from I2C line + * @return 1 if all OK, 0 if NACK or no device found + */ +uint8_t read_i2c(uint8_t addr, uint32_t *data, uint8_t nbytes){ + uint32_t result = 0; + cntr = Tms; + while(I2C1->ISR & I2C_ISR_BUSY) if(Tms - cntr > 5) return 0; // check busy + cntr = Tms; + while(I2C1->CR2 & I2C_CR2_START) if(Tms - cntr > 5) return 0; // check start + // read N bytes + I2C1->CR2 = (nbytes<<16) | addr | 1 | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN; + I2C1->CR2 |= I2C_CR2_START; + uint8_t i; + cntr = Tms; + for(i = 0; i < nbytes; ++i){ + while(!(I2C1->ISR & I2C_ISR_RXNE)){ // wait for data + if(I2C1->ISR & I2C_ISR_NACKF){ + I2C1->ICR |= I2C_ICR_NACKCF; + return 0; + } + if(Tms - cntr > 5) return 0; + } + result = (result << 8) | I2C1->RXDR; + } + *data = result; + return 1; + } diff --git a/STM32/Tcalc/i2c.h b/STM32/Tcalc/i2c.h new file mode 100644 index 0000000..da481b7 --- /dev/null +++ b/STM32/Tcalc/i2c.h @@ -0,0 +1,39 @@ +/* + * geany_encoding=koi8-r + * i2c.h + * + * Copyright 2017 Edward V. Emelianov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + * + */ + +// timeout in ms +#define I2C_TIMEOUT (15) +// CSB=1, address 1110110 +#define TSYS01_ADDR0 (0x76 << 1) +// CSB=0, address 1110111 +#define TSYS01_ADDR1 (0x77 << 1) +// registers: reset, read ADC value, start converstion, sart of PROM +#define TSYS01_RESET (0x1E) +#define TSYS01_ADC_READ (0x00) +#define TSYS01_START_CONV (0x48) +#define TSYS01_PROM_ADDR0 (0xA0) +// conversion time = 10ms +#define CONV_TIME (10) + +uint8_t read_i2c(uint8_t addr, uint32_t *data, uint8_t nbytes); +uint8_t write_i2c(uint8_t addr, uint8_t data); diff --git a/STM32/Tcalc/ld/stm32f042k.ld b/STM32/Tcalc/ld/stm32f042k.ld new file mode 100644 index 0000000..e747253 --- /dev/null +++ b/STM32/Tcalc/ld/stm32f042k.ld @@ -0,0 +1,12 @@ +/* Linker script for STM32F042x6, 32K flash, 6K RAM. */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 6K +} + +/* Include the common ld script. */ +INCLUDE stm32f0.ld + diff --git a/STM32/Tcalc/main.c b/STM32/Tcalc/main.c new file mode 100644 index 0000000..5533d58 --- /dev/null +++ b/STM32/Tcalc/main.c @@ -0,0 +1,253 @@ +/* + * main.c + * + * Copyright 2017 Edward V. Emelianoff + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include "hardware.h" +#include "usart.h" +#include "i2c.h" + +static uint16_t coefficients[2][5]; // Coefficients for given sensors +volatile uint32_t Tms = 0; + +/* Called when systick fires */ +void sys_tick_handler(void){ + ++Tms; +} + +// print 32bit unsigned int +void printu(uint32_t val){ + char buf[11], rbuf[10]; + int l = 0, bpos = 0; + if(!val){ + buf[0] = '0'; + l = 1; + }else{ + while(val){ + rbuf[l++] = val % 10 + '0'; + val /= 10; + } + int i; + bpos += l; + for(i = 0; i < l; ++i){ + buf[--bpos] = rbuf[i]; + } + } + while(LINE_BUSY == usart_send_blocking(buf, l+bpos)); +} + +void showcoeffs(uint8_t addr, uint8_t verb){ // show norm coefficiens + int i; + const uint8_t regs[5] = {0xAA, 0xA8, 0xA6, 0xA4, 0xA2}; // commands for coefficients + uint32_t K; + char numbr = (addr == TSYS01_ADDR0) ? '0' : '1'; + uint16_t *coef = coefficients[numbr-'0']; + for(i = 0; i < 5; ++i){ + if(write_i2c(addr, regs[i])){ + if(read_i2c(addr, &K, 2)){ + coef[i] = K; + if(verb){ + char b[4] = {'K', numbr, i+'0', '='}; + while(ALL_OK != usart_send_blocking(b, 4)); + printu(K); + newline(); + } + } + } + } +} + +/** + * Get temperature & calculate it by polinome + * T = (-2) * k4 * 10^{-21} * ADC16^4 + * + 4 * k3 * 10^{-16} * ADC16^3 + * + (-2) * k2 * 10^{-11} * ADC16^2 + * + 1 * k1 * 10^{-6} * ADC16 + * +(-1.5)* k0 * 10^{-2} + * k0*(-1.5e-2) + 1e-6*val*(k1 + 1e-5*val*(-2*k2 + 1e-5*val*(4*k3 + -2e-5*k4*val))) + * answer is in 100th + */ +uint8_t calc_t(uint32_t t, int i){ + if(coefficients[i][0] == 0){ + if(i == 0) showcoeffs(TSYS01_ADDR0, 0); + else showcoeffs(TSYS01_ADDR1, 0); + } + if(coefficients[i][0] == 0){ + SEND("no sensor\n"); + return 0; + } + if (t < 6500000 || t > 13000000) return 0; // wrong value - too small or too large + int j; + double d = (double)t/256., tmp = 0.; + // k0*(-1.5e-2) + 0.1*1e-5*val*(1*k1 + 1e-5*val*(-2.*k2 + 1e-5*val*(4*k3 + 1e-5*val*(-2*k4)))) + double mul[5] = {-1.5e-2, 1., -2., 4., -2.}; + for(j = 4; j > 0; --j){ + tmp += mul[j] * (double)coefficients[i][j]; + tmp *= 1e-5*d; + } + tmp = tmp/10. + mul[0]*coefficients[i][0]; + char b[8] = "TdegC0="; + if(i) b[5] = '1'; + while(ALL_OK != usart_send_blocking(b, 7)); + if(tmp < 0.){ + SEND("-"); + tmp = -tmp; + } + uint32_t x = (uint32_t)tmp; + if(x > 120) return 0; // wrong value + printu(x); + tmp -= x; + SEND("."); + x = (uint32_t)(tmp*100); + if(x < 10) SEND("0"); + printu(x); + newline(); + return 1; +} +/* +void calc_t(){ + int i; + for(i = 0; i < 2; ++i){ + if(!Tlast[i] || !coefficients[i][0]) continue; + int j; + int64_t d = Tlast[i], tmp = 0.; + // k0*(-1.5e-2) + 0.1*1e-5*val*(1*k1 + 1e-5*val*(-2.*k2 + 1e-5*val*(4*k3 + 1e-5*val*(-2*k4)))) + int8_t mul[5] = {0, 1, -2, 4, -2}; + for(j = 4; j > 0; --j){ + tmp /= 100000; + tmp += mul[j] * (double)coefficients[i][j]; + tmp *= d; + tmp >>= 8; // (/256) + } + tmp /= 10000; + uint16_t K = coefficients[i][0]; + K += K/2; + tmp -= K; + char b[8] = "TdegC0="; + if(i) b[5] = '1'; + while(ALL_OK != usart_send_blocking(b, 7)); + if(tmp < 0.){ + SEND("-"); + tmp = -tmp; + } + uint32_t x = (uint32_t)(tmp/100); + printu(x); + tmp -= 100*x; + SEND("."); + printu((uint32_t)tmp); + newline(); + } +}*/ + +int main(void){ + uint32_t lastT = 0; + int16_t L = 0; + uint32_t started0=0, started1=0; // time of measurements for given sensor started + char *txt; + sysreset(); + SysTick_Config(6000, 1); + gpio_setup(); + usart_setup(); + i2c_setup(LOW_SPEED); + // reset on start + write_i2c(TSYS01_ADDR0, TSYS01_RESET); + write_i2c(TSYS01_ADDR1, TSYS01_RESET); + + while (1){ + if(lastT > Tms || Tms - lastT > 499){ + LED_blink(LED0); + lastT = Tms; + } + if(started0 && Tms - started0 > CONV_TIME){ // poll sensor0 + if(write_i2c(TSYS01_ADDR0, TSYS01_ADC_READ)){ + uint32_t t; + if(read_i2c(TSYS01_ADDR0, &t, 3) && t){ + if(!calc_t(t, 0)) write_i2c(TSYS01_ADDR0, TSYS01_RESET); + started0 = 0; + } + } + } + if(started1 && Tms - started1 > CONV_TIME){ // poll sensor1 + if(write_i2c(TSYS01_ADDR1, TSYS01_ADC_READ)){ + uint32_t t; + if(read_i2c(TSYS01_ADDR1, &t, 3) && t){ + if(!calc_t(t, 1)) write_i2c(TSYS01_ADDR1, TSYS01_RESET); + started1 = 0; + } + } + } + if(usartrx()){ // usart1 received data, store in in buffer + L = usart_getline(&txt); + char _1st = txt[0]; + if(L == 2 && txt[1] == '\n'){ + L = 0; + uint32_t tstart = Tms; + switch(_1st){ + case 'C': // 'C' - show coefficients + showcoeffs(TSYS01_ADDR0, 1); + showcoeffs(TSYS01_ADDR1, 1); + break; + case 'R': // 'R' - reset both + SEND("Reset\n"); + write_i2c(TSYS01_ADDR0, TSYS01_RESET); + write_i2c(TSYS01_ADDR1, TSYS01_RESET); + break; + case 'D': + if(write_i2c(TSYS01_ADDR0, TSYS01_RESET)) SEND("0"); + if(write_i2c(TSYS01_ADDR1, TSYS01_RESET)) SEND("1"); + newline(); + break; + case 'T': // 'T' - get temperature + if(tstart == 0) tstart = 1; + if(write_i2c(TSYS01_ADDR0, TSYS01_START_CONV)) started0 = tstart; + else{ + started0 = 0; + } + if(write_i2c(TSYS01_ADDR1, TSYS01_START_CONV)) started1 = tstart; + else{ + started1 = 0; + } + break; + case 'L': + i2c_setup(LOW_SPEED); + SEND("Low speed\n"); + break; + case 'H': + i2c_setup(HIGH_SPEED); + SEND("High speed\n"); + break; + default: // help + SEND("'C' - show coefficients\n" + "'D' - slave discovery\n" + "'R' - reset both\n" + "'T' - get raw temperature\n" + "'L' - low speed\n" + "'H' - high speed\n"); + break; + } + } + } + if(L){ // text waits for sending + while(LINE_BUSY == usart_send(txt, L)); + L = 0; + } + } + return 0; +} + diff --git a/STM32/Tcalc/tsys01.bin b/STM32/Tcalc/tsys01.bin new file mode 100755 index 0000000000000000000000000000000000000000..207b6d2c1ae65f0b879724a1f95a6df08e6337ec GIT binary patch literal 11108 zcma)i3wTt;+5daa+0AZtH*83N?4C_FXD_*s5R3*W7nQSTcE^wnAq1_EU|k@Q1&Sb8 zq+Uu2Sb=x}f;AT|w%UFwXekshCCSnrGiTWa zZ;#dKNvY`L=Pomod5dJXE+~e!dxVNUy%<`31EljZ=%8G_i39MIc8HaZ3QwrfGj~}# z&)RSI^ywEY&ze16Ua)wJ>z3tj!g#V^u|1rLHTKZsuAJ~zVLY*iI$gJflkc!^WLdjl zCh4y3MVTwiBy$NA>Q!UVvxsvGICkmb6wD85ofK{anT>CaC-Cn`VswUb@Zb^UAYYLg z=E^cryH2VDkm4OF@W4SRG)GE3oL6|RY_$tY0pi-%T;Vy@a4>!tyxgQxXmFZb5FfmF z6_j4R%0F#&DX{YLiz&{}Bj6UE`;mPGZC%J+Gk!I9-7aM?(uX?4J1Ct)-=oiXIy*KW zLx z>RYfr{yNrusq*e+l$E~5(r4-l>ey1;NGKHl6Y~{RyrYKJ-r<4ew6v`Gj_W+#cj#Q) zQxN~j*HCya0xjI6#M#XWelo-#{aQbvE22A?{mORQN`Fb?hu6$#qpxV_WN4Qm-8(xT zhK9b!$ zb&v+-l#g#ce{IFJSo4PqZd9E=0P!^!-7qaU3iQ}VI4ZoxtjOV7EV;vw)c+J(7;WYT zPa#ahamHMP!l{v={FIA2SYHUek7$Xr$1h2!efxPH%)s7q@zewx)lyFdht$H9p6p64Io5N@HieKl+i?lvZ=C0(CEBNG+vAt2wK2nOb|>33 zdK@WdZGT9vlT-x8P-J)F@rg@da6CI7R?qxb_`@w7gQu=XN0MK1-v7zmmmYp~Dz+=d z1h7D!gwF|>I9I&m19~&9q5=A1Fxnx8Uo1BfF;pAgbdZ;8Lt^;(a$Xkkc_{g;4gVIO zR;f1h{_>6F{l(&n=UDv`aJPkOS8OA-OZHc!Up*T8KQpTq|FdL5Igh&+gm(%iQX6V? z+ru?FHb$d+r_LT8tz1wAS8W*kVq0z+Yh!UY&kBY!Wn=Nzkxo}jMQgCNd|pUco|@v| z9VRmo7K5ibB;X!Sob9}bK6W0^O7C2Bx;~X4UUtsu`V5~}odZt`eJ}_GZL}!}`K=VK zCbZM7vx~!f6@AbDa~Fpb*R(sD6;p4JE}*r`GIeIz=-NRlsF^e`niz(w1hqKa=P(sJ zdYE76RD~9Y+eK6H#GZN75r*PkHH@CS>zwWowD1#VsxU!SUAWr6I>!|r#ho^&K~krW z2BGkTD!93)nTFCiD11-lTA;971y|y1#U=FZ!nY!*e<{Sf2mgw_*bLsrUVlsWVkJHH zI+EILdgw7XpuSXzgrFVwrV6xR({T7{)^>W~e03=Y}wp~0}mu~CXZ-A>DsbJ;X# zfc4G?e1vXL%2Cf;8R9=46kxt{lTV>_iYRZVvo*FNDHlzyYf!S1luR@Z>n>a{yC!1Y z)MVW>ZD_m&I8!5=2hMXI=B*Kk-*B!-<6K^B>&CY62OYP+H>b^%o5+7GNB(yp%8|5?@_PB)-OY(3zNkIgofcvEj8udK99o zvH;*TL?__c$6^+X4F_>Q)#E;qF;!xkkBRM_a!ji`8ogqLWA?bPmlvX$;dY0$czn

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+GPIO_BRR_BR_11Ì65536Ö0 +GPIO_BRR_BR_12Ì65536Ö0 +GPIO_BRR_BR_13Ì65536Ö0 +GPIO_BRR_BR_14Ì65536Ö0 +GPIO_BRR_BR_15Ì65536Ö0 +GPIO_BRR_BR_2Ì65536Ö0 +GPIO_BRR_BR_3Ì65536Ö0 +GPIO_BRR_BR_4Ì65536Ö0 +GPIO_BRR_BR_5Ì65536Ö0 +GPIO_BRR_BR_6Ì65536Ö0 +GPIO_BRR_BR_7Ì65536Ö0 +GPIO_BRR_BR_8Ì65536Ö0 +GPIO_BRR_BR_9Ì65536Ö0 +GPIO_BSRR_BR_0Ì65536Ö0 +GPIO_BSRR_BR_1Ì65536Ö0 +GPIO_BSRR_BR_10Ì65536Ö0 +GPIO_BSRR_BR_11Ì65536Ö0 +GPIO_BSRR_BR_12Ì65536Ö0 +GPIO_BSRR_BR_13Ì65536Ö0 +GPIO_BSRR_BR_14Ì65536Ö0 +GPIO_BSRR_BR_15Ì65536Ö0 +GPIO_BSRR_BR_2Ì65536Ö0 +GPIO_BSRR_BR_3Ì65536Ö0 +GPIO_BSRR_BR_4Ì65536Ö0 +GPIO_BSRR_BR_5Ì65536Ö0 +GPIO_BSRR_BR_6Ì65536Ö0 +GPIO_BSRR_BR_7Ì65536Ö0 +GPIO_BSRR_BR_8Ì65536Ö0 +GPIO_BSRR_BR_9Ì65536Ö0 +GPIO_BSRR_BS_0Ì65536Ö0 +GPIO_BSRR_BS_1Ì65536Ö0 +GPIO_BSRR_BS_10Ì65536Ö0 +GPIO_BSRR_BS_11Ì65536Ö0 +GPIO_BSRR_BS_12Ì65536Ö0 +GPIO_BSRR_BS_13Ì65536Ö0 +GPIO_BSRR_BS_14Ì65536Ö0 +GPIO_BSRR_BS_15Ì65536Ö0 +GPIO_BSRR_BS_2Ì65536Ö0 +GPIO_BSRR_BS_3Ì65536Ö0 +GPIO_BSRR_BS_4Ì65536Ö0 +GPIO_BSRR_BS_5Ì65536Ö0 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+SENDÌ131072Í(str)Ö0 +SET_BITÌ131072Í(REG,BIT)Ö0 +SIG_ATOMIC_MAXÌ65536Ö0 +SIG_ATOMIC_MINÌ65536Ö0 +SIG_ATOMIC_WIDTHÌ65536Ö0 +SIZE_MAXÌ65536Ö0 +SIZE_WIDTHÌ65536Ö0 +SPI1Ì65536Ö0 +SPI1_BASEÌ65536Ö0 +SPI2Ì65536Ö0 +SPI2_BASEÌ65536Ö0 +SPI_CR1_BIDIMODEÌ65536Ö0 +SPI_CR1_BIDIOEÌ65536Ö0 +SPI_CR1_BRÌ65536Ö0 +SPI_CR1_BR_0Ì65536Ö0 +SPI_CR1_BR_1Ì65536Ö0 +SPI_CR1_BR_2Ì65536Ö0 +SPI_CR1_CPHAÌ65536Ö0 +SPI_CR1_CPOLÌ65536Ö0 +SPI_CR1_CRCENÌ65536Ö0 +SPI_CR1_CRCLÌ65536Ö0 +SPI_CR1_CRCNEXTÌ65536Ö0 +SPI_CR1_LSBFIRSTÌ65536Ö0 +SPI_CR1_MSTRÌ65536Ö0 +SPI_CR1_RXONLYÌ65536Ö0 +SPI_CR1_SPEÌ65536Ö0 +SPI_CR1_SSIÌ65536Ö0 +SPI_CR1_SSMÌ65536Ö0 +SPI_CR2_DSÌ65536Ö0 +SPI_CR2_DS_0Ì65536Ö0 +SPI_CR2_DS_1Ì65536Ö0 +SPI_CR2_DS_2Ì65536Ö0 +SPI_CR2_DS_3Ì65536Ö0 +SPI_CR2_ERRIEÌ65536Ö0 +SPI_CR2_FRFÌ65536Ö0 +SPI_CR2_FRXTHÌ65536Ö0 +SPI_CR2_LDMARXÌ65536Ö0 +SPI_CR2_LDMATXÌ65536Ö0 +SPI_CR2_NSSPÌ65536Ö0 +SPI_CR2_RXDMAENÌ65536Ö0 +SPI_CR2_RXNEIEÌ65536Ö0 +SPI_CR2_SSOEÌ65536Ö0 +SPI_CR2_TXDMAENÌ65536Ö0 +SPI_CR2_TXEIEÌ65536Ö0 +SPI_CRCPR_CRCPOLYÌ65536Ö0 +SPI_DR_DRÌ65536Ö0 +SPI_I2SCFGR_CHLENÌ65536Ö0 +SPI_I2SCFGR_CKPOLÌ65536Ö0 +SPI_I2SCFGR_DATLENÌ65536Ö0 +SPI_I2SCFGR_DATLEN_0Ì65536Ö0 +SPI_I2SCFGR_DATLEN_1Ì65536Ö0 +SPI_I2SCFGR_I2SCFGÌ65536Ö0 +SPI_I2SCFGR_I2SCFG_0Ì65536Ö0 +SPI_I2SCFGR_I2SCFG_1Ì65536Ö0 +SPI_I2SCFGR_I2SEÌ65536Ö0 +SPI_I2SCFGR_I2SMODÌ65536Ö0 +SPI_I2SCFGR_I2SSTDÌ65536Ö0 +SPI_I2SCFGR_I2SSTD_0Ì65536Ö0 +SPI_I2SCFGR_I2SSTD_1Ì65536Ö0 +SPI_I2SCFGR_PCMSYNCÌ65536Ö0 +SPI_I2SPR_I2SDIVÌ65536Ö0 +SPI_I2SPR_MCKOEÌ65536Ö0 +SPI_I2SPR_ODDÌ65536Ö0 +SPI_RXCRCR_RXCRCÌ65536Ö0 +SPI_SR_BSYÌ65536Ö0 +SPI_SR_CHSIDEÌ65536Ö0 +SPI_SR_CRCERRÌ65536Ö0 +SPI_SR_FREÌ65536Ö0 +SPI_SR_FRLVLÌ65536Ö0 +SPI_SR_FRLVL_0Ì65536Ö0 +SPI_SR_FRLVL_1Ì65536Ö0 +SPI_SR_FTLVLÌ65536Ö0 +SPI_SR_FTLVL_0Ì65536Ö0 +SPI_SR_FTLVL_1Ì65536Ö0 +SPI_SR_MODFÌ65536Ö0 +SPI_SR_OVRÌ65536Ö0 +SPI_SR_RXNEÌ65536Ö0 +SPI_SR_TXEÌ65536Ö0 +SPI_SR_UDRÌ65536Ö0 +SPI_TXCRCR_TXCRCÌ65536Ö0 +SRAM_BASEÌ65536Ö0 +STM32F0Ì65536Ö0 +STM32F042x6Ì65536Ö0 +STRÌ131072Í(s)Ö0 +STR_HELPERÌ131072Í(s)Ö0 +STR_TOO_LONGÌ4Îanon_enum_3Ö0 +SYSCFGÌ65536Ö0 +SYSCFG_BASEÌ65536Ö0 +SYSCFG_CFGR1_ADC_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR1_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR1_I2C_FMP_I2C1Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_I2C2Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PA10Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PA9Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PB6Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PB7Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PB8Ì65536Ö0 +SYSCFG_CFGR1_I2C_FMP_PB9Ì65536Ö0 +SYSCFG_CFGR1_MEM_MODEÌ65536Ö0 +SYSCFG_CFGR1_MEM_MODE_0Ì65536Ö0 +SYSCFG_CFGR1_MEM_MODE_1Ì65536Ö0 +SYSCFG_CFGR1_PA11_PA12_RMPÌ65536Ö0 +SYSCFG_CFGR1_TIM16_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR1_TIM17_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR1_USART1RX_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR1_USART1TX_DMA_RMPÌ65536Ö0 +SYSCFG_CFGR2_LOCKUP_LOCKÌ65536Ö0 +SYSCFG_CFGR2_PVD_LOCKÌ65536Ö0 +SYSCFG_CFGR2_SRAM_PARITY_LOCKÌ65536Ö0 +SYSCFG_CFGR2_SRAM_PEÌ65536Ö0 +SYSCFG_CFGR2_SRAM_PEFÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0Ì65536Ö0 +SYSCFG_EXTICR1_EXTI0_PAÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0_PBÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0_PCÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0_PDÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0_PEÌ65536Ö0 +SYSCFG_EXTICR1_EXTI0_PFÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1Ì65536Ö0 +SYSCFG_EXTICR1_EXTI1_PAÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1_PBÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1_PCÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1_PDÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1_PEÌ65536Ö0 +SYSCFG_EXTICR1_EXTI1_PFÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2Ì65536Ö0 +SYSCFG_EXTICR1_EXTI2_PAÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2_PBÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2_PCÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2_PDÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2_PEÌ65536Ö0 +SYSCFG_EXTICR1_EXTI2_PFÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3Ì65536Ö0 +SYSCFG_EXTICR1_EXTI3_PAÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3_PBÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3_PCÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3_PDÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3_PEÌ65536Ö0 +SYSCFG_EXTICR1_EXTI3_PFÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4Ì65536Ö0 +SYSCFG_EXTICR2_EXTI4_PAÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4_PBÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4_PCÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4_PDÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4_PEÌ65536Ö0 +SYSCFG_EXTICR2_EXTI4_PFÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5Ì65536Ö0 +SYSCFG_EXTICR2_EXTI5_PAÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5_PBÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5_PCÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5_PDÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5_PEÌ65536Ö0 +SYSCFG_EXTICR2_EXTI5_PFÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6Ì65536Ö0 +SYSCFG_EXTICR2_EXTI6_PAÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6_PBÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6_PCÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6_PDÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6_PEÌ65536Ö0 +SYSCFG_EXTICR2_EXTI6_PFÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7Ì65536Ö0 +SYSCFG_EXTICR2_EXTI7_PAÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7_PBÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7_PCÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7_PDÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7_PEÌ65536Ö0 +SYSCFG_EXTICR2_EXTI7_PFÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10Ì65536Ö0 +SYSCFG_EXTICR3_EXTI10_PAÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10_PBÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10_PCÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10_PDÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10_PEÌ65536Ö0 +SYSCFG_EXTICR3_EXTI10_PFÌ65536Ö0 +SYSCFG_EXTICR3_EXTI11Ì65536Ö0 +SYSCFG_EXTICR3_EXTI11_PAÌ65536Ö0 +SYSCFG_EXTICR3_EXTI11_PBÌ65536Ö0 +SYSCFG_EXTICR3_EXTI11_PCÌ65536Ö0 +SYSCFG_EXTICR3_EXTI11_PDÌ65536Ö0 +SYSCFG_EXTICR3_EXTI11_PEÌ65536Ö0 +SYSCFG_EXTICR3_EXTI8Ì65536Ö0 +SYSCFG_EXTICR3_EXTI8_PAÌ65536Ö0 +SYSCFG_EXTICR3_EXTI8_PBÌ65536Ö0 +SYSCFG_EXTICR3_EXTI8_PCÌ65536Ö0 +SYSCFG_EXTICR3_EXTI8_PDÌ65536Ö0 +SYSCFG_EXTICR3_EXTI8_PEÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9Ì65536Ö0 +SYSCFG_EXTICR3_EXTI9_PAÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9_PBÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9_PCÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9_PDÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9_PEÌ65536Ö0 +SYSCFG_EXTICR3_EXTI9_PFÌ65536Ö0 +SYSCFG_EXTICR4_EXTI12Ì65536Ö0 +SYSCFG_EXTICR4_EXTI12_PAÌ65536Ö0 +SYSCFG_EXTICR4_EXTI12_PBÌ65536Ö0 +SYSCFG_EXTICR4_EXTI12_PCÌ65536Ö0 +SYSCFG_EXTICR4_EXTI12_PDÌ65536Ö0 +SYSCFG_EXTICR4_EXTI12_PEÌ65536Ö0 +SYSCFG_EXTICR4_EXTI13Ì65536Ö0 +SYSCFG_EXTICR4_EXTI13_PAÌ65536Ö0 +SYSCFG_EXTICR4_EXTI13_PBÌ65536Ö0 +SYSCFG_EXTICR4_EXTI13_PCÌ65536Ö0 +SYSCFG_EXTICR4_EXTI13_PDÌ65536Ö0 +SYSCFG_EXTICR4_EXTI13_PEÌ65536Ö0 +SYSCFG_EXTICR4_EXTI14Ì65536Ö0 +SYSCFG_EXTICR4_EXTI14_PAÌ65536Ö0 +SYSCFG_EXTICR4_EXTI14_PBÌ65536Ö0 +SYSCFG_EXTICR4_EXTI14_PCÌ65536Ö0 +SYSCFG_EXTICR4_EXTI14_PDÌ65536Ö0 +SYSCFG_EXTICR4_EXTI14_PEÌ65536Ö0 +SYSCFG_EXTICR4_EXTI15Ì65536Ö0 +SYSCFG_EXTICR4_EXTI15_PAÌ65536Ö0 +SYSCFG_EXTICR4_EXTI15_PBÌ65536Ö0 +SYSCFG_EXTICR4_EXTI15_PCÌ65536Ö0 +SYSCFG_EXTICR4_EXTI15_PDÌ65536Ö0 +SYSCFG_EXTICR4_EXTI15_PEÌ65536Ö0 +StartHSEÌ16Í()Ö0Ïinline void +StartHSI48Ì16Í()Ö0Ïinline void +SysTickÌ65536Ö0 +SysTick_BASEÌ65536Ö0 +SysTick_CALIB_NOREF_MskÌ65536Ö0 +SysTick_CALIB_NOREF_PosÌ65536Ö0 +SysTick_CALIB_SKEW_MskÌ65536Ö0 +SysTick_CALIB_SKEW_PosÌ65536Ö0 +SysTick_CALIB_TENMS_MskÌ65536Ö0 +SysTick_CALIB_TENMS_PosÌ65536Ö0 +SysTick_CTRL_CLKSOURCE_MskÌ65536Ö0 +SysTick_CTRL_CLKSOURCE_PosÌ65536Ö0 +SysTick_CTRL_COUNTFLAG_MskÌ65536Ö0 +SysTick_CTRL_COUNTFLAG_PosÌ65536Ö0 +SysTick_CTRL_ENABLE_MskÌ65536Ö0 +SysTick_CTRL_ENABLE_PosÌ65536Ö0 +SysTick_CTRL_TICKINT_MskÌ65536Ö0 +SysTick_CTRL_TICKINT_PosÌ65536Ö0 +SysTick_LOAD_RELOAD_MskÌ65536Ö0 +SysTick_LOAD_RELOAD_PosÌ65536Ö0 +SysTick_VAL_CURRENT_MskÌ65536Ö0 +SysTick_VAL_CURRENT_PosÌ65536Ö0 +TEMP110_CAL_ADDRÌ65536Ö0 +TEMP30_CAL_ADDRÌ65536Ö0 +TIM1Ì65536Ö0 +TIM14Ì65536Ö0 +TIM14_BASEÌ65536Ö0 +TIM14_OR_TI1_RMPÌ65536Ö0 +TIM14_OR_TI1_RMP_0Ì65536Ö0 +TIM14_OR_TI1_RMP_1Ì65536Ö0 +TIM16Ì65536Ö0 +TIM16_BASEÌ65536Ö0 +TIM17Ì65536Ö0 +TIM17_BASEÌ65536Ö0 +TIM1_BASEÌ65536Ö0 +TIM2Ì65536Ö0 +TIM2_BASEÌ65536Ö0 +TIM3Ì65536Ö0 +TIM3_BASEÌ65536Ö0 +TIMEOUT_MSÌ65536Ö0 +TIM_ARR_ARRÌ65536Ö0 +TIM_BDTR_AOEÌ65536Ö0 +TIM_BDTR_BKEÌ65536Ö0 +TIM_BDTR_BKPÌ65536Ö0 +TIM_BDTR_DTGÌ65536Ö0 +TIM_BDTR_DTG_0Ì65536Ö0 +TIM_BDTR_DTG_1Ì65536Ö0 +TIM_BDTR_DTG_2Ì65536Ö0 +TIM_BDTR_DTG_3Ì65536Ö0 +TIM_BDTR_DTG_4Ì65536Ö0 +TIM_BDTR_DTG_5Ì65536Ö0 +TIM_BDTR_DTG_6Ì65536Ö0 +TIM_BDTR_DTG_7Ì65536Ö0 +TIM_BDTR_LOCKÌ65536Ö0 +TIM_BDTR_LOCK_0Ì65536Ö0 +TIM_BDTR_LOCK_1Ì65536Ö0 +TIM_BDTR_MOEÌ65536Ö0 +TIM_BDTR_OSSIÌ65536Ö0 +TIM_BDTR_OSSRÌ65536Ö0 +TIM_CCER_CC1EÌ65536Ö0 +TIM_CCER_CC1NEÌ65536Ö0 +TIM_CCER_CC1NPÌ65536Ö0 +TIM_CCER_CC1PÌ65536Ö0 +TIM_CCER_CC2EÌ65536Ö0 +TIM_CCER_CC2NEÌ65536Ö0 +TIM_CCER_CC2NPÌ65536Ö0 +TIM_CCER_CC2PÌ65536Ö0 +TIM_CCER_CC3EÌ65536Ö0 +TIM_CCER_CC3NEÌ65536Ö0 +TIM_CCER_CC3NPÌ65536Ö0 +TIM_CCER_CC3PÌ65536Ö0 +TIM_CCER_CC4EÌ65536Ö0 +TIM_CCER_CC4NPÌ65536Ö0 +TIM_CCER_CC4PÌ65536Ö0 +TIM_CCMR1_CC1SÌ65536Ö0 +TIM_CCMR1_CC1S_0Ì65536Ö0 +TIM_CCMR1_CC1S_1Ì65536Ö0 +TIM_CCMR1_CC2SÌ65536Ö0 +TIM_CCMR1_CC2S_0Ì65536Ö0 +TIM_CCMR1_CC2S_1Ì65536Ö0 +TIM_CCMR1_IC1FÌ65536Ö0 +TIM_CCMR1_IC1F_0Ì65536Ö0 +TIM_CCMR1_IC1F_1Ì65536Ö0 +TIM_CCMR1_IC1F_2Ì65536Ö0 +TIM_CCMR1_IC1F_3Ì65536Ö0 +TIM_CCMR1_IC1PSCÌ65536Ö0 +TIM_CCMR1_IC1PSC_0Ì65536Ö0 +TIM_CCMR1_IC1PSC_1Ì65536Ö0 +TIM_CCMR1_IC2FÌ65536Ö0 +TIM_CCMR1_IC2F_0Ì65536Ö0 +TIM_CCMR1_IC2F_1Ì65536Ö0 +TIM_CCMR1_IC2F_2Ì65536Ö0 +TIM_CCMR1_IC2F_3Ì65536Ö0 +TIM_CCMR1_IC2PSCÌ65536Ö0 +TIM_CCMR1_IC2PSC_0Ì65536Ö0 +TIM_CCMR1_IC2PSC_1Ì65536Ö0 +TIM_CCMR1_OC1CEÌ65536Ö0 +TIM_CCMR1_OC1FEÌ65536Ö0 +TIM_CCMR1_OC1MÌ65536Ö0 +TIM_CCMR1_OC1M_0Ì65536Ö0 +TIM_CCMR1_OC1M_1Ì65536Ö0 +TIM_CCMR1_OC1M_2Ì65536Ö0 +TIM_CCMR1_OC1PEÌ65536Ö0 +TIM_CCMR1_OC2CEÌ65536Ö0 +TIM_CCMR1_OC2FEÌ65536Ö0 +TIM_CCMR1_OC2MÌ65536Ö0 +TIM_CCMR1_OC2M_0Ì65536Ö0 +TIM_CCMR1_OC2M_1Ì65536Ö0 +TIM_CCMR1_OC2M_2Ì65536Ö0 +TIM_CCMR1_OC2PEÌ65536Ö0 +TIM_CCMR2_CC3SÌ65536Ö0 +TIM_CCMR2_CC3S_0Ì65536Ö0 +TIM_CCMR2_CC3S_1Ì65536Ö0 +TIM_CCMR2_CC4SÌ65536Ö0 +TIM_CCMR2_CC4S_0Ì65536Ö0 +TIM_CCMR2_CC4S_1Ì65536Ö0 +TIM_CCMR2_IC3FÌ65536Ö0 +TIM_CCMR2_IC3F_0Ì65536Ö0 +TIM_CCMR2_IC3F_1Ì65536Ö0 +TIM_CCMR2_IC3F_2Ì65536Ö0 +TIM_CCMR2_IC3F_3Ì65536Ö0 +TIM_CCMR2_IC3PSCÌ65536Ö0 +TIM_CCMR2_IC3PSC_0Ì65536Ö0 +TIM_CCMR2_IC3PSC_1Ì65536Ö0 +TIM_CCMR2_IC4FÌ65536Ö0 +TIM_CCMR2_IC4F_0Ì65536Ö0 +TIM_CCMR2_IC4F_1Ì65536Ö0 +TIM_CCMR2_IC4F_2Ì65536Ö0 +TIM_CCMR2_IC4F_3Ì65536Ö0 +TIM_CCMR2_IC4PSCÌ65536Ö0 +TIM_CCMR2_IC4PSC_0Ì65536Ö0 +TIM_CCMR2_IC4PSC_1Ì65536Ö0 +TIM_CCMR2_OC3CEÌ65536Ö0 +TIM_CCMR2_OC3FEÌ65536Ö0 +TIM_CCMR2_OC3MÌ65536Ö0 +TIM_CCMR2_OC3M_0Ì65536Ö0 +TIM_CCMR2_OC3M_1Ì65536Ö0 +TIM_CCMR2_OC3M_2Ì65536Ö0 +TIM_CCMR2_OC3PEÌ65536Ö0 +TIM_CCMR2_OC4CEÌ65536Ö0 +TIM_CCMR2_OC4FEÌ65536Ö0 +TIM_CCMR2_OC4MÌ65536Ö0 +TIM_CCMR2_OC4M_0Ì65536Ö0 +TIM_CCMR2_OC4M_1Ì65536Ö0 +TIM_CCMR2_OC4M_2Ì65536Ö0 +TIM_CCMR2_OC4PEÌ65536Ö0 +TIM_CCR1_CCR1Ì65536Ö0 +TIM_CCR2_CCR2Ì65536Ö0 +TIM_CCR3_CCR3Ì65536Ö0 +TIM_CCR4_CCR4Ì65536Ö0 +TIM_CNT_CNTÌ65536Ö0 +TIM_CR1_ARPEÌ65536Ö0 +TIM_CR1_CENÌ65536Ö0 +TIM_CR1_CKDÌ65536Ö0 +TIM_CR1_CKD_0Ì65536Ö0 +TIM_CR1_CKD_1Ì65536Ö0 +TIM_CR1_CMSÌ65536Ö0 +TIM_CR1_CMS_0Ì65536Ö0 +TIM_CR1_CMS_1Ì65536Ö0 +TIM_CR1_DIRÌ65536Ö0 +TIM_CR1_OPMÌ65536Ö0 +TIM_CR1_UDISÌ65536Ö0 +TIM_CR1_URSÌ65536Ö0 +TIM_CR2_CCDSÌ65536Ö0 +TIM_CR2_CCPCÌ65536Ö0 +TIM_CR2_CCUSÌ65536Ö0 +TIM_CR2_MMSÌ65536Ö0 +TIM_CR2_MMS_0Ì65536Ö0 +TIM_CR2_MMS_1Ì65536Ö0 +TIM_CR2_MMS_2Ì65536Ö0 +TIM_CR2_OIS1Ì65536Ö0 +TIM_CR2_OIS1NÌ65536Ö0 +TIM_CR2_OIS2Ì65536Ö0 +TIM_CR2_OIS2NÌ65536Ö0 +TIM_CR2_OIS3Ì65536Ö0 +TIM_CR2_OIS3NÌ65536Ö0 +TIM_CR2_OIS4Ì65536Ö0 +TIM_CR2_TI1SÌ65536Ö0 +TIM_DCR_DBAÌ65536Ö0 +TIM_DCR_DBA_0Ì65536Ö0 +TIM_DCR_DBA_1Ì65536Ö0 +TIM_DCR_DBA_2Ì65536Ö0 +TIM_DCR_DBA_3Ì65536Ö0 +TIM_DCR_DBA_4Ì65536Ö0 +TIM_DCR_DBLÌ65536Ö0 +TIM_DCR_DBL_0Ì65536Ö0 +TIM_DCR_DBL_1Ì65536Ö0 +TIM_DCR_DBL_2Ì65536Ö0 +TIM_DCR_DBL_3Ì65536Ö0 +TIM_DCR_DBL_4Ì65536Ö0 +TIM_DIER_BIEÌ65536Ö0 +TIM_DIER_CC1DEÌ65536Ö0 +TIM_DIER_CC1IEÌ65536Ö0 +TIM_DIER_CC2DEÌ65536Ö0 +TIM_DIER_CC2IEÌ65536Ö0 +TIM_DIER_CC3DEÌ65536Ö0 +TIM_DIER_CC3IEÌ65536Ö0 +TIM_DIER_CC4DEÌ65536Ö0 +TIM_DIER_CC4IEÌ65536Ö0 +TIM_DIER_COMDEÌ65536Ö0 +TIM_DIER_COMIEÌ65536Ö0 +TIM_DIER_TDEÌ65536Ö0 +TIM_DIER_TIEÌ65536Ö0 +TIM_DIER_UDEÌ65536Ö0 +TIM_DIER_UIEÌ65536Ö0 +TIM_DMAR_DMABÌ65536Ö0 +TIM_EGR_BGÌ65536Ö0 +TIM_EGR_CC1GÌ65536Ö0 +TIM_EGR_CC2GÌ65536Ö0 +TIM_EGR_CC3GÌ65536Ö0 +TIM_EGR_CC4GÌ65536Ö0 +TIM_EGR_COMGÌ65536Ö0 +TIM_EGR_TGÌ65536Ö0 +TIM_EGR_UGÌ65536Ö0 +TIM_PSC_PSCÌ65536Ö0 +TIM_RCR_REPÌ65536Ö0 +TIM_SMCR_ECEÌ65536Ö0 +TIM_SMCR_ETFÌ65536Ö0 +TIM_SMCR_ETF_0Ì65536Ö0 +TIM_SMCR_ETF_1Ì65536Ö0 +TIM_SMCR_ETF_2Ì65536Ö0 +TIM_SMCR_ETF_3Ì65536Ö0 +TIM_SMCR_ETPÌ65536Ö0 +TIM_SMCR_ETPSÌ65536Ö0 +TIM_SMCR_ETPS_0Ì65536Ö0 +TIM_SMCR_ETPS_1Ì65536Ö0 +TIM_SMCR_MSMÌ65536Ö0 +TIM_SMCR_OCCSÌ65536Ö0 +TIM_SMCR_SMSÌ65536Ö0 +TIM_SMCR_SMS_0Ì65536Ö0 +TIM_SMCR_SMS_1Ì65536Ö0 +TIM_SMCR_SMS_2Ì65536Ö0 +TIM_SMCR_TSÌ65536Ö0 +TIM_SMCR_TS_0Ì65536Ö0 +TIM_SMCR_TS_1Ì65536Ö0 +TIM_SMCR_TS_2Ì65536Ö0 +TIM_SR_BIFÌ65536Ö0 +TIM_SR_CC1IFÌ65536Ö0 +TIM_SR_CC1OFÌ65536Ö0 +TIM_SR_CC2IFÌ65536Ö0 +TIM_SR_CC2OFÌ65536Ö0 +TIM_SR_CC3IFÌ65536Ö0 +TIM_SR_CC3OFÌ65536Ö0 +TIM_SR_CC4IFÌ65536Ö0 +TIM_SR_CC4OFÌ65536Ö0 +TIM_SR_COMIFÌ65536Ö0 +TIM_SR_TIFÌ65536Ö0 +TIM_SR_UIFÌ65536Ö0 +TRUE_INLINEÌ65536Ö0 +TSCÌ65536Ö0 +TSC_BASEÌ65536Ö0 +TSC_CR_AMÌ65536Ö0 +TSC_CR_CTPHÌ65536Ö0 +TSC_CR_CTPH_0Ì65536Ö0 +TSC_CR_CTPH_1Ì65536Ö0 +TSC_CR_CTPH_2Ì65536Ö0 +TSC_CR_CTPH_3Ì65536Ö0 +TSC_CR_CTPLÌ65536Ö0 +TSC_CR_CTPL_0Ì65536Ö0 +TSC_CR_CTPL_1Ì65536Ö0 +TSC_CR_CTPL_2Ì65536Ö0 +TSC_CR_CTPL_3Ì65536Ö0 +TSC_CR_IODEFÌ65536Ö0 +TSC_CR_MCVÌ65536Ö0 +TSC_CR_MCV_0Ì65536Ö0 +TSC_CR_MCV_1Ì65536Ö0 +TSC_CR_MCV_2Ì65536Ö0 +TSC_CR_PGPSCÌ65536Ö0 +TSC_CR_PGPSC_0Ì65536Ö0 +TSC_CR_PGPSC_1Ì65536Ö0 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+coefficientsÌ16384Ö0Ïuint16_t +datalenÌ16384Ö0Ïint +dlenÌ16384Ö0Ïint +dma1_channel4_5_isrÌ16Í()Ö0Ïvoid +gpio_setupÌ16Í(void)Ö0Ïvoid +gpio_setupÌ1024Í(void)Ö0Ïvoid +i2c_setupÌ16Í(I2C_SPEED speed)Ö0Ïvoid +i2c_setupÌ1024Í(I2C_SPEED speed)Ö0Ïvoid +linerdyÌ16384Ö0Ïint +linerdyÌ32768Ö0Ïint +linuxÌ65536Ö0 +mainÌ16Í(void)Ö0Ïint +newlineÌ16Í()Ö0Ïvoid +newlineÌ1024Í()Ö0Ïvoid +nopÌ131072Í()Ö0 +pin_clearÌ131072Í(gpioport,gpios)Ö0 +pin_readÌ131072Í(gpioport,gpios)Ö0 +pin_setÌ131072Í(gpioport,gpios)Ö0 +pin_toggleÌ131072Í(gpioport,gpios)Ö0 +pin_writeÌ131072Í(gpioport,gpios)Ö0 +printuÌ16Í(uint32_t val)Ö0Ïvoid +rbufÌ16384Ö0Ïchar +rbufnoÌ16384Ö0Ïint +read_i2cÌ16Í(uint8_t addr, uint32_t *data, uint8_t nbytes)Ö0Ïuint8_t +read_i2cÌ1024Í(uint8_t addr, uint32_t *data, uint8_t nbytes)Ö0Ïuint8_t +recvdataÌ16384Ö0Ïchar * +showcoeffsÌ16Í(uint8_t addr, uint8_t verb)Ö0Ïvoid +strdupaÌ131072Í(s)Ö0 +strndupaÌ131072Í(s,n)Ö0 +sys_tick_handlerÌ16Í(void)Ö0Ïvoid +sysresetÌ16Í(void)Ö0Ïinline void +tbufÌ16384Ö0Ïchar +txrdyÌ16384Ö0Ïint +txrdyÌ32768Ö0Ïint +unixÌ65536Ö0 +usart2_isrÌ16Í()Ö0Ïvoid +usart_getlineÌ16Í(char **line)Ö0Ïint +usart_getlineÌ1024Í(char **line)Ö0Ïint +usart_sendÌ16Í(const char *str, int len)Ö0ÏTXstatus +usart_sendÌ1024Í(const char *str, int len)Ö0ÏTXstatus +usart_send_blockingÌ16Í(const char *str, int len)Ö0ÏTXstatus +usart_send_blockingÌ1024Í(const char *str, int len)Ö0ÏTXstatus +usart_setupÌ16Í()Ö0Ïvoid +usart_setupÌ1024Í()Ö0Ïvoid +usartovrÌ131072Í()Ö0 +usartrxÌ131072Í()Ö0 +write_i2cÌ16Í(uint8_t addr, uint8_t data)Ö0Ïuint8_t +write_i2cÌ1024Í(uint8_t addr, uint8_t data)Ö0Ïuint8_t diff --git a/STM32/Tcalc/tsys01.geany b/STM32/Tcalc/tsys01.geany new file mode 100644 index 0000000..bbc199e --- /dev/null +++ b/STM32/Tcalc/tsys01.geany @@ -0,0 +1,50 @@ +[editor] +line_wrapping=false +line_break_column=100 +auto_continue_multiline=true + +[file_prefs] +final_new_line=true +ensure_convert_new_lines=true +strip_trailing_spaces=true +replace_tabs=true + +[indentation] +indent_width=4 +indent_type=0 +indent_hard_tab_width=4 +detect_indent=false +detect_indent_width=false +indent_mode=3 + +[project] +name=tsys01 +base_path=/home/eddy/Docs/SAO/BTA/Зеркало_контроль/Project/STM32src/src +description= + +[long line marker] +long_line_behaviour=1 +long_line_column=100 + +[files] +current_page=6 +FILE_NAME_0=2454;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fhardware.c;0;4 +FILE_NAME_1=1651;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fhardware.h;0;4 +FILE_NAME_2=2305;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fi2c.c;0;4 +FILE_NAME_3=966;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fi2c.h;0;4 +FILE_NAME_4=1456;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fusart.c;0;4 +FILE_NAME_5=1128;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fusart.h;0;4 +FILE_NAME_6=1751;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Fsrc%2Fmain.c;0;4 +FILE_NAME_7=8536;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Finc%2FF0%2Fstm32f0.h;0;4 +FILE_NAME_8=218587;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2FSTM32src%2Finc%2FF0%2Fstm32f042x6.h;0;4 +FILE_NAME_9=9457;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2Fsrc%2Fterm.c;0;4 +FILE_NAME_10=1100;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2Fsrc%2Fterm.h;0;4 +FILE_NAME_11=251;Make;0;EUTF-8;1;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2Fsrc%2FMakefile;0;4 +FILE_NAME_12=1712;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2Fsrc%2Fmain.c;0;4 +FILE_NAME_13=9629;C;0;EKOI8-R;0;1;0;%2Fhome%2Feddy%2FDocs%2FSAO%2FBTA%2FMIRROR_CONTROL_termo%2FProject%2Fsrc%2Fusefull_macros.c;0;4 +FILE_NAME_14=892;Matlab/Octave;0;EUTF-8;0;1;0;%2Ftmp%2Freadtemp.m;0;4 +FILE_NAME_15=83;Matlab/Octave;0;EUTF-8;0;1;0;%2Ftmp%2Fplotdt.m;0;4 +FILE_NAME_16=571;Matlab/Octave;0;EUTF-8;0;1;0;%2Ftmp%2Fplotpair.m;0;4 + +[VTE] +last_dir=/home/eddy diff --git a/STM32/Tcalc/usart.c b/STM32/Tcalc/usart.c new file mode 100644 index 0000000..f221bd2 --- /dev/null +++ b/STM32/Tcalc/usart.c @@ -0,0 +1,173 @@ +/*us + * usart.c + * + * Copyright 2017 Edward V. Emelianoff + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ +#include "stm32f0.h" +#include "hardware.h" +#include "usart.h" +#include + +extern volatile uint32_t Tms; +static int datalen[2] = {0,0}; // received data line length (including '\n') + +int linerdy = 0, // received data ready + dlen = 0, // length of data (including '\n') in current buffer + bufovr = 0, // input buffer overfull + txrdy = 1 // transmission done +; + + +int rbufno = 0; // current rbuf number +static char rbuf[UARTBUFSZ][2], tbuf[UARTBUFSZ]; // receive & transmit buffers +static char *recvdata = NULL; + +/** + * return length of received data (without trailing zero + */ +int usart_getline(char **line){ + if(bufovr){ + bufovr = 0; + linerdy = 0; + return 0; + } + *line = recvdata; + linerdy = 0; + return dlen; +} + +TXstatus usart_send(const char *str, int len){ + if(!txrdy) return LINE_BUSY; + if(len > UARTBUFSZ) return STR_TOO_LONG; + txrdy = 0; + memcpy(tbuf, str, len); +#if USARTNUM == 2 + DMA1_Channel4->CCR &= ~DMA_CCR_EN; + DMA1_Channel4->CNDTR = len; + DMA1_Channel4->CCR |= DMA_CCR_EN; // start transmission +#else // USART1 +#error "Not implemented" +#endif + return ALL_OK; +} + +TXstatus usart_send_blocking(const char *str, int len){ + if(!txrdy) return LINE_BUSY; + int i; + bufovr = 0; + for(i = 0; i < len; ++i){ + USARTX -> TDR = *str++; + while(!(USARTX->ISR & USART_ISR_TXE)); + } + return ALL_OK; +} + +void newline(){ + while(!txrdy); + USARTX -> TDR = '\n'; + while(!(USARTX->ISR & USART_ISR_TXE)); +} + + +// Nucleo's USART2 connected to VCP proxy of st-link +void usart_setup(){ +#if USARTNUM == 2 + // setup pins: PA2 (Tx - AF1), PA15 (Rx - AF1) + RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_DMAEN; + // AF mode (AF1) + GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER2|GPIO_MODER_MODER15))\ + | (GPIO_MODER_MODER2_1 | GPIO_MODER_MODER15_1); + GPIOA->AFR[0] = (GPIOA->AFR[0] &~GPIO_AFRH_AFRH2) | 1 << (2 * 4); // PA2 + GPIOA->AFR[1] = (GPIOA->AFR[1] &~GPIO_AFRH_AFRH7) | 1 << (7 * 4); // PA15 + // DMA: Tx - Ch4 + DMA1_Channel4->CPAR = (uint32_t) &USART2->TDR; // periph + DMA1_Channel4->CMAR = (uint32_t) tbuf; // mem + DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq + // Tx CNDTR set @ each transmission due to data size + NVIC_SetPriority(DMA1_Channel4_5_IRQn, 3); + NVIC_EnableIRQ(DMA1_Channel4_5_IRQn); + NVIC_SetPriority(USART2_IRQn, 0); + // setup usart2 + RCC->APB1ENR |= RCC_APB1ENR_USART2EN; // clock + // oversampling by16, 115200bps (fck=48mHz) + //USART2_BRR = 0x1a1; // 48000000 / 115200 + USART2->BRR = 480000 / 1152; + USART2->CR3 = USART_CR3_DMAT; // enable DMA Tx + USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART + while(!(USART2->ISR & USART_ISR_TC)); // polling idle frame Transmission + USART2->ICR |= USART_ICR_TCCF; // clear TC flag + USART2->CR1 |= USART_CR1_RXNEIE; + NVIC_EnableIRQ(USART2_IRQn); +#else // USART1 +#error "Not implemented" +#endif +} + +#if USARTNUM == 2 +void usart2_isr(){ +#else // USART1 +#error "Not implemented" +#endif + #ifdef CHECK_TMOUT + static uint32_t tmout = 0; + #endif + if(USARTX->ISR & USART_ISR_RXNE){ // RX not emty - receive next char + #ifdef CHECK_TMOUT + if(tmout && Tms >= tmout){ // set overflow flag + bufovr = 1; + datalen[rbufno] = 0; + } + tmout = Tms + TIMEOUT_MS; + if(!tmout) tmout = 1; // prevent 0 + #endif + // read RDR clears flag + uint8_t rb = USARTX->RDR; + if(datalen[rbufno] < UARTBUFSZ){ // put next char into buf + rbuf[rbufno][datalen[rbufno]++] = rb; + if(rb == '\n'){ // got newline - line ready + linerdy = 1; + dlen = datalen[rbufno]; + recvdata = rbuf[rbufno]; + // prepare other buffer + rbufno = !rbufno; + datalen[rbufno] = 0; + #ifdef CHECK_TMOUT + // clear timeout at line end + tmout = 0; + #endif + } + }else{ // buffer overrun + bufovr = 1; + datalen[rbufno] = 0; + #ifdef CHECK_TMOUT + tmout = 0; + #endif + } + } +} + +#if USARTNUM == 2 +void dma1_channel4_5_isr(){ + if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx + DMA1->IFCR |= DMA_IFCR_CTCIF4; // clear TC flag + txrdy = 1; + } +} +#else // USART1 +#error "Not implemented" +#endif diff --git a/STM32/Tcalc/usart.h b/STM32/Tcalc/usart.h new file mode 100644 index 0000000..677dd1c --- /dev/null +++ b/STM32/Tcalc/usart.h @@ -0,0 +1,53 @@ +/* + * usart.h + * + * Copyright 2017 Edward V. Emelianoff + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ +#pragma once +#ifndef __USART_H__ +#define __USART_H__ + +// input and output buffers size +#define UARTBUFSZ (64) +// timeout between data bytes +#ifndef TIMEOUT_MS +#define TIMEOUT_MS (1500) +#endif + +// macro for static strings +#define SEND(str) do{}while(LINE_BUSY == usart_send_blocking(str, sizeof(str)-1)) +#define NEWLINE() do{}while(LINE_BUSY == usart_send_blocking('\n', 1)) + +typedef enum{ + ALL_OK, + LINE_BUSY, + STR_TOO_LONG +} TXstatus; + +#define usartrx() (linerdy) +#define usartovr() (bufovr) + +extern int linerdy, bufovr, txrdy; + +void usart_setup(); +int usart_getline(char **line); +TXstatus usart_send(const char *str, int len); +TXstatus usart_send_blocking(const char *str, int len); +void newline(); + +#endif // __USART_H__