mirror of
https://github.com/eddyem/stm32samples.git
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71 lines
2.3 KiB
C
71 lines
2.3 KiB
C
/*
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* This file is part of the as3935 project.
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* Copyright 2026 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "adc.h"
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#include "hardware.h"
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#include "spi.h"
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/*
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* PA0 - INT0 - PD in
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* PA1 - INT1 - PD in
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* PA2 - CS0 - PP out
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* PA3 - CS1 - PP out
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* PA5 - SPI1 SCK
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* PA6 - SPI1 MISO
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* PA7 - SPI1 MOSI
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* PA9 - USART1 Tx
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* PA10- USART1 Rx
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*/
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static inline void gpio_setup(){
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// Enable clocks to the GPIO subsystems (PB for ADC), turn on AFIO clocking to disable SWD/JTAG
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN | RCC_APB2ENR_SPI1EN;
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// turn off SWJ/JTAG
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AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE; // for PA15
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// Set led as opendrain output
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GPIOC->CRH |= CRH(13, CNF_ODOUTPUT|MODE_SLOW);
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// PA pins
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GPIOA->ODR = 0; // for pull-down
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GPIOA->CRL = CRL(0, CNF_PUDINPUT|MODE_INPUT) | CRL(1, CNF_PUDINPUT|MODE_INPUT) | CRL(2, CNF_PPOUTPUT|MODE_SLOW) |
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CRL(3, CNF_PPOUTPUT|MODE_SLOW) | CRL(5, CNF_AFPP|MODE_FAST) | CRL(6, CNF_FLINPUT|MODE_INPUT) | CRL(7, CNF_AFPP|MODE_FAST);
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GPIOA->CRH = CRH(9, CNF_AFPP|MODE_FAST) | CRH(10, CNF_FLINPUT|MODE_INPUT) | CRH(15, CNF_PPOUTPUT|MODE_SLOW);
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CS_OFF();
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}
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void hw_setup(){
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gpio_setup();
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adc_setup();
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spi_setup();
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}
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#ifndef EBUG
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void iwdg_setup(){
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uint32_t tmout = 16000000;
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RCC->CSR |= RCC_CSR_LSION;
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while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY){if(--tmout == 0) break;} /* (2) */
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IWDG->KR = IWDG_START;
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IWDG->KR = IWDG_WRITE_ACCESS;
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IWDG->PR = IWDG_PR_PR_1;
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IWDG->RLR = 1250;
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tmout = 16000000;
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while(IWDG->SR){if(--tmout == 0) break;}
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IWDG->KR = IWDG_REFRESH;
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}
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#endif
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