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https://github.com/eddyem/stm32samples.git
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106 lines
7.2 KiB
C
106 lines
7.2 KiB
C
/*
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* This file is part of the fx3u project.
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* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hardware.h"
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/* pinout:
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| **Pin #** | **Pin name ** | **function** | **settings** | **comment ** |
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| --------- | ------------- | ------------ | ---------------------- | --------------------------------------- |
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| 15 | PC0/adcin10 | ADC4 | ADC in | |
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| 16 | PC1/adcin11 | ADC5 | ADC in | |
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| 23 | PA0 | Y3 | PPOUT | |
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| 24 | PA1/adcin1 | ADC0 | ADC in | |
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| 25 | PA2 | Y11 | PPOUT | |
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| 26 | PA3/adcin3 | ADC1 | ADC in | |
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| 31 | PA6 | Y10 | PPOUT | |
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| 32 | PA7 | Y7 | PPOUT | |
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| 33 | PC4/adcin14 | ADC2 | ADC in | |
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| 34 | PC5/adcin15 | ADC3 | ADC in | |
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| 37 | PB2/boot1 | PROG SW | PUIN | |
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| 38 | PE7 | X14 | PUIN | |
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| 39 | PE8 | X15 | PUIN | |
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| 40 | PE9 | X12 | PUIN | |
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| 41 | PE10 | X13 | PUIN | |
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| 42 | PE11 | X10 | PUIN | |
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| 43 | PE12 | X11 | PUIN | |
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| 44 | PE13 | X6 | PUIN | |
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| 45 | PE14 | X7 | PUIN | |
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| 46 | PE15 | X4 | PUIN | |
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| 47 | PB10 | X5 | PUIN | |
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| 48 | PB11 | X2 | PUIN | |
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| 51 | PB12 | X3 | PUIN | |
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| 52 | PB13 | X0 | PUIN | |
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| 53 | PB14 | X1 | PUIN | |
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| 54 | PB15 | Y6 | PPOUT | |
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| 59 | PD12 | Y5 | PPOUT | |
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| 65 | PC8 | Y1 | PPOUT | |
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| 66 | PC9 | Y0 | PPOUT | |
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| 67 | PA8 | Y2 | PPOUT | |
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| 68 | PA9 | RS TX | AFPP | |
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| 69 | PA10 | RS RX | FLIN | |
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| 76 | PA14/SWCLK | 485 DE * | (default) | (Not now) |
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| 81 | PD0 | CAN RX | FLIN | |
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| 82 | PD1 | CAN TX | AFPP | |
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| 89 | PB3/JTDO | Y4 | PPOUT | |
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| | | | | |
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| | | | | |
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| | | | | |
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*/
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void gpio_setup(void){
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// PD0 & PD1 (CAN) setup in can.c; PA9 & PA10 (USART) in usart.c
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |
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RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN;
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// Turn off JTAG
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AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
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GPIOA->CRL = CRL(0, CNF_PPOUTPUT|MODE_NORMAL) | CRL(1, CNF_ANALOG) | CRL(2, CNF_PPOUTPUT|MODE_NORMAL) |
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CRL(3, CNF_ANALOG) | CRL(6, CNF_PPOUTPUT|MODE_NORMAL) | CRL(7, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOA->CRH = 0;
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GPIOB->CRL = CRL(2, CNF_PUDINPUT);
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GPIOB->CRH = CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) | CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) |
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CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOC-> CRL = CRL(0, CNF_ANALOG) | CRL(1, CNF_ANALOG) | CRL(4, CNF_ANALOG) | CRL(5, CNF_ANALOG);
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GPIOC->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL) | CRH(9, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOD->CRL = 0;
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GPIOD->CRH = CRH(12, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOE->CRL = CRL(7, CNF_PUDINPUT);
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GPIOE->CRH = CRH(8, CNF_PUDINPUT) | CRH(9, CNF_PUDINPUT) | CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) |
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CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) | CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PUDINPUT);
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// pullups & initial values
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GPIOA->ODR = 0;
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GPIOB->ODR = (1<<2) | (1<<10) | (1<<11) | (1<<12) | (1<<13) | (1<<14);
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GPIOC->ODR = 0;
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GPIOD->ODR = 0;
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GPIOE->ODR = (1<<7) | (1<<8) | (1<<9) | (1<<10) | (1<<11) | (1<<12) | (1<<13) | (1<<14) | (1<<15);
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}
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void iwdg_setup(){
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uint32_t tmout = 16000000;
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RCC->CSR |= RCC_CSR_LSION;
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while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY){if(--tmout == 0) break;}
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IWDG->KR = IWDG_START;
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IWDG->KR = IWDG_WRITE_ACCESS;
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IWDG->PR = IWDG_PR_PR_1;
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IWDG->RLR = 1250;
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tmout = 16000000;
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while(IWDG->SR){if(--tmout == 0) break;}
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IWDG->KR = IWDG_REFRESH;
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}
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