mirror of
https://github.com/eddyem/stm32samples.git
synced 2025-12-06 18:55:13 +03:00
268 lines
7.4 KiB
C
268 lines
7.4 KiB
C
/*
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* usart.c
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*
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* Copyright 2018 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "stm32f1.h"
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#include "usart.h"
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#include "usb.h"
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extern volatile uint32_t Tms;
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static volatile int idatalen[2] = {0,0}; // received data line length (including '\n')
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static volatile int odatalen[2] = {0,0};
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static int dlen = 0; // length of data (including '\n') in current buffer
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int linerdy = 0, // received data ready
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bufovr = 0, // input buffer overfull
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txrdy = 1 // transmission done
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;
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static int rbufno = 0, tbufno = 0; // current rbuf/tbuf numbers
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static uint8_t rbuf[2][UARTBUFSZI], tbuf[2][UARTBUFSZO]; // receive & transmit buffers
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static uint8_t *recvdata = NULL;
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/**
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* return length of received data (without trailing zero)
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*/
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uint16_t usart_get(uint8_t **line){
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if(!line) return 0;
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*line = NULL;
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if(bufovr){
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bufovr = 0;
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linerdy = 0;
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return 0;
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}
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if(!linerdy) return 0;
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USART1->CR1 &= ~USART_CR1_RXNEIE; // disallow Rx IRQ
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dlen = idatalen[rbufno];
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recvdata = rbuf[rbufno];
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// prepare other buffer
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rbufno = !rbufno;
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idatalen[rbufno] = 0;
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recvdata[dlen] = 0;
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*line = recvdata;
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linerdy = 0;
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USART1->CR1 |= USART_CR1_RXNEIE; // allow Rx IRQ
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return dlen;
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}
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// transmit current tbuf and swap buffers
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int transmit_tbuf(){
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uint32_t tmout = 7200;
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while(!txrdy){ // wait for previos buffer transmission
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IWDG->KR = IWDG_REFRESH;
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if(--tmout == 0){
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//DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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//txrdy = 1;
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return 1;
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}
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}
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int l = odatalen[tbufno];
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if(!l){
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return 0;
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}
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DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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DMA1_Channel4->CMAR = (uint32_t) tbuf[tbufno]; // mem
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DMA1_Channel4->CNDTR = l;
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tbufno = !tbufno;
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odatalen[tbufno] = 0;
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txrdy = 0;
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DMA1_Channel4->CCR |= DMA_CCR_EN;
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return 0;
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}
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void usart_putchar(const char ch){
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tbuf[tbufno][odatalen[tbufno]++] = ch;
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if(odatalen[tbufno] >= UARTBUFSZO){
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while(transmit_tbuf()) IWDG->KR = IWDG_REFRESH;
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}
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}
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void usart_send(const char *str){
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if(!str) return;
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while(*str){
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tbuf[tbufno][odatalen[tbufno]++] = *str++;
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if(odatalen[tbufno] >= UARTBUFSZO){
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while(transmit_tbuf()) IWDG->KR = IWDG_REFRESH;
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}
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}
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}
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/**
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* @brief usart_senddata - the same as usart_send, but with given length
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*/
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void usart_senddata(const uint8_t *str, uint16_t len){
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while(len--){
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tbuf[tbufno][odatalen[tbufno]++] = *str++;
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if(odatalen[tbufno] >= UARTBUFSZO){
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while(transmit_tbuf()) IWDG->KR = IWDG_REFRESH;
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}
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}
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}
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void newline(){
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usart_putchar('\n');
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}
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/*
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* USART speed: baudrate = Fck/(USARTDIV)
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* USARTDIV stored in USART->BRR
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*
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* for 72MHz USARTDIV=72000/f(kboud); so for 115200 USARTDIV=72000/115.2=625 -> BRR=0x271
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* 9600: BRR = 7500 (0x1D4C)
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*/
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void usart_setup(){
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uint32_t tmout = 16000000;
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// PA9 - Tx, PA10 - Rx
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_AFIOEN;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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GPIOA->CRH = CRH(9, CNF_AFPP|MODE_NORMAL) | CRH(10, CNF_FLINPUT|MODE_INPUT);
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// USART1 Tx DMA - Channel4 (Rx - channel 5)
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DMA1_Channel4->CPAR = (uint32_t) &USART1->DR; // periph
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DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
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// Tx CNDTR set @ each transmission due to data size
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NVIC_SetPriority(DMA1_Channel4_IRQn, 3);
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NVIC_EnableIRQ(DMA1_Channel4_IRQn);
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NVIC_SetPriority(USART1_IRQn, 0);
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// setup usart1
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USART1->BRR = 72000000 / 115200;
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//USART1->BRR = 24; // 3000000
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USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
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while(!(USART1->SR & USART_SR_TC)){ // polling idle frame Transmission
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IWDG->KR = IWDG_REFRESH;
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if(--tmout == 0) break;
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}
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USART1->SR = 0; // clear flags
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USART1->CR1 |= USART_CR1_RXNEIE; // allow Rx IRQ
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USART1->CR3 = USART_CR3_DMAT; // enable DMA Tx
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NVIC_EnableIRQ(USART1_IRQn);
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}
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void usart1_isr(){
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#ifdef CHECK_TMOUT
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static uint32_t tmout = 0;
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#endif
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if(USART1->SR & USART_SR_RXNE){ // RX not emty - receive next char
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#ifdef CHECK_TMOUT
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if(tmout && Tms >= tmout){ // set overflow flag
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bufovr = 1;
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idatalen[rbufno] = 0;
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}
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tmout = Tms + TIMEOUT_MS;
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if(!tmout) tmout = 1; // prevent 0
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#endif
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uint8_t rb = USART1->DR;
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if(idatalen[rbufno] < UARTBUFSZI){ // put next char into buf
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rbuf[rbufno][idatalen[rbufno]++] = rb;
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linerdy = 1; // ready for reading
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#ifdef CHECK_TMOUT
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// clear timeout at line end
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tmout = 0;
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#endif
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}else{ // buffer overrun
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bufovr = 1;
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idatalen[rbufno] = 0;
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#ifdef CHECK_TMOUT
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tmout = 0;
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#endif
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}
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}
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}
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// print 32bit unsigned int
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void printu(uint32_t val){
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char bufa[11], bufb[10];
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int l = 0, bpos = 0;
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if(!val){
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bufa[0] = '0';
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l = 1;
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}else{
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while(val){
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bufb[l++] = val % 10 + '0';
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val /= 10;
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}
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int i;
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bpos += l;
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for(i = 0; i < l; ++i){
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bufa[--bpos] = bufb[i];
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}
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}
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bufa[l + bpos] = 0;
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IWDG->KR = IWDG_REFRESH;
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usart_send(bufa);
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}
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// print 32bit unsigned int as hex
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void printuhex(uint32_t val){
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usart_send("0x");
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uint8_t *ptr = (uint8_t*)&val + 3;
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int i, j;
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for(i = 0; i < 4; ++i, --ptr){
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for(j = 1; j > -1; --j){
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register uint8_t half = (*ptr >> (4*j)) & 0x0f;
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if(half < 10) usart_putchar(half + '0');
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else usart_putchar(half - 10 + 'a');
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}
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IWDG->KR = IWDG_REFRESH;
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}
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}
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/*
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// dump memory buffer
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void hexdump(const uint8_t *arr, uint16_t len){
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for(uint16_t l = 0; l < len; ++l, ++arr){
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for(int16_t j = 1; j > -1; --j){
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register uint8_t half = (*arr >> (4*j)) & 0x0f;
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if(half < 10) usart_putchar(half + '0');
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else usart_putchar(half - 10 + 'a');
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}
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if(l % 16 == 15) usart_putchar('\n');
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else if(l & 1) usart_putchar(' ');
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}
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}
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*/
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void dma1_channel4_isr(){
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DMA1->IFCR = DMA_IFCR_CTCIF4; // clear TC flag
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txrdy = 1;
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}
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/*
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#if USARTNUM == 2
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void dma1_channel4_5_isr(){
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if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx
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DMA1->IFCR |= DMA_IFCR_CTCIF4; // clear TC flag
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txrdy = 1;
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}
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}
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// USART1
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#elif USARTNUM == 1
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void dma1_channel2_3_isr(){
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if(DMA1->ISR & DMA_ISR_TCIF2){ // Tx
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DMA1->IFCR |= DMA_IFCR_CTCIF2; // clear TC flag
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txrdy = 1;
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}
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}
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#else
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#error "Not implemented"
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#endif
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*/
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