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123 lines
4.1 KiB
C
123 lines
4.1 KiB
C
/*
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* geany_encoding=koi8-r
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* i2c.c
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*
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* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*
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*/
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#include "stm32f0.h"
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#include "i2c.h"
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/**
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* I2C for TSYS01
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* Speed <= 400kHz (200)
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* t_SCLH > 21ns
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* t_SCLL > 21ns
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* while reading, sends NACK
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* after reading get 24bits of T value, we need upper 2 bytes: ADC16 = ADC>>8
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* T = (-2) * k4 * 10^{-21} * ADC16^4
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* + 4 * k3 * 10^{-16} * ADC16^3
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* + (-2) * k2 * 10^{-11} * ADC16^2
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* + 1 * k1 * 10^{-6} * ADC16
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* +(-1.5)* k0 * 10^{-2}
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* All coefficiens are in registers:
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* k4 - 0xA2, k3 - 0xA4, k2 - 0xA6, k1 - 0xA8, k0 - 0xAA
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*/
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/*
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* Resources: I2C1_SCL - PA9, I2C1_SDA - PA10
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* GPIOA->AFR[1] AF4 -- GPIOA->AFR[1] &= ~0xff0, GPIOA->AFR[1] |= 0x440
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*/
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extern volatile uint32_t Tms;
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static uint32_t cntr;
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void i2c_setup(){
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I2C1->CR1 = 0;
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// GPIO
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN; // clock
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GPIOA->AFR[1] &= ~0xff0; // alternate function F4 for PA9/PA10
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GPIOA->AFR[1] |= 0x440;
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GPIOA->OTYPER |= GPIO_OTYPER_OT_9 | GPIO_OTYPER_OT_10; // opendrain
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GPIOA->MODER &= ~(GPIO_MODER_MODER9 | GPIO_MODER_MODER10);
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GPIOA->MODER |= GPIO_MODER_MODER9_AF | GPIO_MODER_MODER10_AF; // alternate function
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// I2C
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RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; // timing
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RCC->CFGR3 |= RCC_CFGR3_I2C1SW; // use sysclock for timing
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// Clock = 6MHz, 0.16(6)us, need 5us (*30)
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// PRESC=4 (f/5), SCLDEL=0 (t_SU=5/6us), SDADEL=0 (t_HD=5/6us), SCLL,SCLH=14 (2.(3)us)
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I2C1->TIMINGR = (4<<28) | (14<<8) | (14); // 0x40000e0e
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I2C1->CR1 = I2C_CR1_PE;// | I2C_CR1_RXIE; // Enable I2C & (interrupt on receive - not supported yet)
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}
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/**
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* write command byte to I2C
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* @param addr - device address (TSYS01_ADDR0 or TSYS01_ADDR1)
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* @param data - byte to write
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* @return 0 if error
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*/
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uint8_t write_i2c(uint8_t addr, uint8_t data){
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cntr = Tms;
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while(I2C1->ISR & I2C_ISR_BUSY) if(Tms - cntr > 5) return 0; // check busy
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cntr = Tms;
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while(I2C1->CR2 & I2C_CR2_START) if(Tms - cntr > 5) return 0; // check start
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I2C1->CR2 = 1<<16 | addr | I2C_CR2_AUTOEND; // 1 byte, autoend
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// now start transfer
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I2C1->CR2 |= I2C_CR2_START;
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_TXIS)){ // ready to transmit
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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return 0;
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}
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if(Tms - cntr > 5) return 0;
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}
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I2C1->TXDR = data; // send data
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return 1;
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}
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/**
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* read nbytes (2 or 3) of data from I2C line
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* @return 1 if all OK, 0 if NACK or no device found
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*/
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uint8_t read_i2c(uint8_t addr, uint32_t *data, uint8_t nbytes){
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uint32_t result = 0;
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cntr = Tms;
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while(I2C1->ISR & I2C_ISR_BUSY) if(Tms - cntr > 5) return 0; // check busy
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cntr = Tms;
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while(I2C1->CR2 & I2C_CR2_START) if(Tms - cntr > 5) return 0; // check start
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// read N bytes
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I2C1->CR2 = (nbytes<<16) | addr | 1 | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN;
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I2C1->CR2 |= I2C_CR2_START;
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uint8_t i;
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cntr = Tms;
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for(i = 0; i < nbytes; ++i){
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while(!(I2C1->ISR & I2C_ISR_RXNE)){ // wait for data
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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return 0;
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}
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if(Tms - cntr > 5) return 0;
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}
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result = (result << 8) | I2C1->RXDR;
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}
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*data = result;
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return 1;
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}
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