mirror of
https://github.com/eddyem/stm32samples.git
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195 lines
6.2 KiB
C
195 lines
6.2 KiB
C
/*
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* geany_encoding=koi8-r
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* i2c.c
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*
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* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*
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*/
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#include "hardware.h"
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#include "i2c.h"
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#include "proto.h"
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#include "usb.h"
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I2C_SPEED curI2Cspeed = LOW_SPEED;
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extern volatile uint32_t Tms;
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static uint32_t cntr;
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volatile uint8_t I2C_scan_mode = 0; // == 1 when I2C is in scan mode
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static uint8_t i2caddr = I2C_ADDREND; // not active
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void i2c_setup(I2C_SPEED speed){
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if(speed >= CURRENT_SPEED){
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speed = curI2Cspeed;
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}else{
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curI2Cspeed = speed;
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}
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I2C1->CR1 = 0;
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/*
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* GPIO Resources: I2C1_SCL - PB6, I2C1_SDA - PB7 (AF1)
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*/
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GPIOB->AFR[0] = (GPIOB->AFR[0] & ~(GPIO_AFRL_AFRL6 | GPIO_AFRL_AFRL7)) |
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1 << (6 * 4) | 1 << (7 * 4);
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GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER6 | GPIO_MODER_MODER7)) |
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GPIO_MODER_MODER6_AF | GPIO_MODER_MODER7_AF;
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GPIOB->OTYPER |= GPIO_OTYPER_OT_6 | GPIO_OTYPER_OT_7; // both open-drain outputs
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// I2C
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RCC->APB1ENR |= RCC_APB1ENR_I2C1EN; // timing
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RCC->CFGR3 |= RCC_CFGR3_I2C1SW; // use sysclock for timing
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if(speed == LOW_SPEED){ // 10kHz
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// PRESC=B, SCLDEL=4, SDADEL=2, SCLH=0xC3, SCLL=0xB0
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I2C1->TIMINGR = (0xB<<28) | (4<<20) | (2<<16) | (0xC3<<8) | (0xB0);
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}else if(speed == HIGH_SPEED){ // 100kHz
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I2C1->TIMINGR = (0xB<<28) | (4<<20) | (2<<16) | (0x12<<8) | (0x11);
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}else{ // VERYLOW_SPEED - the lowest speed by STM register: 5.8kHz (presc = 16-1 = 15; )
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I2C1->TIMINGR = (0xf<<28) | (4<<20) | (2<<16) | (0xff<<8) | (0xff);
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}
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I2C1->CR1 = I2C_CR1_PE;
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}
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/**
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* write command byte to I2C
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* @param addr - device address (TSYS01_ADDR0 or TSYS01_ADDR1)
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* @param data - bytes to write
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* @param nbytes - amount of bytes to write
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* @param stop - to set STOP
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* @return 0 if error
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*/
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static uint8_t write_i2cs(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t stop){
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cntr = Tms;
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I2C1->CR1 = 0; // clear busy flag
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I2C1->ICR = 0x3f38; // clear all errors
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I2C1->CR1 = I2C_CR1_PE;
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Line busy\n");
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return 0; // check busy
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}}
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cntr = Tms;
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while(I2C1->CR2 & I2C_CR2_START){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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return 0; // check start
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}}
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//I2C1->ICR = 0x3f38; // clear all errors
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I2C1->CR2 = nbytes << 16 | addr;
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if(stop) I2C1->CR2 |= I2C_CR2_AUTOEND; // autoend
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// now start transfer
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I2C1->CR2 |= I2C_CR2_START;
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for(int i = 0; i < nbytes; ++i){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_TXIS)){ // ready to transmit
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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USND("NAK\n");
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return 0;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Timeout\n");
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return 0;
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}
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}
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I2C1->TXDR = data[i]; // send data
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}
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// wait for data gone
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){break;}
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}
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return 1;
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}
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uint8_t write_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes){
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return write_i2cs(addr, data, nbytes, 1);
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}
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/**
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* read nbytes of data from I2C line
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* `data` should be an array with at least `nbytes` length
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* @return 1 if all OK, 0 if NACK or no device found
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*/
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static uint8_t read_i2cb(uint8_t addr, uint8_t *data, uint8_t nbytes, uint8_t busychk){
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if(busychk){
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cntr = Tms;
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while(I2C1->ISR & I2C_ISR_BUSY){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Line busy\n");
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return 0; // check busy
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}}
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}
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cntr = Tms;
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while(I2C1->CR2 & I2C_CR2_START){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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USND("No start\n");
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return 0; // check start
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}}
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// read N bytes
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I2C1->CR2 = (nbytes<<16) | addr | 1 | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN;
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I2C1->CR2 |= I2C_CR2_START;
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uint8_t i;
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for(i = 0; i < nbytes; ++i){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_RXNE)){ // wait for data
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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USND("NAK\n");
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return 0;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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USND("Timeout\n");
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return 0;
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}
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}
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*data++ = I2C1->RXDR;
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}
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return 1;
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}
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uint8_t read_i2c(uint8_t addr, uint8_t *data, uint8_t nbytes){
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return read_i2cb(addr, data, nbytes, 1);
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}
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// read register reg
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uint8_t read_i2c_reg(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t nbytes){
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if(!write_i2cs(addr, ®, 1, 0)) return 0;
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return read_i2cb(addr, data, nbytes, 0);
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}
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void i2c_init_scan_mode(){
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i2caddr = 0;
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I2C_scan_mode = 1;
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}
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// return 1 if next addr is active & return in as `addr`
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// if addresses are over, return 1 and set addr to I2C_NOADDR
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// if scan mode inactive, return 0 and set addr to I2C_NOADDR
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int i2c_scan_next_addr(uint8_t *addr){
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*addr = i2caddr;
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if(i2caddr == I2C_ADDREND){
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*addr = I2C_ADDREND;
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I2C_scan_mode = 0;
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return 0;
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}
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if(!read_i2c_reg((i2caddr++)<<1, 0, NULL, 0)) return 0;
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return 1;
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}
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