mirror of
https://github.com/eddyem/stm32samples.git
synced 2025-12-06 18:55:13 +03:00
69 lines
1.2 KiB
INI
69 lines
1.2 KiB
INI
update=Ср 15 мая 2019 13:44:34
|
||
version=1
|
||
last_client=kicad
|
||
[cvpcb]
|
||
version=1
|
||
NetIExt=net
|
||
[general]
|
||
version=1
|
||
[eeschema]
|
||
version=1
|
||
LibDir=
|
||
[pcbnew]
|
||
version=1
|
||
PageLayoutDescrFile=
|
||
LastNetListRead=stm32.net
|
||
CopperLayerCount=2
|
||
BoardThickness=1.6
|
||
AllowMicroVias=0
|
||
AllowBlindVias=0
|
||
RequireCourtyardDefinitions=0
|
||
ProhibitOverlappingCourtyards=1
|
||
MinTrackWidth=0.2
|
||
MinViaDiameter=1
|
||
MinViaDrill=0.6
|
||
MinMicroViaDiameter=0.2
|
||
MinMicroViaDrill=0.09999999999999999
|
||
MinHoleToHole=1
|
||
TrackWidth1=0.25
|
||
TrackWidth2=0.25
|
||
TrackWidth3=0.5
|
||
TrackWidth4=1
|
||
TrackWidth5=2
|
||
ViaDiameter1=2
|
||
ViaDrill1=0.6
|
||
ViaDiameter2=1.5
|
||
ViaDrill2=0.6
|
||
ViaDiameter3=2
|
||
ViaDrill3=0.8
|
||
dPairWidth1=0.2
|
||
dPairGap1=0.25
|
||
dPairViaGap1=0.25
|
||
SilkLineWidth=0.15
|
||
SilkTextSizeV=1
|
||
SilkTextSizeH=1
|
||
SilkTextSizeThickness=0.15
|
||
SilkTextItalic=0
|
||
SilkTextUpright=1
|
||
CopperLineWidth=0.2
|
||
CopperTextSizeV=1.5
|
||
CopperTextSizeH=1.5
|
||
CopperTextThickness=0.3
|
||
CopperTextItalic=0
|
||
CopperTextUpright=1
|
||
EdgeCutLineWidth=0.09999999999999999
|
||
CourtyardLineWidth=0.12
|
||
OthersLineWidth=0.15
|
||
OthersTextSizeV=1
|
||
OthersTextSizeH=1
|
||
OthersTextSizeThickness=0.15
|
||
OthersTextItalic=0
|
||
OthersTextUpright=1
|
||
SolderMaskClearance=0
|
||
SolderMaskMinWidth=0
|
||
SolderPasteClearance=0
|
||
SolderPasteRatio=-0
|
||
[pcbnew/Layer.F.Cu]
|
||
Name=F.Cu
|
||
Type=3
|