mirror of
https://github.com/eddyem/stm32samples.git
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56 lines
1.8 KiB
C
56 lines
1.8 KiB
C
/*
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* This file is part of the hallinear project.
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* Copyright 2022 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hardware.h"
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#ifndef EBUG
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TRUE_INLINE void iwdg_setup(){
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uint32_t tmout = 16000000;
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RCC->CSR |= RCC_CSR_LSION;
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while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY){if(--tmout == 0) break;} /* (2) */
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IWDG->KR = IWDG_START;
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IWDG->KR = IWDG_WRITE_ACCESS;
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IWDG->PR = IWDG_PR_PR_1;
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IWDG->RLR = 1250;
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tmout = 16000000;
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while(IWDG->SR){if(--tmout == 0) break;}
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IWDG->KR = IWDG_REFRESH;
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}
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#endif
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TRUE_INLINE void gpio_setup(){
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// Set APB2 clock to 72/4=18MHz
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RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_PPRE2) | RCC_CFGR_PPRE2_DIV4;
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// Enable clocks to the GPIO subsystems
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RCC->APB2ENR = RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN;
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AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE; // for PA15 - USB pullup
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// PA3 - jumper (pullup in), PA7 - ADC in
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GPIOA->CRL = 1<<3;
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GPIOA->CRL = CRL(3, CNF_PUDINPUT | MODE_INPUT) | CRL(7, CNF_ANALOG|MODE_INPUT);
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USBPU_OFF();
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GPIOA->CRH = CRH(15, CNF_PPOUTPUT | MODE_SLOW);
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}
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void hw_setup(){
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gpio_setup();
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#ifndef EBUG
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iwdg_setup();
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#endif
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}
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