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73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
/*
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* sharp.c - functions for Sharp 2Y0A02 distance meter
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*
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* Copyright 2015 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "sharp.h"
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#include "main.h"
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int AWD_flag = 0;
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uint16_t AWD_value = 0;
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void init_sharp_sensor(){
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// Make sure the ADC doesn't run during config
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adc_off(ADC1);
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// enable ADC & PA0 clocking
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rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN | RCC_APB2ENR_IOPAEN);
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rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV4);
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gpio_set_mode(GPIOA, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, GPIO0);
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// set sample time: 239.5 cycles for better results
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ADC1_SMPR2 = 7;
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// continuous conv, enable
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ADC1_CR2 = ADC_CR2_CONT | ADC_CR2_ADON;
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// reset calibration registers & start calibration
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ADC1_CR2 |= ADC_CR2_RSTCAL;
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while(ADC1_CR2 & ADC_CR2_RSTCAL); // wait for registers reset
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ADC1_CR2 |= ADC_CR2_CAL;
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while(ADC1_CR2 & ADC_CR2_CAL); // wait for calibration ends
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// set threshold limits
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ADC1_HTR = ADC_WDG_HIGH;
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ADC1_LTR = ADC_WDG_LOW;
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// enable analog watchdog on single regular channel 0 & enable interrupt
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ADC1_CR1 = ADC_CR1_AWDEN | ADC_CR1_AWDSGL | ADC_CR1_AWDIE;
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nvic_enable_irq(NVIC_ADC1_2_IRQ);
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ADC1_CR2 |= ADC_CR2_SWSTART;
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// start - to do it we need set ADC_CR2_ADON again!
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ADC1_CR2 |= ADC_CR2_ADON;
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DBG("ADC started\n");
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}
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void adc1_2_isr(){
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AWD_value = ADC1_DR;
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if(ADC1_SR & ADC_SR_AWD){ // analog watchdog event
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AWD_flag = 1;
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// ADC1_CR1 &= ~(ADC_CR1_AWDIE | ADC_CR1_AWDEN);
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// nvic_disable_irq(NVIC_ADC1_2_IRQ);
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if(AWD_value >= ADC_WDG_HIGH){ // high threshold
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ADC1_HTR = 0x0fff; // remove high threshold, only wait for LOW
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ADC1_LTR = ADC_WDG_LOW;
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}else{
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ADC1_HTR = ADC_WDG_HIGH;
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ADC1_LTR = 0;
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}
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//ADC1_CR1 |= ADC_CR1_AWDIE;
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}
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ADC1_SR = 0;
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}
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