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https://github.com/eddyem/stm32samples.git
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37 lines
1.6 KiB
C
37 lines
1.6 KiB
C
// different for differ MCU
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#define SYSMEM03x 0x1FFFEC00
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#define SYSMEM04x 0x1FFFC400
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#define SYSMEM05x 0x1FFFEC00
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#define SYSMEM07x 0x1FFFC800
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#define SYSMEM09x 0x1FFFD800
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#define SystemMem SYSMEM07x
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void Jump2Boot(){ // for STM32F072
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void (*SysMemBootJump)(void);
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volatile uint32_t addr = 0x1FFFC800;
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// reset systick
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SysTick->CTRL = 0;
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// reset clocks
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RCC->APB1RSTR = RCC_APB1RSTR_CECRST | RCC_APB1RSTR_DACRST | RCC_APB1RSTR_PWRRST | RCC_APB1RSTR_CRSRST |
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RCC_APB1RSTR_CANRST | RCC_APB1RSTR_USBRST | RCC_APB1RSTR_I2C2RST | RCC_APB1RSTR_I2C1RST |
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RCC_APB1RSTR_USART4RST | RCC_APB1RSTR_USART3RST | RCC_APB1RSTR_USART2RST | RCC_APB1RSTR_SPI2RST |
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RCC_APB1RSTR_WWDGRST | RCC_APB1RSTR_TIM14RST | RCC_APB1RSTR_TIM7RST | RCC_APB1RSTR_TIM6RST |
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RCC_APB1RSTR_TIM3RST | RCC_APB1RSTR_TIM2RST;
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RCC->APB2RSTR = RCC_APB2RSTR_DBGMCURST | RCC_APB2RSTR_TIM17RST | RCC_APB2RSTR_TIM16RST | RCC_APB2RSTR_TIM15RST |
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RCC_APB2RSTR_USART1RST | RCC_APB2RSTR_SPI1RST | RCC_APB2RSTR_TIM1RST | RCC_APB2RSTR_ADCRST | RCC_APB2RSTR_SYSCFGRST;
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RCC->AHBRSTR = 0;
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RCC->APB1RSTR = 0;
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RCC->APB2RSTR = 0;
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// Enable the SYSCFG peripheral.
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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// remap memory to 0 (only for STM32F0)
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SYSCFG->CFGR1 = 0x01; __DSB(); __ISB();
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SysMemBootJump = (void (*)(void)) (*((uint32_t *)(addr + 4)));
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// set main stack pointer
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__set_MSP(*((uint32_t *)addr));
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// jump to bootloader
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SysMemBootJump();
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} |