mirror of
https://github.com/eddyem/stm32samples.git
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64 lines
2.3 KiB
C
64 lines
2.3 KiB
C
/*
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* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "usb.h"
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#include "usb_lib.h"
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// here we suppose that all PIN settings done in hw_setup earlier
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void USB_setup(){
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#if defined STM32F3
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NVIC_DisableIRQ(USB_LP_IRQn);
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// remap USB LP & Wakeup interrupts to 75 and 76 - works only on pure F303
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // enable tacting of SYSCFG
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SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
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#elif defined STM32F1
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NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
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NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn);
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#elif defined STM32F0
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NVIC_DisableIRQ(USB_IRQn);
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RCC->APB1ENR |= RCC_APB1ENR_CRSEN;
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RCC->CFGR3 &= ~RCC_CFGR3_USBSW; // reset USB
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RCC->CR2 |= RCC_CR2_HSI48ON; // turn ON HSI48
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uint32_t tmout = 16000000;
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while(!(RCC->CR2 & RCC_CR2_HSI48RDY)){if(--tmout == 0) break;}
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FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
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CRS->CFGR &= ~CRS_CFGR_SYNCSRC;
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CRS->CFGR |= CRS_CFGR_SYNCSRC_1; // USB SOF selected as sync source
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CRS->CR |= CRS_CR_AUTOTRIMEN; // enable auto trim
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CRS->CR |= CRS_CR_CEN; // enable freq counter & block CRS->CFGR as read-only
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RCC->CFGR |= RCC_CFGR_SW;
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#endif
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RCC->APB1ENR |= RCC_APB1ENR_USBEN;
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//??
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USB->CNTR = USB_CNTR_FRES; // Force USB Reset
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for(uint32_t ctr = 0; ctr < 72000; ++ctr) nop(); // wait >1ms
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USB->CNTR = 0;
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USB->BTABLE = 0;
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USB->DADDR = 0;
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USB->ISTR = 0;
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USB->CNTR = USB_CNTR_RESETM | USB_CNTR_WKUPM; // allow only wakeup & reset interrupts
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#if defined STM32F3
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NVIC_EnableIRQ(USB_LP_IRQn);
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#elif defined STM32F1
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NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
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#elif defined STM32F0
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USB->BCDR |= USB_BCDR_DPPU;
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NVIC_EnableIRQ(USB_IRQn);
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#endif
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}
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