mirror of
https://github.com/eddyem/stm32samples.git
synced 2025-12-06 18:55:13 +03:00
add starting work with displays on ili9341/ili9340
This commit is contained in:
parent
c095c1087d
commit
eda7d9127a
@ -50,8 +50,8 @@ TRUE_INLINE void gpio_setup(){
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GPIOB->MODER = MODER_O(0) | MODER_AF(6) | MODER_AF(7) | MODER_O(10) | MODER_O(11) | MODER_O(12) | MODER_AF(13)
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GPIOB->MODER = MODER_O(0) | MODER_AF(6) | MODER_AF(7) | MODER_O(10) | MODER_O(11) | MODER_O(12) | MODER_AF(13)
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| MODER_AF(14) | MODER_AF(15); // 10-DC, 11-RST, 12-LED, 13-SCK, 14-MISO, 15-MOSI
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| MODER_AF(14) | MODER_AF(15); // 10-DC, 11-RST, 12-LED, 13-SCK, 14-MISO, 15-MOSI
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GPIOB->OSPEEDR = OSPEED_HI(6) | OSPEED_HI(7) | OSPEED_HI(13) | OSPEED_HI(14) | OSPEED_HI(15);
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GPIOB->OSPEEDR = OSPEED_HI(6) | OSPEED_HI(7) | OSPEED_HI(13) | OSPEED_HI(14) | OSPEED_HI(15);
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GPIOB->OTYPER = 0;
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GPIOB->OTYPER = 0; //OTYPER_OD(15); // MOSI is OD
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GPIOB->PUPDR = PUPD_PU(14); // PU MISO
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GPIOB->PUPDR = 0; //PUPD_PU(14) | PUPD_PU(15); // PU MISO & MOSI
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// PORT C
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// PORT C
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//GPIOC->ODR = 0;
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//GPIOC->ODR = 0;
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@ -24,6 +24,55 @@
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#endif
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#endif
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#include "usb.h"
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#include "usb.h"
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static const uint8_t initcmd[] = {
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ILI9341_SWRESET, 0xff, // reset and wait a lot
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//0xEF, 3, 0x03, 0x80, 0x02, // WTF?
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ILI9341_POWCTLA, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, // default
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ILI9341_POWCTLB, 3, 0x00, 0xC1, 0x30, // PC/EQ for power saving
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ILI9341_DRVTCTLA1, 3, 0x85, 0x00, 0x78, // EQ timimg
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ILI9341_DRVTCTLB, 2, 0x00, 0x00, // 0 units for gate drv. timing control
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ILI9341_POWONSEQCTL, 4, 0x64, 0x03, 0x12, 0x81, // - why not default?
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ILI9341_PUMPRATCTL, 1, 0x20, // DDVDH=2xVCI
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ILI9341_POWCTL(1), 1, 0x23, // Power control: 4.6V grayscale level
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ILI9341_POWCTL(2), 1, 0x10, // ?
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ILI9341_VCOMCTL1, 2, 0x3e, 0x28, // Vcomh=4.25V, Vcoml=-1.5V
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ILI9341_VCOMCTL2, 1, 0x86, // change VCOMH/L: (-58)
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ILI9341_MADCTL, 1, DEFMADCTL, // mem access
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ILI9341_VSCRSADD, 1, 0x00, // default
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ILI9341_COLMOD, 1, 0x55, // 16 bits/pix
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ILI9341_FRCTLN, 2, 0x00, 0x18, // 79Hz
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ILI9341_DFUNCTL, 3, 0x08, 0x82, 0x27, // ?
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ILI9341_3GEN, 1, 0x00, // 3Gamma Function Disable
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ILI9341_GAMMASET, 1, 0x01, // default
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ILI9341_POSGAMCOR, 15, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, // Set Gamma
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0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00,
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ILI9341_NEGGAMCOR, 15, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, // Set Gamma
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0x31, 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F,
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ILI9341_SLPOUT, 0x8a, // Exit Sleep
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ILI9341_NORON, 0x80, // Normal display mode ON
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ILI9341_DISPON, 0x80, // Display on
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0x00 // End of list
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};
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int ili9341_init(){
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uint8_t *ptr = (uint8_t*)initcmd;
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uint8_t reg;
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while((reg = *ptr++)){
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IWDG->KR = IWDG_REFRESH;
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uint8_t N = *ptr++;
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if(N & 0x80){
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if(!ili9341_writecmd(reg)) return 0;
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uint32_t T = Tms;
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uint32_t pause = (N & 0x7f) + 1;
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if(pause>1) while(Tms - T < pause);
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continue;
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}
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if(!ili9341_writereg(reg, ptr, N)) return 0;
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ptr += N;
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}
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return 1;
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}
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/**
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/**
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* @brief il9341_readreg - read data from register
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* @brief il9341_readreg - read data from register
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* @param reg - register
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* @param reg - register
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@ -33,13 +82,19 @@
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*/
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*/
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int ili9341_readreg(uint8_t reg, uint8_t *data, uint32_t N){
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int ili9341_readreg(uint8_t reg, uint8_t *data, uint32_t N){
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SCRN_Command();
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SCRN_Command();
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if(!spi_write(®, 1)) return 0;
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SCRN_RST_set(0);
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if(!spi_waitbsy()) return 0;
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int r = 0;
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do{
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if(!spi_write(®, 1)) break;
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if(!spi_waitbsy()) break;
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SCRN_Data();
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SCRN_Data();
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if(!spi_read(data, N)) return 0;
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if(!spi_read(data, N)) break;
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if(!spi_waitbsy()) return 0;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_Command();
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SCRN_Command();
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return 1;
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SCRN_RST_set(1);
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return r;
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}
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}
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/**
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/**
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@ -49,13 +104,141 @@ int ili9341_readreg(uint8_t reg, uint8_t *data, uint32_t N){
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* @param N - length of data
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* @param N - length of data
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* @return 0 if failed
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* @return 0 if failed
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*/
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*/
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int ili9341_writereg(uint8_t _U_ reg, const uint8_t _U_ *data, uint32_t _U_ N){
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int ili9341_writereg(uint8_t reg, const uint8_t *data, uint32_t N){
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SCRN_Command();
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SCRN_Command();
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if(!spi_write(®, 1)) return 0;
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SCRN_RST_set(0);
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if(!spi_waitbsy()) return 0;
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int r = 0;
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do{
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if(!spi_write(®, 1)) break;
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if(!spi_waitbsy()) break;
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SCRN_Data();
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SCRN_Data();
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if(!spi_write(data, N)) return 0;
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if(!spi_write(data, N)) break;
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if(!spi_waitbsy()) return 0;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_Command();
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SCRN_Command();
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return 1;
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SCRN_RST_set(1);
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return r;
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}
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// write register with uint16_t data (swap bytes)
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int ili9341_writereg16(uint8_t reg, const uint16_t data){
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SCRN_Command();
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SCRN_RST_set(0);
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int r = 0;
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do{
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if(!spi_write(®, 1)) break;
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if(!spi_waitbsy()) break;
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SCRN_Data();
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uint16_t s = __builtin_bswap16(data);
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if(!spi_write((uint8_t*)&s, 2)) break;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_Command();
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SCRN_RST_set(1);
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return r;
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}
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int ili9341_writereg32(uint8_t reg, uint16_t data1, uint16_t data2){
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SCRN_Command();
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SCRN_RST_set(0);
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int r = 0;
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do{
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if(!spi_write(®, 1)) break;
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if(!spi_waitbsy()) break;
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SCRN_Data();
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uint16_t s = __builtin_bswap16(data1);
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if(!spi_write((uint8_t*)&s, 2)) break;
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s = __builtin_bswap16(data2);
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if(!spi_write((uint8_t*)&s, 2)) break;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_Command();
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SCRN_RST_set(1);
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return r;
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}
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// write simple command
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int ili9341_writecmd(uint8_t cmd){
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SCRN_Command();
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SCRN_RST_set(0);
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int r = 0;
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do{
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if(!spi_write(&cmd, 1)) break;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_RST_set(1);
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return r;
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}
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// write data
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int ili9341_writedata(const uint8_t *data, uint32_t N){
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SCRN_Data();
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SCRN_RST_set(0);
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int r = 0;
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do{
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if(!spi_write(data, N)) break;
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if(!spi_waitbsy()) break;
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r = 1;
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}while(0);
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SCRN_Command();
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SCRN_RST_set(1);
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return r;
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}
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static int fillcmd(uint16_t color, uint8_t cmd, int sz){
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uint16_t rc = __builtin_bswap16(color);
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//USB_sendstr("rc="); USB_sendstr(u2str(rc)); newline();
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SCRN_Command();
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SCRN_RST_set(0);
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int r = 0;
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if(!spi_write(&cmd, 1)) goto rtn;
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if(!spi_waitbsy()) goto rtn;
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r = 1;
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SCRN_Data();
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uint16_t black = 0;
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for(int i = 0; i < sz; ++i){
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IWDG->KR = IWDG_REFRESH;
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if(i%80 == 0){
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if(!spi_write((uint8_t*)&black, 2)){
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r = 0;
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break;
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}
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} else if(!spi_write((uint8_t*)&rc, 2)){
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r = 0;
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break;
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}
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}
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if(!spi_waitbsy()) r = 0;
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rtn:
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SCRN_Command();
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SCRN_RST_set(1);
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return r;
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}
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// fill start
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int ili9341_fill(uint16_t color){
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return fillcmd(color, ILI9341_RAMWR, SCRNSZ/4);
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}
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// fill next
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int ili9341_filln(uint16_t color){
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return fillcmd(color, ILI9341_WRMEMCONT, SCRNSZ/4);
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}
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// fill part (sz < 0 - fill from beginning)
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int ili9341_fillp(uint16_t color, int sz){
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if(sz < 0) return fillcmd(color, ILI9341_RAMWR, -sz);
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else return fillcmd(color, ILI9341_WRMEMCONT, sz);
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}
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// set column limits
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int ili9341_setcol(uint16_t start, uint16_t stop){
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return ili9341_writereg32(ILI9341_CASET, start, stop);
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}
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// set row limits
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int ili9341_setrow(uint16_t start, uint16_t stop){
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return ili9341_writereg32(ILI9341_PASET, start, stop);
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}
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}
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@ -32,14 +32,6 @@
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#define ILI9341_RDDID 0x04
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#define ILI9341_RDDID 0x04
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// Read Display Status
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// Read Display Status
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#define ILI9341_RDDST 0x09
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#define ILI9341_RDDST 0x09
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// Enter Sleep Mode
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#define ILI9341_SLPIN 0x10
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// Sleep Out
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#define ILI9341_SLPOUT 0x11
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// Partial Mode ON
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#define ILI9341_PTLON 0x12
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// Normal Display Mode ON
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#define ILI9341_NORON 0x13
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// Read Display Power Mode
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// Read Display Power Mode
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#define ILI9341_RDMODE 0x0A
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#define ILI9341_RDMODE 0x0A
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// Read Display MADCTL
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// Read Display MADCTL
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@ -48,8 +40,18 @@
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#define ILI9341_RDPIXFMT 0x0C
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#define ILI9341_RDPIXFMT 0x0C
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// Read Display Image Format
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// Read Display Image Format
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#define ILI9341_RDIMGFMT 0x0D
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#define ILI9341_RDIMGFMT 0x0D
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// Read Display Signal Mode
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#define ILI9341_RDSIGMODE 0x0E
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// Read Display Self-Diagnostic Result
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// Read Display Self-Diagnostic Result
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#define ILI9341_RDSELFDIAG 0x0F
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#define ILI9341_RDSELFDIAG 0x0F
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// Enter Sleep Mode
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#define ILI9341_SLPIN 0x10
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// Sleep Out
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#define ILI9341_SLPOUT 0x11
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// Partial Mode ON
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#define ILI9341_PTLON 0x12
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// Normal Display Mode ON
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#define ILI9341_NORON 0x13
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// Display Inversion OFF
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// Display Inversion OFF
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#define ILI9341_INVOFF 0x20
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#define ILI9341_INVOFF 0x20
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// Display Inversion ON
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// Display Inversion ON
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#define ILI9341_PASET 0x2B
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#define ILI9341_PASET 0x2B
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// Memory Write
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// Memory Write
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#define ILI9341_RAMWR 0x2C
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#define ILI9341_RAMWR 0x2C
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// Color Set
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#define ILI9341_COLRSET 0x2D
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// Memory Read
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// Memory Read
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#define ILI9341_RAMRD 0x2E
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#define ILI9341_RAMRD 0x2E
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// Partial Area
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// Partial Area
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#define ILI9341_PTLAR 0x30
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#define ILI9341_PTLAR 0x30
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// Vertical Scrolling Definition
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// Vertical Scrolling Definition
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#define ILI9341_VSCRDEF 0x33
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#define ILI9341_VSCRDEF 0x33
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// Tearing Effect Line OFF
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#define ILI9341_TEAROFF 0x34
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// Tearing Effect Line ON
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#define ILI9341_TEARON 0x35
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// Memory Access Control
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// Memory Access Control
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#define ILI9341_MADCTL 0x36
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#define ILI9341_MADCTL 0x36
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// Vertical Scrolling Start Address
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// Vertical Scrolling Start Address
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#define ILI9341_VSCRSADD 0x37
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#define ILI9341_VSCRSADD 0x37
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// Idle Mode OFF
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#define ILI9341_IDLEOFF 0x38
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// Idle Mode ON
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#define ILI9341_IDLEON 0x39
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// COLMOD: Pixel Format Set
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// COLMOD: Pixel Format Set
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#define ILI9341_PIXFMT 0x3A
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#define ILI9341_COLMOD 0x3A
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// Write Memory Continue
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#define ILI9341_WRMEMCONT 0x3C
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// Read Memory Continue
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#define ILI9341_RDMEMCONT 0x3E
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// Write Display Brightness
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#define ILI9341_WRBRIGHT 0x51
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// Write CTRL Display
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#define ILI9341_WRCTRLDIS 0x53
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// RGB Interface Signal Control
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#define ILI9341_RGBCTL 0xB0
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// Frame Rate Control (In Normal Mode/Full Colors)
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#define ILI9341_FRCTLN 0xB1
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// Frame Rate Control (In Idle Mode/8 colors)
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#define ILI9341_FRCTLI 0xB2
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// Frame Rate control (In Partial Mode/Full Colors)
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#define ILI9341_FRCTLP 0xB3
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// Display Inversion Control
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#define ILI9341_INVCTL 0xB4
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// Blanking Porch Control
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#define ILI9341_BLPOCTL 0xB5
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// Display Function Control
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||||||
|
#define ILI9341_DFUNCTL 0xB6
|
||||||
|
// Entry Mode Set
|
||||||
|
#define ILI9341_ENTRMODSET 0xB7
|
||||||
|
// Backlight Control x (x=1..5, 7,8)
|
||||||
|
#define ILI9341_BACKLCTL(x) (0xB7+x)
|
||||||
|
// Power Control x (x=1..)
|
||||||
|
#define ILI9341_POWCTL(x) (0xBF+x)
|
||||||
|
// VCOM Control 1
|
||||||
|
#define ILI9341_VCOMCTL1 0xC5
|
||||||
|
// VCOM Control 2
|
||||||
|
#define ILI9341_VCOMCTL2 0xC7
|
||||||
|
// Power control A
|
||||||
|
#define ILI9341_POWCTLA 0xCB
|
||||||
|
// Power control B
|
||||||
|
#define ILI9341_POWCTLB 0xCF
|
||||||
|
// Positive Gamma Correction
|
||||||
|
#define ILI9341_POSGAMCOR 0xE0
|
||||||
|
// Negative Gamma Correction
|
||||||
|
#define ILI9341_NEGGAMCOR 0xE1
|
||||||
|
// Driver timing control A1
|
||||||
|
#define ILI9341_DRVTCTLA1 0xE8
|
||||||
|
// Driver timing control A2
|
||||||
|
#define ILI9341_DRVTCTLA2 0xE9
|
||||||
|
// Driver timing control B
|
||||||
|
#define ILI9341_DRVTCTLB 0xEA
|
||||||
|
// Power on sequence control
|
||||||
|
#define ILI9341_POWONSEQCTL 0xED
|
||||||
|
// Enable 3G
|
||||||
|
#define ILI9341_3GEN 0xF2
|
||||||
|
// Interface Control
|
||||||
|
#define ILI9341_IFACECTL 0xF6
|
||||||
|
// Pump ratio control
|
||||||
|
#define ILI9341_PUMPRATCTL 0xF7
|
||||||
|
|
||||||
|
// MADCTL bits:
|
||||||
|
// row address (==1 - upside down)- 0x80
|
||||||
|
#define ILI9341_MADCTL_MY (1<<7)
|
||||||
|
// column address (==1 - right to left) - 0x40
|
||||||
|
#define ILI9341_MADCTL_MX (1<<6)
|
||||||
|
// row/column exchange - 0x20
|
||||||
|
#define ILI9341_MADCTL_MV (1<<5)
|
||||||
|
// vertical refresh direction - 0x10
|
||||||
|
#define ILI9341_MADCTL_ML (1<<4)
|
||||||
|
// == 1 for RGB - 0x08
|
||||||
|
#define ILI9341_MADCTL_RGB (1<<3)
|
||||||
|
// horizontal refresh direction - 0x04
|
||||||
|
#define ILI9341_MADCTL_MH (1<<2)
|
||||||
|
|
||||||
|
#define SCRNSZMAX 320
|
||||||
|
#define SCRNSZMIN 240
|
||||||
|
#define SCRNSZ (SCRNSZMAX*SCRNSZMIN)
|
||||||
|
|
||||||
|
#define DEFMADCTL (ILI9341_MADCTL_MY | ILI9341_MADCTL_RGB)
|
||||||
|
|
||||||
|
int ili9341_init();
|
||||||
int ili9341_readreg(uint8_t reg, uint8_t *data, uint32_t N);
|
int ili9341_readreg(uint8_t reg, uint8_t *data, uint32_t N);
|
||||||
int ili9341_writereg(uint8_t reg, const uint8_t *data, uint32_t N);
|
int ili9341_writereg(uint8_t reg, const uint8_t *data, uint32_t N);
|
||||||
|
int ili9341_writereg16(uint8_t reg, uint16_t data);
|
||||||
|
int ili9341_writereg32(uint8_t reg, uint16_t data1, uint16_t data2);
|
||||||
|
int ili9341_writecmd(uint8_t cmd);
|
||||||
|
int ili9341_writedata(const uint8_t *data, uint32_t N);
|
||||||
|
int ili9341_fill(uint16_t color);
|
||||||
|
int ili9341_filln(uint16_t color);
|
||||||
|
int ili9341_fillp(uint16_t color, int sz);
|
||||||
|
int ili9341_setcol(uint16_t start, uint16_t stop);
|
||||||
|
int ili9341_setrow(uint16_t start, uint16_t stop);
|
||||||
|
|||||||
Binary file not shown.
@ -30,6 +30,8 @@
|
|||||||
|
|
||||||
static uint8_t I2Caddress = 0;
|
static uint8_t I2Caddress = 0;
|
||||||
|
|
||||||
|
static const char *OK = "OK\n";
|
||||||
|
|
||||||
// parno - number of parameter (or -1); cargs - string with arguments (after '=') (==NULL for getter), iarg - integer argument
|
// parno - number of parameter (or -1); cargs - string with arguments (after '=') (==NULL for getter), iarg - integer argument
|
||||||
static int goodstub(const char *cmd, int parno, const char *carg, int32_t iarg){
|
static int goodstub(const char *cmd, int parno, const char *carg, int32_t iarg){
|
||||||
USB_sendstr("cmd="); USB_sendstr(cmd);
|
USB_sendstr("cmd="); USB_sendstr(cmd);
|
||||||
@ -216,7 +218,7 @@ static int scrnrst(const char *cmd, int _U_ parno, const char *c, int32_t i){
|
|||||||
return RET_GOOD;
|
return RET_GOOD;
|
||||||
}
|
}
|
||||||
static int scrnrdwr(const char *cmd, int parno, const char *c, int32_t i){
|
static int scrnrdwr(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
if(parno < 0) return RET_WRONGPARNO;
|
if(parno < 0 || parno > 255) return RET_WRONGPARNO;
|
||||||
if(c){
|
if(c){
|
||||||
if(i < 0 || i > 255) return RET_WRONGARG;
|
if(i < 0 || i > 255) return RET_WRONGARG;
|
||||||
if(!ili9341_writereg(parno, (uint8_t*)&i, 1)) return RET_BAD;
|
if(!ili9341_writereg(parno, (uint8_t*)&i, 1)) return RET_BAD;
|
||||||
@ -227,7 +229,7 @@ static int scrnrdwr(const char *cmd, int parno, const char *c, int32_t i){
|
|||||||
return RET_GOOD;
|
return RET_GOOD;
|
||||||
}
|
}
|
||||||
static int scrnrdwr4(const char *cmd, int parno, const char *c, int32_t i){
|
static int scrnrdwr4(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
if(parno < 0) return RET_WRONGPARNO;
|
if(parno < 0 || parno > 255) return RET_WRONGPARNO;
|
||||||
if(c){
|
if(c){
|
||||||
if(!ili9341_writereg(parno, (uint8_t*)&i, 4)) return RET_BAD;
|
if(!ili9341_writereg(parno, (uint8_t*)&i, 4)) return RET_BAD;
|
||||||
}
|
}
|
||||||
@ -235,6 +237,75 @@ static int scrnrdwr4(const char *cmd, int parno, const char *c, int32_t i){
|
|||||||
sendkeyuhex(cmd, parno, i);
|
sendkeyuhex(cmd, parno, i);
|
||||||
return RET_GOOD;
|
return RET_GOOD;
|
||||||
}
|
}
|
||||||
|
static int scrncmd(const char _U_ *cmd, int parno, const char _U_ *c, int32_t _U_ i){
|
||||||
|
if(parno < 0 || parno > 255) return RET_WRONGPARNO;
|
||||||
|
if(!ili9341_writecmd((uint8_t)parno)) return RET_BAD;
|
||||||
|
USB_sendstr(OK);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scrndata(const char *cmd, int parno, const char _U_ *c, int32_t _U_ i){
|
||||||
|
if(parno < 0 || parno > 255) return RET_WRONGPARNO;
|
||||||
|
uint8_t s = (uint8_t)parno;
|
||||||
|
if(!ili9341_writedata(&s, 1)) return RET_BAD;
|
||||||
|
sendkeyuhex(cmd, parno, s);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scrndata4(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
|
if(parno < 1 || parno > 4) return RET_WRONGPARNO;
|
||||||
|
if(!c) return RET_WRONGARG;
|
||||||
|
if(!ili9341_writedata((uint8_t*)&i, parno)) return RET_BAD;
|
||||||
|
sendkeyuhex(cmd, parno, (uint32_t)i);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scrninit(const char _U_ *cmd, int _U_ parno, const char _U_ *c, int32_t _U_ i){
|
||||||
|
if(!ili9341_init()) return RET_BAD;
|
||||||
|
USB_sendstr(OK);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int scrnfill(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
|
if(parno < 0) parno = RGB(0xf, 0x1f, 0xf);
|
||||||
|
if(parno > 0xffff) return RET_WRONGPARNO;
|
||||||
|
if(!c){if(!ili9341_fill((uint16_t)parno)) return RET_BAD;
|
||||||
|
}else{
|
||||||
|
if(i < 1) return RET_WRONGARG;
|
||||||
|
if(!ili9341_fillp((uint16_t)parno, -i)) return RET_BAD;
|
||||||
|
}
|
||||||
|
sendkeyuhex(cmd, -1, i);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scrnfilln(const char *cmd, int _U_ parno, const char *c, int32_t i){
|
||||||
|
if(parno < 0) parno = RGB(0xf, 0x1f, 0xf);
|
||||||
|
if(parno > 0xffff) return RET_WRONGPARNO;
|
||||||
|
if(!c){if(!ili9341_filln((uint16_t)parno)) return RET_BAD;
|
||||||
|
}else{
|
||||||
|
if(i < 1) return RET_WRONGARG;
|
||||||
|
if(!ili9341_fillp((uint16_t)parno, i)) return RET_BAD;
|
||||||
|
}
|
||||||
|
sendkeyuhex(cmd, -1, i);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int smadctl(const char *cmd, int _U_ parno, const char *c, int32_t i){
|
||||||
|
if(!c) i = 0;
|
||||||
|
if(i < 0 || i > 255) return RET_WRONGARG;
|
||||||
|
if(!ili9341_writereg(ILI9341_MADCTL, (uint8_t*)&i, 1)) return RET_BAD;
|
||||||
|
sendkeyuhex(cmd, -1, i);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scolrow(int col, const char *cmd, int parno, const char *c, int32_t i){
|
||||||
|
if(!c || i < 0 || i > 319) return RET_WRONGARG;
|
||||||
|
if(parno < 0 || parno > 319) return RET_WRONGPARNO;
|
||||||
|
if(col){if(!ili9341_setcol((uint16_t)parno, (uint16_t)i)) return RET_BAD;}
|
||||||
|
else{if(!ili9341_setrow((uint16_t)parno, (uint16_t)i)) return RET_BAD;}
|
||||||
|
sendkeyu(cmd, parno, i);
|
||||||
|
return RET_GOOD;
|
||||||
|
}
|
||||||
|
static int scol(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
|
return scolrow(1, cmd, parno, c, i);
|
||||||
|
}
|
||||||
|
static int srow(const char *cmd, int parno, const char *c, int32_t i){
|
||||||
|
return scolrow(0, cmd, parno, c, i);
|
||||||
|
}
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
int (*fn)(const char*, int, const char*, int32_t);
|
int (*fn)(const char*, int, const char*, int32_t);
|
||||||
@ -263,6 +334,15 @@ commands cmdlist[] = {
|
|||||||
{scrnrst, "Srst", "reset (1/0)"},
|
{scrnrst, "Srst", "reset (1/0)"},
|
||||||
{scrnrdwr, "Sreg", "read/write 8-bit register"},
|
{scrnrdwr, "Sreg", "read/write 8-bit register"},
|
||||||
{scrnrdwr4, "Sregx", "read/write 32-bit register"},
|
{scrnrdwr4, "Sregx", "read/write 32-bit register"},
|
||||||
|
{scrncmd, "Scmd", "write 8bit command"},
|
||||||
|
{scrndata, "Sdat", "write 8bit data"},
|
||||||
|
{scrndata4, "Sdatx", "write x bytes of data"},
|
||||||
|
{scrninit, "Sini", "init screen"},
|
||||||
|
{scrnfill, "Sfill", "fill screen with color (=npix)"},
|
||||||
|
{scrnfilln, "Sfilln", "fill screen (next) with color (=npix)"},
|
||||||
|
{smadctl, "Smad", "change MADCTL"},
|
||||||
|
{scol, "Scol", "set column limits (low=high)"},
|
||||||
|
{srow, "Srow", "set row limits (low=high)"},
|
||||||
{NULL, "ADC commands", NULL},
|
{NULL, "ADC commands", NULL},
|
||||||
{adcval, "ADC", "get ADCx value (without x - for all)"},
|
{adcval, "ADC", "get ADCx value (without x - for all)"},
|
||||||
{adcvoltage, "ADCv", "get ADCx voltage (without x - for all)"},
|
{adcvoltage, "ADCv", "get ADCx voltage (without x - for all)"},
|
||||||
|
|||||||
@ -37,7 +37,7 @@ volatile uint32_t wctr;
|
|||||||
void spi_setup(){
|
void spi_setup(){
|
||||||
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
|
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
|
||||||
// Baudrate = 0b011 - fpclk/16 = 2MHz; software slave management (without hardware NSS pin)
|
// Baudrate = 0b011 - fpclk/16 = 2MHz; software slave management (without hardware NSS pin)
|
||||||
SPI2->CR1 = SPI_CR1_MSTR | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_SSM | SPI_CR1_SSI;
|
SPI2->CR1 = /*SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE |*/ SPI_CR1_MSTR | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_SSM | SPI_CR1_SSI;
|
||||||
// 8bit; RXNE generates after 8bit of data in FIFO
|
// 8bit; RXNE generates after 8bit of data in FIFO
|
||||||
SPI2->CR2 = SPI_CR2_FRXTH | SPI_CR2_DS_2|SPI_CR2_DS_1|SPI_CR2_DS_0 /*| SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN*/;
|
SPI2->CR2 = SPI_CR2_FRXTH | SPI_CR2_DS_2|SPI_CR2_DS_1|SPI_CR2_DS_0 /*| SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN*/;
|
||||||
spi_status = SPI_READY;
|
spi_status = SPI_READY;
|
||||||
@ -50,7 +50,7 @@ int spi_waitbsy(){
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief spi_send - send data over SPI2
|
* @brief spi_send - send data over SPI2 (change data array with received bytes)
|
||||||
* @param data - data to read
|
* @param data - data to read
|
||||||
* @param n - length of data
|
* @param n - length of data
|
||||||
* @return 0 if failed
|
* @return 0 if failed
|
||||||
@ -64,7 +64,7 @@ int spi_write(const uint8_t *data, uint32_t n){
|
|||||||
WAITX(!(SPI2->SR & SPI_SR_TXE));
|
WAITX(!(SPI2->SR & SPI_SR_TXE));
|
||||||
SPIDR = data[x];
|
SPIDR = data[x];
|
||||||
//WAITX(!(SPI2->SR & SPI_SR_RXNE));
|
//WAITX(!(SPI2->SR & SPI_SR_RXNE));
|
||||||
//(void) SPI2->DR; // clear RXNE after last things
|
//data[x] = SPI2->DR; // clear RXNE after last things
|
||||||
}
|
}
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
@ -91,6 +91,7 @@ int spi_read(uint8_t _U_ *data, uint32_t _U_ n){
|
|||||||
DBG("not ready");
|
DBG("not ready");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
//SPI2->CR1 &= ~SPI_CR1_BIDIOE; // Rx
|
||||||
while(SPI2->SR & SPI_SR_RXNE) (void) SPI2->DR;
|
while(SPI2->SR & SPI_SR_RXNE) (void) SPI2->DR;
|
||||||
for(uint32_t x = 0; x < n; ++x){
|
for(uint32_t x = 0; x < n; ++x){
|
||||||
WAITX(!(SPI2->SR & SPI_SR_TXE));
|
WAITX(!(SPI2->SR & SPI_SR_TXE));
|
||||||
@ -98,6 +99,7 @@ int spi_read(uint8_t _U_ *data, uint32_t _U_ n){
|
|||||||
WAITX(!(SPI2->SR & SPI_SR_RXNE));
|
WAITX(!(SPI2->SR & SPI_SR_RXNE));
|
||||||
data[x] = SPI2->DR;
|
data[x] = SPI2->DR;
|
||||||
}
|
}
|
||||||
|
//SPI2->CR1 |= SPI_CR1_BIDIOE; // turn off clocking
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -1,2 +1,2 @@
|
|||||||
#define BUILD_NUMBER "110"
|
#define BUILD_NUMBER "152"
|
||||||
#define BUILD_DATE "2023-05-08"
|
#define BUILD_DATE "2023-05-09"
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user