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remove usart1 as it used common DMA with SPI2rx

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This commit is contained in:
Edward Emelianov 2025-03-27 17:49:46 +03:00
parent 33497f79b5
commit e5b3edeffa
9 changed files with 74 additions and 48 deletions
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BIN
F1:F103/BISS_C_encoders/encoders.bin
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31
F1:F103/BISS_C_encoders/encoders.creator.user
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@ -1,10 +1,10 @@
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@ -40,9 +40,9 @@
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@ -51,10 +51,10 @@
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@ -79,7 +79,7 @@
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@ -121,8 +122,8 @@
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2
F1:F103/BISS_C_encoders/encoders.files
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@ -11,8 +11,6 @@ spi.c
spi.h
strfunc.c
strfunc.h
usart.c
usart.h
usb_descr.c
usb_descr.h
usb_lib.c

9
F1:F103/BISS_C_encoders/hardware.c
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@ -20,16 +20,19 @@
static inline void gpio_setup(){
// Enable clocks to the GPIO subsystems (PB for ADC), turn on AFIO clocking to disable SWD/JTAG
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN;
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN | RCC_APB2ENR_SPI1EN;
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
// turn off SWJ/JTAG
// AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE;
AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE; // for PA15
// Set led as opendrain output
GPIOC->CRH |= CRH(13, CNF_ODOUTPUT|MODE_SLOW);
GPIOA->CRL = CRL(5, CNF_AFPP|MODE_FAST) | CRL(6, CNF_FLINPUT);
// SPI1 pins
//GPIOA->CRL = CRL(5, CNF_AFPP|MODE_FAST) | CRL(6, CNF_FLINPUT);
// USB pullup (PA15) - pushpull output
GPIOA->CRH = CRH(15, CNF_PPOUTPUT|MODE_SLOW);
GPIOB->CRH = CRH(13, CNF_AFPP|MODE_FAST) | CRH(14, CNF_FLINPUT);
// SPI2 pins
//GPIOB->CRH = CRH(13, CNF_AFPP|MODE_FAST) | CRH(14, CNF_FLINPUT);
}
void hw_setup(){

23
F1:F103/BISS_C_encoders/main.c
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@ -40,11 +40,12 @@ int main(){
hw_setup();
USBPU_OFF();
SysTick_Config(72000);
/*
#ifdef EBUG
usart_setup();
DBG("Start");
uint32_t tt = 0;
#endif
*/
USB_setup();
#ifndef EBUG
iwdg_setup();
@ -56,6 +57,7 @@ int main(){
LED_blink(LED0);
lastT = Tms;
}
/*
#ifdef EBUG
if(Tms != tt){
__disable_irq();
@ -64,6 +66,7 @@ int main(){
__enable_irq();
}
#endif
*/
if(CDCready[I_CMD]){
if(Tms - lastS > 9999){
USB_sendstr(I_CMD, "Tms=");
@ -75,6 +78,12 @@ int main(){
if(l < 0) CMDWRn("ERROR: CMD USB buffer overflow or string was too long");
else if(l) parse_cmd(inbuff);
}
int showval = spi_read_enc(0, encbuf);
if(CDCready[I_CMD] && showval){
CMDWR("ENCX=");
hexdump(I_CMD, encbuf, ENCODER_BUFSZ);
newline(I_CMD);
}
if(CDCready[I_X]){
int l = USB_receivestr(I_X, inbuff, RBINSZ);
if(l < 0) CMDWRn("ERROR: encX USB buffer overflow or string was too long");
@ -83,9 +92,14 @@ int main(){
CMDWR(inbuff);
CMDWR("'\n");
}
if(spi_read_enc(0, encbuf)){ // send encoder data
if(showval) // send encoder data
hexdump(I_X, encbuf, ENCODER_BUFSZ);
}
}
showval = spi_read_enc(1, encbuf);
if(CDCready[I_CMD] && showval){
CMDWR("ENCY=");
hexdump(I_CMD, encbuf, ENCODER_BUFSZ);
newline(I_CMD);
}
if(CDCready[I_Y]){
int l = USB_receivestr(I_Y, inbuff, RBINSZ);
@ -95,9 +109,8 @@ int main(){
CMDWR(inbuff);
CMDWR("'\n");
}
if(spi_read_enc(1, encbuf)){ // send encoder data
if(showval) // send encoder data
hexdump(I_Y, encbuf, ENCODER_BUFSZ);
}
}
}
return 0;

22
F1:F103/BISS_C_encoders/proto.c
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@ -55,9 +55,11 @@ typedef enum{
C_dumpconf,
C_erasestorage,
C_storeconf,
C_reboot,
C_reset,
C_fin,
C_encstart,
C_encX,
C_encY,
C_spistat,
C_spiinit,
C_spideinit,
@ -154,7 +156,7 @@ static errcode_e storeconf(_U_ cmd_e idx, _U_ char *par){
return ERR_OK;
}
static errcode_e reboot(_U_ cmd_e idx, _U_ char *par){
static errcode_e reset(_U_ cmd_e idx, _U_ char *par){
NVIC_SystemReset();
return ERR_OK; // never reached
}
@ -164,9 +166,11 @@ static errcode_e fini(_U_ cmd_e idx, _U_ char *par){
return ERR_OK; // never reached
}
static errcode_e encstart(_U_ cmd_e idx, _U_ char *par){
if(!spi_start_enc(0)) return ERR_FAIL;
if(!spi_start_enc(1)) return ERR_FAIL;
static errcode_e encstart(cmd_e idx, _U_ char *par){
if(idx == C_encX || idx == C_encstart)
if(!spi_start_enc(0)) return ERR_FAIL;
if(idx == C_encY || idx == C_encstart)
if(!spi_start_enc(1)) return ERR_FAIL;
return ERR_OK;
}
@ -223,9 +227,11 @@ static const funcdescr_t commands[C_AMOUNT] = {
[C_dumpconf] = {"dumpconf", dumpconf},
[C_erasestorage] = {"erasestorage", erasestor},
[C_storeconf] = {"storeconf", storeconf},
[C_reboot] = {"reboot", reboot},
[C_reset] = {"reset", reset},
[C_fin] = {"fin", fini},
[C_encstart] = {"readenc", encstart},
[C_encX] = {"readX", encstart},
[C_encY] = {"readY", encstart},
[C_spistat] = {"spistat", spistat},
[C_spiinit] = {"spiinit", spiinit},
[C_spideinit] = {"spideinit", spideinit},
@ -257,8 +263,10 @@ static const help_t helpmessages[] = {
{-1, "Different commands"},
{C_dummy, "dummy integer setter/getter"},
{C_encstart, "start reading encoders"},
{C_encX, "read only X encoder"},
{C_encY, "read only Y encoder"},
{C_help, "show this help"},
{C_reboot, "reboot MCU"},
{C_reset, "reset MCU"},
{C_spideinit, "deinit SPI"},
{C_spiinit, "init SPI"},
{C_spistat, "get status of both SPI interfaces"},

30
F1:F103/BISS_C_encoders/spi.c
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@ -47,20 +47,20 @@ void spi_setup(uint8_t idx){
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
volatile DMA_Channel_TypeDef *DMA = DMAs[idx];
if(idx == 1){ // PA5/PA6; 72MHz
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
RCC->APB2RSTR = RCC_APB2RSTR_SPI1RST;
RCC->APB2RSTR = 0; // clear reset
GPIOA->CRL = (GPIOA->CRL & ~(GPIO_CRL_CNF5 | GPIO_CRL_CNF6))
| CRL(5, CNF_AFPP|MODE_FAST) | CRL(6, CNF_FLINPUT);
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
SPI->CR1 = SPI_CR1_BR_0 | SPI_CR1_BR_2; // Fpclk/64
SPI->CR1 = SPI_CR1_BR_1 | SPI_CR1_BR_2; // Fpclk/128
NVIC_EnableIRQ(DMA1_Channel2_IRQn); // enable Rx interrupt
}else if(idx == 2){ // PB12..PB15; 36MHz
}else if(idx == 2){ // PB13/PB14; 36MHz
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
RCC->APB1RSTR = RCC_APB1RSTR_SPI2RST;
RCC->APB1RSTR = 0;
GPIOB->CRH = (GPIOB->CRH & ~(GPIO_CRH_CNF13 | GPIO_CRH_CNF14))
| CRH(13, CNF_AFPP|MODE_FAST) | CRH(14, CNF_FLINPUT);
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
SPI->CR1 = SPI_CR1_BR_2; // Fpclk/32
SPI->CR1 = SPI_CR1_BR_0 | SPI_CR1_BR_2; // Fpclk/64
NVIC_EnableIRQ(DMA1_Channel4_IRQn);
}else return; // err
// Baudrate = 0b110 - fpclk/128
@ -103,11 +103,15 @@ void spi_deinit(uint8_t idx){
spi_status[idx] = SPI_NOTREADY;
}
int spi_waitbsy(uint8_t idx){
static int spi_waitbsy(uint8_t idx){
CHKIDXR(idx);
DBGs(u2str(idx));
DBG("wait busy");
WAITX(SPIs[idx]->SR & SPI_SR_BSY);
if(SPIs[idx]->SR & SPI_SR_BSY){
DBG("Busy - turn off");
spi_onoff(idx, 0); // turn off SPI if it's busy
}
//DBGs(u2str(idx));
//DBG("wait busy");
//WAITX(SPIs[idx]->SR & SPI_SR_BSY);
return 1;
}
@ -143,6 +147,8 @@ int spi_start_enc(int encodernum){
// SSI got fresh data
void dma1_channel2_isr(){
// turn off DMA
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
if(DMA1->ISR & DMA_ISR_TEIF2){
DMA1->IFCR = DMA_IFCR_CTEIF2;
}
@ -155,11 +161,11 @@ void dma1_channel2_isr(){
//encoderbuf[7] = (ctr >> 0 ) & 0xff;
}
spi_onoff(1, 0);
// turn off DMA
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
}
void dma1_channel4_isr(){
// turn off DMA
DMA1_Channel4->CCR &= ~DMA_CCR_EN;
if(DMA1->ISR & DMA_ISR_TEIF4){
DMA1->IFCR = DMA_IFCR_CTEIF4;
}
@ -168,7 +174,5 @@ void dma1_channel4_isr(){
freshdata[1] = 1;
}
spi_onoff(2, 0);
// turn off DMA
DMA1_Channel4->CCR &= ~DMA_CCR_EN;
}

1
F1:F103/BISS_C_encoders/spi.h
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@ -17,6 +17,5 @@ extern spiStatus spi_status[AMOUNT_OF_SPI+1];
void spi_onoff(uint8_t idx, uint8_t on);
void spi_deinit(uint8_t idx);
void spi_setup(uint8_t idx);
int spi_waitbsy(uint8_t idx);
int spi_start_enc(int encodernum);
int spi_read_enc(uint8_t encno, uint8_t buf[8]);

4
F1:F103/BISS_C_encoders/version.inc
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@ -1,2 +1,2 @@
#define BUILD_NUMBER "63"
#define BUILD_DATE "2025-03-26"
#define BUILD_NUMBER "73"
#define BUILD_DATE "2025-03-27"