mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-02-28 03:44:30 +03:00
remove usart1 as it used common DMA with SPI2rx
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@@ -47,20 +47,20 @@ void spi_setup(uint8_t idx){
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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volatile DMA_Channel_TypeDef *DMA = DMAs[idx];
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if(idx == 1){ // PA5/PA6; 72MHz
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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RCC->APB2RSTR = RCC_APB2RSTR_SPI1RST;
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RCC->APB2RSTR = 0; // clear reset
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GPIOA->CRL = (GPIOA->CRL & ~(GPIO_CRL_CNF5 | GPIO_CRL_CNF6))
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| CRL(5, CNF_AFPP|MODE_FAST) | CRL(6, CNF_FLINPUT);
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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SPI->CR1 = SPI_CR1_BR_0 | SPI_CR1_BR_2; // Fpclk/64
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SPI->CR1 = SPI_CR1_BR_1 | SPI_CR1_BR_2; // Fpclk/128
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NVIC_EnableIRQ(DMA1_Channel2_IRQn); // enable Rx interrupt
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}else if(idx == 2){ // PB12..PB15; 36MHz
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}else if(idx == 2){ // PB13/PB14; 36MHz
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RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
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RCC->APB1RSTR = RCC_APB1RSTR_SPI2RST;
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RCC->APB1RSTR = 0;
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GPIOB->CRH = (GPIOB->CRH & ~(GPIO_CRH_CNF13 | GPIO_CRH_CNF14))
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| CRH(13, CNF_AFPP|MODE_FAST) | CRH(14, CNF_FLINPUT);
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RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
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SPI->CR1 = SPI_CR1_BR_2; // Fpclk/32
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SPI->CR1 = SPI_CR1_BR_0 | SPI_CR1_BR_2; // Fpclk/64
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NVIC_EnableIRQ(DMA1_Channel4_IRQn);
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}else return; // err
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// Baudrate = 0b110 - fpclk/128
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@@ -103,11 +103,15 @@ void spi_deinit(uint8_t idx){
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spi_status[idx] = SPI_NOTREADY;
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}
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int spi_waitbsy(uint8_t idx){
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static int spi_waitbsy(uint8_t idx){
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CHKIDXR(idx);
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DBGs(u2str(idx));
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DBG("wait busy");
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WAITX(SPIs[idx]->SR & SPI_SR_BSY);
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if(SPIs[idx]->SR & SPI_SR_BSY){
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DBG("Busy - turn off");
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spi_onoff(idx, 0); // turn off SPI if it's busy
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}
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//DBGs(u2str(idx));
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//DBG("wait busy");
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//WAITX(SPIs[idx]->SR & SPI_SR_BSY);
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return 1;
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}
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@@ -143,6 +147,8 @@ int spi_start_enc(int encodernum){
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// SSI got fresh data
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void dma1_channel2_isr(){
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// turn off DMA
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DMA1_Channel2->CCR &= ~DMA_CCR_EN;
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if(DMA1->ISR & DMA_ISR_TEIF2){
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DMA1->IFCR = DMA_IFCR_CTEIF2;
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}
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@@ -155,11 +161,11 @@ void dma1_channel2_isr(){
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//encoderbuf[7] = (ctr >> 0 ) & 0xff;
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}
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spi_onoff(1, 0);
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// turn off DMA
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DMA1_Channel2->CCR &= ~DMA_CCR_EN;
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}
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void dma1_channel4_isr(){
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// turn off DMA
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DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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if(DMA1->ISR & DMA_ISR_TEIF4){
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DMA1->IFCR = DMA_IFCR_CTEIF4;
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}
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@@ -168,7 +174,5 @@ void dma1_channel4_isr(){
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freshdata[1] = 1;
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}
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spi_onoff(2, 0);
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// turn off DMA
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DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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}
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