mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-02-28 03:44:30 +03:00
test USART with ringbuffer - OK; TODO: rewrite all proto for usage USB & USART
This commit is contained in:
Edward Emelianov
368
F3:F303/MLX90640-allsky/usb_lib.c
Normal file
368
F3:F303/MLX90640-allsky/usb_lib.c
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@@ -0,0 +1,368 @@
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/*
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* Copyright 2024 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "usb_lib.h"
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#include "usb_descr.h"
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#include "usb_dev.h"
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static ep_t endpoints[STM32ENDPOINTS];
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static uint16_t USB_Addr = 0;
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static uint8_t setupdatabuf[EP0DATABUF_SIZE];
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static config_pack_t *setup_packet = (config_pack_t*) setupdatabuf;
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volatile uint8_t usbON = 0; // device is configured and active
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static uint16_t configuration = 0; // reply for GET_CONFIGURATION (==1 if configured)
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static inline void std_d2h_req(){
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uint16_t st = 0;
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switch(setup_packet->bRequest){
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case GET_DESCRIPTOR:
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get_descriptor(setup_packet);
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break;
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case GET_STATUS:
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EP_WriteIRQ(0, (uint8_t *)&st, 2); // send status: Bus Powered
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break;
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case GET_CONFIGURATION:
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EP_WriteIRQ(0, (uint8_t*)&configuration, 1);
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break;
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default:
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EP_WriteIRQ(0, NULL, 0);
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break;
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}
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}
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static inline void std_h2d_req(){
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switch(setup_packet->bRequest){
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case SET_ADDRESS:
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// new address will be assigned later - after acknowlegement or request to host
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USB_Addr = setup_packet->wValue;
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break;
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case SET_CONFIGURATION:
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// Now device configured
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configuration = setup_packet->wValue;
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set_configuration();
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usbON = 1;
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break;
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default:
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break;
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}
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}
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void WEAK usb_standard_request(){
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uint8_t recipient = REQUEST_RECIPIENT(setup_packet->bmRequestType);
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uint8_t dev2host = (setup_packet->bmRequestType & 0x80) ? 1 : 0;
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switch(recipient){
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case REQ_RECIPIENT_DEVICE:
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if(dev2host){
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std_d2h_req();
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}else{
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std_h2d_req();
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}
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break;
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case REQ_RECIPIENT_INTERFACE:
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if(dev2host && setup_packet->bRequest == GET_DESCRIPTOR){
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get_descriptor(setup_packet);
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}
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break;
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case REQ_RECIPIENT_ENDPOINT:
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if(setup_packet->bRequest == CLEAR_FEATURE){
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}else{ /* wrong */ }
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break;
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default:
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break;
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}
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if(!dev2host) EP_WriteIRQ(0, NULL, 0);
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}
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void WEAK usb_class_request(config_pack_t *req, uint8_t _U_ *data, uint16_t _U_ datalen){
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switch(req->bRequest){
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case GET_INTERFACE:
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break;
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case SET_CONFIGURATION: // set featuring by req->wValue
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break;
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default:
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break;
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}
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if(0 == (setup_packet->bmRequestType & 0x80)) // host2dev
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EP_WriteIRQ(0, NULL, 0);
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}
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void WEAK usb_vendor_request(config_pack_t _U_ *packet, uint8_t _U_ *data, uint16_t _U_ datalen){
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if(0 == (setup_packet->bmRequestType & 0x80)) // host2dev
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EP_WriteIRQ(0, NULL, 0);
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}
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/*
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bmRequestType: 76543210
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7 direction: 0 - host->device, 1 - device->host
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65 type: 0 - standard, 1 - class, 2 - vendor
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4..0 getter: 0 - device, 1 - interface, 2 - endpoint, 3 - other
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*/
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/**
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* Endpoint0 (control) handler
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*/
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static void EP0_Handler(){
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uint8_t ep0dbuflen = 0;
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uint8_t ep0databuf[EP0DATABUF_SIZE];
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uint16_t epstatus = KEEP_DTOG(USB->EPnR[0]); // EP0R on input -> return this value after modifications
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int rxflag = RX_FLAG(epstatus);
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//if(rxflag){ }
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// check direction
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if(USB->ISTR & USB_ISTR_DIR){ // OUT interrupt - receive data, CTR_RX==1 (if CTR_TX == 1 - two pending transactions: receive following by transmit)
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if(epstatus & USB_EPnR_SETUP){ // setup packet -> copy data to conf_pack
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EP_Read(0, setupdatabuf);
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// interrupt handler will be called later
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}else if(epstatus & USB_EPnR_CTR_RX){ // data packet -> push received data to ep0databuf
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//if(endpoints[0].rx_cnt){ }
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ep0dbuflen = EP_Read(0, ep0databuf);
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}
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}
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if(rxflag){
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uint8_t reqtype = REQUEST_TYPE(setup_packet->bmRequestType);
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switch(reqtype){
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case REQ_TYPE_STANDARD:
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if(SETUP_FLAG(epstatus)){
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usb_standard_request();
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}else{ }
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break;
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case REQ_TYPE_CLASS:
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usb_class_request(setup_packet, ep0databuf, ep0dbuflen);
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break;
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case REQ_TYPE_VENDOR:
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usb_vendor_request(setup_packet, ep0databuf, ep0dbuflen);
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break;
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default:
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EP_WriteIRQ(0, NULL, 0);
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break;
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}
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}
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if(TX_FLAG(epstatus)){
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// now we can change address after enumeration
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if ((USB->DADDR & USB_DADDR_ADD) != USB_Addr){
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USB->DADDR = USB_DADDR_EF | USB_Addr;
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usbON = 0;
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}
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}
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//epstatus = KEEP_DTOG(USB->EPnR[0]);
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if(rxflag) epstatus ^= USB_EPnR_STAT_TX; // start ZLP or data transmission
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else epstatus &= ~USB_EPnR_STAT_TX; // or leave unchanged
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// keep DTOGs, clear CTR_RX,TX, set RX VALID
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USB->EPnR[0] = (epstatus & ~(USB_EPnR_CTR_RX|USB_EPnR_CTR_TX)) ^ USB_EPnR_STAT_RX;
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}
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/**
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* Write data to EP buffer (called from IRQ handler)
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* @param number - EP number
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* @param *buf - array with data
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* @param size - its size
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*/
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void EP_WriteIRQ(uint8_t number, const uint8_t *buf, uint16_t size){
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if(size > endpoints[number].txbufsz) size = endpoints[number].txbufsz;
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uint16_t N2 = (size + 1) >> 1;
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// the buffer is 16-bit, so we should copy data as it would be uint16_t
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uint16_t *buf16 = (uint16_t *)buf;
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#if defined USB1_16
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// very bad: what if `size` is odd?
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uint32_t *out = (uint32_t *)endpoints[number].tx_buf;
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for(int i = 0; i < N2; ++i, ++out){
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*out = buf16[i];
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}
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#elif defined USB2_16
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// use mememcpy instead?
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for(int i = 0; i < N2; i++){
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endpoints[number].tx_buf[i] = buf16[i];
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}
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#else
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#error "Define USB1_16 or USB2_16"
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#endif
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USB_BTABLE->EP[number].USB_COUNT_TX = size;
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}
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/**
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* Write data to EP buffer (called outside IRQ handler)
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* @param number - EP number
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* @param *buf - array with data
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* @param size - its size
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*/
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void EP_Write(uint8_t number, const uint8_t *buf, uint16_t size){
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EP_WriteIRQ(number, buf, size);
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uint16_t epstatus = KEEP_DTOG(USB->EPnR[number]);
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// keep DTOGs and RX stat, clear CTR_TX & set TX VALID to start transmission
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USB->EPnR[number] = (epstatus & ~(USB_EPnR_CTR_TX | USB_EPnR_STAT_RX)) ^ USB_EPnR_STAT_TX;
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}
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/*
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* Copy data from EP buffer into user buffer area
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* @param *buf - user array for data
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* @return amount of data read
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*/
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int EP_Read(uint8_t number, uint8_t *buf){
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int sz = endpoints[number].rx_cnt;
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if(!sz) return 0;
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endpoints[number].rx_cnt = 0;
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#if defined USB1_16
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int n = (sz + 1) >> 1;
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uint32_t *in = (uint32_t*)endpoints[number].rx_buf;
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uint16_t *out = (uint16_t*)buf;
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for(int i = 0; i < n; ++i, ++in)
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out[i] = *(uint16_t*)in;
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#elif defined USB2_16
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// use mememcpy instead?
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for(int i = 0; i < sz; ++i)
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buf[i] = endpoints[number].rx_buf[i];
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#else
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#error "Define USB1_16 or USB2_16"
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#endif
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return sz;
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}
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static uint16_t lastaddr = LASTADDR_DEFAULT;
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/**
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* Endpoint initialisation
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* @param number - EP num (0...7)
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* @param type - EP type (EP_TYPE_BULK, EP_TYPE_CONTROL, EP_TYPE_ISO, EP_TYPE_INTERRUPT)
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* @param txsz - transmission buffer size @ USB/CAN buffer
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* @param rxsz - reception buffer size @ USB/CAN buffer
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* @param uint16_t (*func)(ep_t *ep) - EP handler function
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* @return 0 if all OK
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*/
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int EP_Init(uint8_t number, uint8_t type, uint16_t txsz, uint16_t rxsz, void (*func)(ep_t ep)){
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if(number >= STM32ENDPOINTS) return 4; // out of configured amount
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if(txsz > USB_BTABLE_SIZE/ACCESSZ || rxsz > USB_BTABLE_SIZE/ACCESSZ) return 1; // buffer too large
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if(lastaddr + txsz + rxsz >= USB_BTABLE_SIZE/ACCESSZ) return 2; // out of btable
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USB->EPnR[number] = (type << 9) | (number & USB_EPnR_EA);
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USB->EPnR[number] ^= USB_EPnR_STAT_RX | USB_EPnR_STAT_TX_1;
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if(rxsz & 1) return 3; // wrong rx buffer size
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uint16_t countrx = 0;
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if(rxsz < 64) countrx = rxsz / 2;
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else{
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if(rxsz & 0x1f) return 3; // should be multiple of 32
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countrx = 31 + rxsz / 32;
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}
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USB_BTABLE->EP[number].USB_ADDR_TX = lastaddr;
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endpoints[number].tx_buf = (uint16_t *)(USB_BTABLE_BASE + lastaddr * ACCESSZ);
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endpoints[number].txbufsz = txsz;
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lastaddr += txsz;
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USB_BTABLE->EP[number].USB_COUNT_TX = 0;
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USB_BTABLE->EP[number].USB_ADDR_RX = lastaddr;
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endpoints[number].rx_buf = (uint8_t *)(USB_BTABLE_BASE + lastaddr * ACCESSZ);
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lastaddr += rxsz;
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USB_BTABLE->EP[number].USB_COUNT_RX = countrx << 10;
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endpoints[number].func = func;
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return 0;
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}
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// standard IRQ handler
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void USB_IRQ(){
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uint32_t CNTR = USB->CNTR;
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USB->CNTR = 0;
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if(USB->ISTR & USB_ISTR_RESET){
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usbON = 0;
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// Reinit registers
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CNTR = USB_CNTR_RESETM | USB_CNTR_CTRM | USB_CNTR_SUSPM;
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// Endpoint 0 - CONTROL
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// ON USB LS size of EP0 may be 8 bytes, but on FS it should be 64 bytes!
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lastaddr = LASTADDR_DEFAULT;
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// clear address, leave only enable bit
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USB->DADDR = USB_DADDR_EF;
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USB->ISTR = ~USB_ISTR_RESET;
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if(EP_Init(0, EP_TYPE_CONTROL, USB_EP0BUFSZ, USB_EP0BUFSZ, EP0_Handler)){
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return;
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};
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}
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if(USB->ISTR & USB_ISTR_CTR){
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// EP number
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uint8_t n = USB->ISTR & USB_ISTR_EPID;
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// copy received bytes amount
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endpoints[n].rx_cnt = USB_BTABLE->EP[n].USB_COUNT_RX & 0x3FF; // low 10 bits is counter
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// call EP handler
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if(endpoints[n].func) endpoints[n].func();
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}
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if(USB->ISTR & USB_ISTR_WKUP){ // wakeup
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#ifndef STM32F0
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CNTR &= ~(USB_CNTR_FSUSP | USB_CNTR_LP_MODE | USB_CNTR_WKUPM); // clear suspend flags
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#else
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CNTR &= ~(USB_CNTR_FSUSP | USB_CNTR_LPMODE | USB_CNTR_WKUPM);
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#endif
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USB->ISTR = ~USB_ISTR_WKUP;
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}
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if(USB->ISTR & USB_ISTR_SUSP){ // suspend -> still no connection, may sleep
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usbON = 0;
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#ifndef STM32F0
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CNTR |= USB_CNTR_FSUSP | USB_CNTR_LP_MODE | USB_CNTR_WKUPM;
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#else
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CNTR |= USB_CNTR_FSUSP | USB_CNTR_LPMODE | USB_CNTR_WKUPM;
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#endif
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CNTR &= ~(USB_CNTR_SUSPM);
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USB->ISTR = ~USB_ISTR_SUSP;
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}
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USB->CNTR = CNTR; // rewoke interrupts
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}
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// here we suppose that all PIN settings done in hw_setup earlier
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void USB_setup(){
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#if defined STM32F3
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NVIC_DisableIRQ(USB_LP_IRQn);
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// remap USB LP & Wakeup interrupts to 75 and 76 - works only on pure F303
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // enable tacting of SYSCFG
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SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
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#elif defined STM32F1
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NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
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NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn);
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#elif defined STM32F0
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NVIC_DisableIRQ(USB_IRQn);
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RCC->APB1ENR |= RCC_APB1ENR_CRSEN;
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RCC->CFGR3 &= ~RCC_CFGR3_USBSW; // reset USB
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RCC->CR2 |= RCC_CR2_HSI48ON; // turn ON HSI48
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uint32_t tmout = 16000000;
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while(!(RCC->CR2 & RCC_CR2_HSI48RDY)){if(--tmout == 0) break;}
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FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
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CRS->CFGR &= ~CRS_CFGR_SYNCSRC;
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CRS->CFGR |= CRS_CFGR_SYNCSRC_1; // USB SOF selected as sync source
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CRS->CR |= CRS_CR_AUTOTRIMEN; // enable auto trim
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CRS->CR |= CRS_CR_CEN; // enable freq counter & block CRS->CFGR as read-only
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RCC->CFGR |= RCC_CFGR_SW;
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#endif
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RCC->APB1ENR |= RCC_APB1ENR_USBEN;
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//??
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USB->CNTR = USB_CNTR_FRES; // Force USB Reset
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for(uint32_t ctr = 0; ctr < 72000; ++ctr) nop(); // wait >1ms
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USB->CNTR = 0;
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USB->BTABLE = 0;
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USB->DADDR = 0;
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USB->ISTR = 0;
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USB->CNTR = USB_CNTR_RESETM; // allow only reset interrupts
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#if defined STM32F3
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NVIC_EnableIRQ(USB_LP_IRQn);
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#elif defined STM32F1
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NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
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#elif defined STM32F0
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USB->BCDR |= USB_BCDR_DPPU;
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NVIC_EnableIRQ(USB_IRQn);
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#endif
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}
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#if defined STM32F3
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void usb_lp_isr() __attribute__ ((alias ("USB_IRQ")));
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#elif defined STM32F1
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void usb_lp_can_rx0_isr() __attribute__ ((alias ("USB_IRQ")));
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#elif defined STM32F0
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void usb_isr() __attribute__ ((alias ("USB_IRQ")));
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#endif
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