diff --git a/F0-nolib/Readme.md b/F0-nolib/Readme.md
index 1abf883..a11fbb4 100644
--- a/F0-nolib/Readme.md
+++ b/F0-nolib/Readme.md
@@ -4,6 +4,7 @@ Samples for STM32F042-nucleo and chinese STM32F030-based devboard
This directory contains examples for F0 without any library
- blink - simple LED blink
+- canbus - CAN bus on STM32F042C6T6
- htu21d_nucleo - operaing with HTU-21D in STM32F042-nucleo
- morze - for STM32F030, echo data from USART1 on TIM3CH1 (PA6) as Morze code
- tsys01_nucleo - read two TSYS01 sensors using STM32F042
diff --git a/F0-nolib/canbus/kicad/acs712.lib b/F0-nolib/canbus/kicad/acs712.lib
new file mode 100644
index 0000000..825ed8b
--- /dev/null
+++ b/F0-nolib/canbus/kicad/acs712.lib
@@ -0,0 +1,22 @@
+EESchema-LIBRARY Version 2.3 Date: Sun 04 May 2014 09:27:50 PM MSK
+#encoding utf-8
+#
+# ACS712
+#
+DEF ACS712 U 0 40 Y Y 1 F N
+F0 "U" 0 300 60 H V C CNN
+F1 "ACS712" 0 -350 60 H V C CNN
+DRAW
+S -450 250 450 -300 0 1 0 N
+X IP+ 1 -550 150 300 R 50 50 1 1 I
+X IP+ 2 -550 50 300 R 50 50 1 1 I
+X IP- 3 -550 -100 300 R 50 50 1 1 I
+X IP- 4 -550 -200 300 R 50 50 1 1 I
+X GND 5 550 -200 300 L 50 50 1 1 I
+X FILTER 6 550 -100 300 L 50 50 1 1 I
+X VIOUT 7 550 50 300 L 50 50 1 1 I
+X Vcc 8 550 150 300 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/F0-nolib/canbus/kicad/bom.ini b/F0-nolib/canbus/kicad/bom.ini
new file mode 100644
index 0000000..e913a98
--- /dev/null
+++ b/F0-nolib/canbus/kicad/bom.ini
@@ -0,0 +1,63 @@
+[BOM_OPTIONS]
+; General BoM options here
+; If 'ignore_dnf' option is set to 1, rows that are not to be fitted on the PCB will not be written to the BoM file
+ignore_dnf = 1
+; If 'number_rows' option is set to 1, each row in the BoM will be prepended with an incrementing row number
+number_rows = 1
+; If 'group_connectors' option is set to 1, connectors with the same footprints will be grouped together, independent of the name of the connector
+group_connectors = 1
+; If 'test_regex' option is set to 1, each component group will be tested against a number of regular-expressions (specified, per column, below). If any matches are found, the row is ignored in the output file
+test_regex = 1
+; If 'merge_blank_fields' option is set to 1, component groups with blank fields will be merged into the most compatible group, where possible
+merge_blank_fields = 1
+; Field name used to determine if a particular part is to be fitted
+fit_field = Config
+
+[IGNORE_COLUMNS]
+; Any column heading that appears here will be excluded from the Generated BoM
+; Titles are case-insensitive
+Part Lib
+Footprint Lib
+
+[GROUP_FIELDS]
+; List of fields used for sorting individual components into groups
+; Components which match (comparing *all* fields) will be grouped together
+; Field names are case-insensitive
+Part
+Part Lib
+Value
+Footprint
+Footprint Lib
+
+[COMPONENT_ALIASES]
+; A series of values which are considered to be equivalent for the part name
+; Each line represents a tab-separated list of equivalent component name values
+; e.g. 'c c_small cap' will ensure the equivalent capacitor symbols can be grouped together
+; Aliases are case-insensitive
+c c_small cap capacitor
+r r_small res resistor
+sw switch
+l l_small inductor
+zener zenersmall
+d diode d_small
+
+[REGEX_INCLUDE]
+; A series of regular expressions used to include parts in the BoM
+; If there are any regex defined here, only components that match against ANY of them will be included in the BOM
+; Column names are case-insensitive
+; Format is: "ColumName Regex" (tab-separated)
+
+[REGEX_EXCLUDE]
+; A series of regular expressions used to exclude parts from the BoM
+; If a component matches ANY of these, it will be excluded from the BoM
+; Column names are case-insensitive
+; Format is: "ColumName Regex" (tab-separated)
+References ^TP[0-9]*
+References ^FID
+Part mount.*hole
+Part solder.*bridge
+Part test.*point
+Footprint test.*point
+Footprint mount.*hole
+Footprint fiducial
+
diff --git a/F0-nolib/canbus/kicad/elements.lib b/F0-nolib/canbus/kicad/elements.lib
new file mode 100644
index 0000000..9ada38f
--- /dev/null
+++ b/F0-nolib/canbus/kicad/elements.lib
@@ -0,0 +1,190 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 74HC4051
+#
+DEF 74HC4051 U 0 10 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "74HC4051" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SO16
+ TSSOP16
+ SSOP16
+ DHVQFN16
+$ENDFPLIST
+DRAW
+S -400 450 400 -450 0 1 0 N
+X Y4 1 700 -50 300 L 50 50 1 1 B
+X Y6 2 700 -250 300 L 50 50 1 1 B
+X Z 3 0 -750 300 U 50 50 1 1 B
+X Y7 4 700 -350 300 L 50 50 1 1 B
+X Y5 5 700 -150 300 L 50 50 1 1 B
+X ~E 6 -700 -350 300 R 50 50 1 1 I I
+X VEE 7 -700 0 300 R 50 50 1 1 W
+X GND 8 -700 -200 300 R 50 50 1 1 W
+X S2 9 -700 150 300 R 50 50 1 1 I
+X S1 10 -700 250 300 R 50 50 1 1 I
+X S0 11 -700 350 300 R 50 50 1 1 I
+X Y3 12 700 50 300 L 50 50 1 1 B
+X Y0 13 700 350 300 L 50 50 1 1 B
+X Y1 14 700 250 300 L 50 50 1 1 B
+X Y2 15 700 150 300 L 50 50 1 1 B
+X VCC 16 -700 -100 300 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# D_Schottky_x2_ACom_AKK
+#
+DEF D_Schottky_x2_ACom_AKK D 0 30 Y N 1 F N
+F0 "D" 50 -100 50 H V C CNN
+F1 "D_Schottky_x2_ACom_AKK" 0 100 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 2 0 1 0 -140 0 150 0 N
+P 2 0 1 0 0 0 0 -100 N
+P 3 0 1 8 -150 50 -150 -50 -150 -50 N
+P 3 0 1 8 150 50 150 -50 150 -50 N
+P 4 0 1 8 -150 50 -170 50 -170 40 -170 40 N
+P 4 0 1 8 150 -50 170 -50 170 -40 170 -40 N
+P 4 0 1 8 150 50 130 50 130 40 130 40 N
+P 5 0 1 8 -130 -40 -130 -50 -150 -50 -150 -50 -150 -50 N
+P 6 0 1 8 -50 -50 -150 0 -50 50 -50 -50 -50 -50 -50 -50 N
+P 6 0 1 8 50 50 150 0 50 -50 50 50 50 50 50 50 N
+X A 1 0 -200 100 U 50 50 0 1 P
+X K 2 -300 0 150 R 50 50 0 1 P
+X K 3 300 0 150 L 50 50 0 1 P
+ENDDRAW
+ENDDEF
+#
+# LM1117-ADJ
+#
+DEF LM1117-ADJ U 0 30 Y Y 1 F N
+F0 "U" 100 -250 50 H V C CNN
+F1 "LM1117-ADJ" 0 250 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS LM1117-1.8 LM1117-2.5 LM1117-3.3 LM1117-5.0
+$FPLIST
+ SOT-223*
+ TO-263*
+ TO-252*
+$ENDFPLIST
+DRAW
+S -200 -200 200 200 0 1 10 f
+X GND/ADJ 1 0 -300 100 U 50 50 1 1 W
+X VO 2 300 0 100 L 50 50 1 1 w
+X VI 3 -300 0 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# PESD1CAN
+#
+DEF PESD1CAN D 0 30 Y N 1 F N
+F0 "D" 0 -350 50 H V C CNN
+F1 "PESD1CAN" 50 150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ SOT23
+$ENDFPLIST
+DRAW
+S -200 100 300 -300 0 1 0 N
+P 2 0 1 0 -140 -200 150 -200 N
+P 2 0 1 0 -140 0 150 0 N
+P 3 0 1 8 -150 -150 -150 -250 -150 -250 N
+P 3 0 1 8 -150 50 -150 -50 -150 -50 N
+P 3 0 1 8 150 -150 150 -250 150 -250 N
+P 3 0 1 8 150 50 150 -50 150 -50 N
+P 4 0 1 8 -150 -150 -170 -150 -170 -160 -170 -160 N
+P 4 0 1 8 -150 50 -170 50 -170 40 -170 40 N
+P 4 0 1 8 150 -250 170 -250 170 -240 170 -240 N
+P 4 0 1 8 150 -150 130 -150 130 -160 130 -160 N
+P 4 0 1 8 150 -50 170 -50 170 -40 170 -40 N
+P 4 0 1 0 150 0 250 0 250 -200 150 -200 N
+P 4 0 1 8 150 50 130 50 130 40 130 40 N
+P 5 0 1 8 -130 -240 -130 -250 -150 -250 -150 -250 -150 -250 N
+P 5 0 1 8 -130 -40 -130 -50 -150 -50 -150 -50 -150 -50 N
+P 6 0 1 8 -50 -250 -150 -200 -50 -150 -50 -250 -50 -250 -50 -250 N
+P 6 0 1 8 -50 -50 -150 0 -50 50 -50 -50 -50 -50 -50 -50 N
+P 6 0 1 8 50 -150 150 -200 50 -250 50 -150 50 -150 50 -150 N
+P 6 0 1 8 50 50 150 0 50 -50 50 50 50 50 50 50 N
+X K 1 -300 0 150 R 50 50 0 1 P
+X K 2 -300 -200 150 R 50 50 0 1 P
+X O 3 400 -100 150 L 50 50 0 1 P
+ENDDRAW
+ENDDEF
+#
+# TPS2051
+#
+DEF TPS2051 U 0 40 Y Y 1 F N
+F0 "U" 0 -300 60 H V C CNN
+F1 "TPS2051" 0 300 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -250 250 250 -250 0 1 0 N
+X GND 1 -450 150 200 R 50 50 1 1 W
+X IN 2 -450 50 200 R 50 50 1 1 W
+X IN 3 -450 -50 200 R 50 50 1 1 P
+X EN 4 -450 -150 200 R 50 50 1 1 I
+X ~OC 5 450 -150 200 L 50 50 1 1 O
+X OUT 6 450 -50 200 L 50 50 1 1 P
+X OUT 7 450 50 200 L 50 50 1 1 P
+X OUT 8 450 150 200 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# USB6B1
+#
+DEF USB6B1 D 0 30 Y N 1 F N
+F0 "D" 0 -450 50 H V C CNN
+F1 "USB6B1" 0 400 50 H V C CNN
+F2 "" 200 -100 50 V V C CNN
+F3 "" 200 -100 50 V V C CNN
+$FPLIST
+ SO8
+$ENDFPLIST
+DRAW
+C -150 -300 7 0 1 0 N
+C -150 100 7 0 1 0 N
+C -150 300 7 0 1 0 N
+C 0 -300 7 0 1 0 N
+C 0 -100 7 0 1 0 N
+C 0 300 7 0 1 0 N
+C 200 -300 7 0 1 0 N
+C 200 300 7 0 1 0 N
+S -300 -100 300 -100 0 1 0 N
+S -300 300 300 300 0 1 0 N
+S -200 -150 -100 -150 0 1 0 N
+S -200 250 -100 250 0 1 0 N
+S -150 300 -150 -300 0 1 0 N
+S -50 -150 50 -150 0 1 0 N
+S -50 250 50 250 0 1 0 N
+S 0 300 0 -300 0 1 0 N
+S 200 300 200 -300 0 1 0 N
+S 300 -300 -300 -300 0 1 0 N
+S 300 100 -300 100 0 1 0 N
+P 3 0 1 8 150 50 250 50 250 50 N
+P 4 0 1 8 150 50 150 30 160 30 160 30 N
+P 4 0 1 8 250 50 250 70 240 70 240 70 N
+P 5 0 1 0 -250 350 300 350 300 -350 -250 -350 -250 350 N
+P 6 0 1 8 -200 -250 -150 -150 -100 -250 -200 -250 -200 -250 -200 -250 N
+P 6 0 1 8 -200 150 -150 250 -100 150 -200 150 -200 150 -200 150 N
+P 6 0 1 8 -50 -250 0 -150 50 -250 -50 -250 -50 -250 -50 -250 N
+P 6 0 1 8 -50 150 0 250 50 150 -50 150 -50 150 -50 150 N
+P 6 0 1 8 150 -50 200 50 250 -50 150 -50 150 -50 150 -50 N
+X VCC 1 -500 300 200 R 50 50 1 1 P
+X I/O1 2 -500 100 200 R 50 50 1 1 P
+X I/O2 3 -500 -100 200 R 50 50 1 1 P
+X GND 4 -500 -300 200 R 50 50 1 1 P
+X GND 5 500 -300 200 L 50 50 1 1 P
+X I/O2 6 500 -100 200 L 50 50 1 1 P
+X I/O1 7 500 100 200 L 50 50 1 1 P
+X VCC 8 500 300 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/F0-nolib/canbus/kicad/fp-lib-table b/F0-nolib/canbus/kicad/fp-lib-table
new file mode 100644
index 0000000..9831fe1
--- /dev/null
+++ b/F0-nolib/canbus/kicad/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name my_footprints)(type KiCad)(uri "$(KIPRJMOD)/my_footprints.pretty")(options "")(descr ""))
+)
diff --git a/F0-nolib/canbus/kicad/my_footprints.pretty/Hole_3mm.kicad_mod b/F0-nolib/canbus/kicad/my_footprints.pretty/Hole_3mm.kicad_mod
new file mode 100644
index 0000000..4776c5d
--- /dev/null
+++ b/F0-nolib/canbus/kicad/my_footprints.pretty/Hole_3mm.kicad_mod
@@ -0,0 +1,9 @@
+(module Hole_3mm (layer F.Cu) (tedit 5913F6E4)
+ (fp_text reference REF** (at 0 3.81) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Hole_3mm (at 0 -7.62) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3) (layers *.Cu *.Mask))
+)
diff --git a/F0-nolib/canbus/kicad/my_footprints.pretty/RJ9-4P4C.kicad_mod b/F0-nolib/canbus/kicad/my_footprints.pretty/RJ9-4P4C.kicad_mod
new file mode 100644
index 0000000..566b04b
--- /dev/null
+++ b/F0-nolib/canbus/kicad/my_footprints.pretty/RJ9-4P4C.kicad_mod
@@ -0,0 +1,31 @@
+(module RJ9-4P4C (layer F.Cu) (tedit 555F7A30)
+ (fp_text reference J** (at 0 -10.1346) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value RJ9-4P4C (at 0 10.2108) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_circle (center 0 0) (end -0.25 0) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.84 -9.25) (end 5.84 -9.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 5.84 -9.25) (end 5.84 9.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 5.84 9.25) (end -5.84 9.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.84 9.25) (end -5.84 -9.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0 -0.35) (end 0 0.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 0) (end 0.35 0) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.59 9) (end -5.59 -9) (layer F.Fab) (width 0.12))
+ (fp_line (start -5.59 -9) (end 5.59 -9) (layer F.Fab) (width 0.12))
+ (fp_line (start 5.59 -9) (end 5.59 9) (layer F.Fab) (width 0.12))
+ (fp_line (start 5.59 9) (end -5.59 9) (layer F.Fab) (width 0.12))
+ (fp_line (start -5.59 8.8) (end -5.59 -9) (layer F.SilkS) (width 0.12))
+ (fp_line (start -5.59 -9) (end 5.59 -9) (layer F.SilkS) (width 0.12))
+ (fp_line (start 5.59 -9) (end 5.59 8.8) (layer F.SilkS) (width 0.12))
+ (fp_circle (center 3.81 1.15) (end 5.75 1.15) (layer B.CrtYd) (width 0.05))
+ (fp_circle (center -3.81 1.15) (end -5.75 1.15) (layer B.CrtYd) (width 0.05))
+ (fp_circle (center -1.905 -6.12) (end -1.805 -6.12) (layer F.SilkS) (width 0.2))
+ (pad 1 thru_hole circle (at -1.905 -5.2) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask))
+ (pad 2 thru_hole circle (at -0.635 -7.74) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask))
+ (pad 3 thru_hole circle (at 0.635 -5.2) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask))
+ (pad 4 thru_hole circle (at 1.905 -7.74) (size 1.2 1.2) (drill 0.8) (layers *.Cu *.Mask))
+ (pad "" np_thru_hole circle (at -3.81 1.15) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+ (pad "" np_thru_hole circle (at 3.81 1.15) (size 3.2 3.2) (drill 3.2) (layers *.Cu *.Mask))
+)
diff --git a/F0-nolib/canbus/kicad/my_footprints.pretty/SMD_conn_4x2.5mm.kicad_mod b/F0-nolib/canbus/kicad/my_footprints.pretty/SMD_conn_4x2.5mm.kicad_mod
new file mode 100644
index 0000000..3c4cbd2
--- /dev/null
+++ b/F0-nolib/canbus/kicad/my_footprints.pretty/SMD_conn_4x2.5mm.kicad_mod
@@ -0,0 +1,12 @@
+(module SMD_conn_4x2.5mm (layer F.Cu) (tedit 58B86145)
+ (fp_text reference REF** (at 0 3.81) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value SMD_conn_4x2.5mm (at 0 -3.81) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 smd rect (at -3.81 0) (size 1.5 5) (layers F.Cu F.Paste F.Mask))
+ (pad 2 smd rect (at -1.27 0) (size 1.5 5) (layers F.Cu F.Paste F.Mask))
+ (pad 3 smd rect (at 1.27 0) (size 1.5 5) (layers F.Cu F.Paste F.Mask))
+ (pad 4 smd rect (at 3.81 0) (size 1.5 5) (layers F.Cu F.Paste F.Mask))
+)
diff --git a/F0-nolib/canbus/kicad/my_footprints.pretty/TH_via.kicad_mod b/F0-nolib/canbus/kicad/my_footprints.pretty/TH_via.kicad_mod
new file mode 100644
index 0000000..e458a27
--- /dev/null
+++ b/F0-nolib/canbus/kicad/my_footprints.pretty/TH_via.kicad_mod
@@ -0,0 +1,10 @@
+(module TH_via (layer F.Cu) (tedit 5A5E619A)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (zone_connect 1))
+)
diff --git a/F0-nolib/canbus/kicad/stm32-B.Cu.svg b/F0-nolib/canbus/kicad/stm32-B.Cu.svg
new file mode 100644
index 0000000..685ddea
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32-B.Cu.svg
@@ -0,0 +1,4189 @@
+
+
+
diff --git a/F0-nolib/canbus/kicad/stm32-B.SilkS.svg b/F0-nolib/canbus/kicad/stm32-B.SilkS.svg
new file mode 100644
index 0000000..b168786
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32-B.SilkS.svg
@@ -0,0 +1,821 @@
+
+
+
diff --git a/F0-nolib/canbus/kicad/stm32-BOM.ods b/F0-nolib/canbus/kicad/stm32-BOM.ods
new file mode 100644
index 0000000..4f407ba
Binary files /dev/null and b/F0-nolib/canbus/kicad/stm32-BOM.ods differ
diff --git a/F0-nolib/canbus/kicad/stm32-F.Cu.svg b/F0-nolib/canbus/kicad/stm32-F.Cu.svg
new file mode 100644
index 0000000..7c6775c
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32-F.Cu.svg
@@ -0,0 +1,6453 @@
+
+
+
diff --git a/F0-nolib/canbus/kicad/stm32-rescue.lib b/F0-nolib/canbus/kicad/stm32-rescue.lib
new file mode 100644
index 0000000..4df6a8b
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32-rescue.lib
@@ -0,0 +1,45 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# LM1117-3.3-RESCUE-stm32
+#
+DEF LM1117-3.3-RESCUE-stm32 U 0 30 Y Y 1 F N
+F0 "U" 100 -250 50 H V C CNN
+F1 "LM1117-3.3-RESCUE-stm32" 0 250 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ SOT-223*
+ TO-263*
+ TO-252*
+$ENDFPLIST
+DRAW
+S -200 -200 200 200 0 1 10 f
+X GND/ADJ 1 0 -300 100 U 50 50 1 1 W
+X VO 2 300 50 100 L 50 50 1 1 P
+X VI 3 -300 0 100 R 50 50 1 1 W
+X VO 4 300 -50 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# MAX471-RESCUE-stm32
+#
+DEF MAX471-RESCUE-stm32 U 0 40 Y Y 1 F N
+F0 "U" -300 350 50 H V L CNN
+F1 "MAX471-RESCUE-stm32" -300 -350 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -300 300 300 -300 0 1 10 f
+X SHDN 1 -400 -100 100 R 50 50 1 1 I
+X RS+ 2 -400 200 100 R 50 50 1 1 W
+X RS+ 3 -400 100 100 R 50 50 1 1 P
+X GND 4 -400 -200 100 R 50 50 1 1 W
+X SIGN 5 400 -100 100 L 50 50 1 1 C
+X RS- 6 400 200 100 L 50 50 1 1 w
+X RS- 7 400 100 100 L 50 50 1 1 P
+X OUT 8 400 -200 100 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/F0-nolib/canbus/kicad/stm32.kicad_pcb b/F0-nolib/canbus/kicad/stm32.kicad_pcb
new file mode 100644
index 0000000..25e5fe2
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32.kicad_pcb
@@ -0,0 +1,4145 @@
+(kicad_pcb (version 4) (host pcbnew 4.0.7)
+
+ (general
+ (links 134)
+ (no_connects 0)
+ (area 15.607999 51.105 101.85 146.700001)
+ (thickness 1.6)
+ (drawings 27)
+ (tracks 533)
+ (zones 0)
+ (modules 67)
+ (nets 50)
+ )
+
+ (page A4)
+ (layers
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
+ (45 Margin user)
+ (46 B.CrtYd user)
+ (47 F.CrtYd user)
+ (48 B.Fab user)
+ (49 F.Fab user)
+ )
+
+ (setup
+ (last_trace_width 0.5)
+ (user_trace_width 0.2)
+ (user_trace_width 0.3)
+ (user_trace_width 0.5)
+ (user_trace_width 1)
+ (user_trace_width 2)
+ (trace_clearance 0.2)
+ (zone_clearance 0.5)
+ (zone_45_only yes)
+ (trace_min 0.2)
+ (segment_width 0.2)
+ (edge_width 0.15)
+ (via_size 1.5)
+ (via_drill 0.8)
+ (via_min_size 0.8)
+ (via_min_drill 0.6)
+ (user_via 1.5 0.8)
+ (uvia_size 0.3)
+ (uvia_drill 0.1)
+ (uvias_allowed no)
+ (uvia_min_size 0.2)
+ (uvia_min_drill 0.1)
+ (pcb_text_width 0.3)
+ (pcb_text_size 1.5 1.5)
+ (mod_edge_width 0.15)
+ (mod_text_size 1 1)
+ (mod_text_width 0.15)
+ (pad_size 1.5 1.5)
+ (pad_drill 0.8)
+ (pad_to_mask_clearance 0.2)
+ (aux_axis_origin 0 0)
+ (visible_elements FFFFFF7F)
+ (pcbplotparams
+ (layerselection 0x00000_80000000)
+ (usegerberextensions false)
+ (excludeedgelayer false)
+ (linewidth 0.100000)
+ (plotframeref false)
+ (viasonmask false)
+ (mode 1)
+ (useauxorigin false)
+ (hpglpennumber 1)
+ (hpglpenspeed 20)
+ (hpglpendiameter 15)
+ (hpglpenoverlay 2)
+ (psnegative true)
+ (psa4output false)
+ (plotreference false)
+ (plotvalue false)
+ (plotinvisibletext false)
+ (padsonsilk false)
+ (subtractmaskfromsilk false)
+ (outputformat 5)
+ (mirror false)
+ (drillshape 2)
+ (scaleselection 1)
+ (outputdirectory ""))
+ )
+
+ (net 0 "")
+ (net 1 /12Vin)
+ (net 2 GND)
+ (net 3 +3V3)
+ (net 4 +5V)
+ (net 5 /NRST)
+ (net 6 /BOOT0)
+ (net 7 "Net-(D2-Pad1)")
+ (net 8 "Net-(D3-Pad1)")
+ (net 9 "Net-(D3-Pad2)")
+ (net 10 "Net-(D5-Pad2)")
+ (net 11 /LED0)
+ (net 12 "Net-(D6-Pad2)")
+ (net 13 /LED1)
+ (net 14 "Net-(D7-Pad2)")
+ (net 15 "Net-(D7-Pad3)")
+ (net 16 "Net-(D7-Pad6)")
+ (net 17 "Net-(D7-Pad7)")
+ (net 18 "Net-(JP1-Pad2)")
+ (net 19 /V12)
+ (net 20 /V5)
+ (net 21 "Net-(R8-Pad1)")
+ (net 22 /CAN_Tx)
+ (net 23 /CAN_Rx)
+ (net 24 "Net-(D7-Pad1)")
+ (net 25 "Net-(D7-Pad4)")
+ (net 26 "Net-(R34-Pad2)")
+ (net 27 "Net-(R35-Pad2)")
+ (net 28 /5Vusb)
+ (net 29 /brdaddr0)
+ (net 30 /brdaddr1)
+ (net 31 /brdaddr2)
+ (net 32 "Net-(J2-Pad9)")
+ (net 33 "Net-(J4-Pad1)")
+ (net 34 /OUTP1)
+ (net 35 /OUTP2)
+ (net 36 /OUTP3)
+ (net 37 "Net-(J4-Pad5)")
+ (net 38 "Net-(J4-Pad6)")
+ (net 39 "Net-(Q2-Pad1)")
+ (net 40 "Net-(Q3-Pad1)")
+ (net 41 "Net-(Q4-Pad1)")
+ (net 42 /O1)
+ (net 43 /O2)
+ (net 44 /O3)
+ (net 45 /INP1)
+ (net 46 /INP2)
+ (net 47 "Net-(J2-Pad7)")
+ (net 48 /Rx)
+ (net 49 /Tx)
+
+ (net_class Default "This is the default net class."
+ (clearance 0.2)
+ (trace_width 0.2)
+ (via_dia 1.5)
+ (via_drill 0.8)
+ (uvia_dia 0.3)
+ (uvia_drill 0.1)
+ (add_net +3V3)
+ (add_net +5V)
+ (add_net /5Vusb)
+ (add_net /BOOT0)
+ (add_net /CAN_Rx)
+ (add_net /CAN_Tx)
+ (add_net /INP1)
+ (add_net /INP2)
+ (add_net /LED0)
+ (add_net /LED1)
+ (add_net /NRST)
+ (add_net /O1)
+ (add_net /O2)
+ (add_net /O3)
+ (add_net /OUTP1)
+ (add_net /OUTP2)
+ (add_net /OUTP3)
+ (add_net /Rx)
+ (add_net /Tx)
+ (add_net /V12)
+ (add_net /V5)
+ (add_net /brdaddr0)
+ (add_net /brdaddr1)
+ (add_net /brdaddr2)
+ (add_net GND)
+ (add_net "Net-(D2-Pad1)")
+ (add_net "Net-(D3-Pad1)")
+ (add_net "Net-(D3-Pad2)")
+ (add_net "Net-(D5-Pad2)")
+ (add_net "Net-(D6-Pad2)")
+ (add_net "Net-(D7-Pad1)")
+ (add_net "Net-(D7-Pad2)")
+ (add_net "Net-(D7-Pad3)")
+ (add_net "Net-(D7-Pad4)")
+ (add_net "Net-(D7-Pad6)")
+ (add_net "Net-(D7-Pad7)")
+ (add_net "Net-(J2-Pad7)")
+ (add_net "Net-(J2-Pad9)")
+ (add_net "Net-(J4-Pad1)")
+ (add_net "Net-(J4-Pad5)")
+ (add_net "Net-(J4-Pad6)")
+ (add_net "Net-(JP1-Pad2)")
+ (add_net "Net-(Q2-Pad1)")
+ (add_net "Net-(Q3-Pad1)")
+ (add_net "Net-(Q4-Pad1)")
+ (add_net "Net-(R34-Pad2)")
+ (add_net "Net-(R35-Pad2)")
+ (add_net "Net-(R8-Pad1)")
+ )
+
+ (net_class 0.5 ""
+ (clearance 0.3)
+ (trace_width 0.5)
+ (via_dia 1.5)
+ (via_drill 0.8)
+ (uvia_dia 0.3)
+ (uvia_drill 0.1)
+ (add_net /12Vin)
+ )
+
+ (net_class 1 ""
+ (clearance 0.5)
+ (trace_width 1)
+ (via_dia 1.5)
+ (via_drill 0.8)
+ (uvia_dia 0.3)
+ (uvia_drill 0.1)
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF859)
+ (at 78.359 86.614)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF853)
+ (at 57.658 97.155)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF84B)
+ (at 82.55 95.123)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF7AA)
+ (at 44.577 68.58)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF785)
+ (at 86.741 106.807)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 59136913) (tstamp 590A371F)
+ (at 71.64324 96.81972 315)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /59093675)
+ (attr smd)
+ (fp_text reference C13 (at 0 -1.9 315) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at -1.3335 1.4605 315) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 315) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at 0.95 0 315) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 59149DBC) (tstamp 590A36EF)
+ (at 71.9201 102.2604 180)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /590D4832)
+ (attr smd)
+ (fp_text reference C5 (at 0 -1.27 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at 0 1.9 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 5 /NRST))
+ (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 541A9B4D) (tstamp 590A36F5)
+ (at 49.6189 69.8246 90)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /590D4150)
+ (attr smd)
+ (fp_text reference C6 (at 0 -1.9 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at 0 1.9 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 6 /BOOT0))
+ (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 59136924) (tstamp 590A3713)
+ (at 76.6445 85.344 90)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /58C42D39)
+ (attr smd)
+ (fp_text reference C11 (at 3.302 0 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at 0 1.9 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 541A9B4D) (tstamp 590A3719)
+ (at 64.7065 82.423 180)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /590935EA)
+ (attr smd)
+ (fp_text reference C12 (at 0 -1.9 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at 0 1.9 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering placed (layer F.Cu) (tedit 541A9B4D) (tstamp 590A3725)
+ (at 62.7888 93.0656 270)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /590A8102)
+ (attr smd)
+ (fp_text reference C14 (at 0 -1.9 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 0.1 (at 0 1.9 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module LEDs.pretty:LED_0805 placed (layer F.Cu) (tedit 55BDE1C2) (tstamp 590A373A)
+ (at 59.7535 102.743)
+ (descr "LED 0805 smd package")
+ (tags "LED 0805 SMD")
+ (path /5909BFFC)
+ (attr smd)
+ (fp_text reference D2 (at 0 -1.75) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value LED (at 0 1.75) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.4 -0.3) (end -0.4 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.3 0) (end 0 -0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 0.3) (end -0.3 0) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 -0.3) (end 0 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 -0.6) (end -1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 -0.6) (end -1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.6 0.75) (end 1.1 0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.6 -0.75) (end 1.1 -0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 0.15) (end -0.1 -0.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 -0.1) (end -0.25 0.05) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 -0.35) (end -0.35 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0) (end 0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 0) (end 0 -0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 -0.35) (end 0 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0.35) (end -0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.9 -0.95) (end 1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (pad 2 smd rect (at 1.04902 0 180) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 1 smd rect (at -1.04902 0 180) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 7 "Net-(D2-Pad1)"))
+ (model LEDs.3dshapes/LED_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23 placed (layer B.Cu) (tedit 59136C5F) (tstamp 590A3741)
+ (at 50.038 90.551)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /58C46522)
+ (attr smd)
+ (fp_text reference D3 (at -0.386 -3.987) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value PESD1CAN (at 0 -2.5) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -1.7 1.75) (end 1.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end 1.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end -1.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.7 -1.75) (end -1.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -1.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 0.95) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 8 "Net-(D3-Pad1)"))
+ (pad 2 smd rect (at -1 -0.95) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 9 "Net-(D3-Pad2)"))
+ (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module LEDs.pretty:LED_0805 placed (layer F.Cu) (tedit 59136910) (tstamp 590A3756)
+ (at 65.913 100.584 180)
+ (descr "LED 0805 smd package")
+ (tags "LED 0805 SMD")
+ (path /5908EA64)
+ (attr smd)
+ (fp_text reference D5 (at 1.27 1.651 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value LED0 (at -3.81 -0.254 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.4 -0.3) (end -0.4 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.3 0) (end 0 -0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 0.3) (end -0.3 0) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 -0.3) (end 0 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 -0.6) (end -1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 -0.6) (end -1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.6 0.75) (end 1.1 0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.6 -0.75) (end 1.1 -0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 0.15) (end -0.1 -0.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 -0.1) (end -0.25 0.05) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 -0.35) (end -0.35 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0) (end 0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 0) (end 0 -0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 -0.35) (end 0 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0.35) (end -0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.9 -0.95) (end 1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (pad 2 smd rect (at 1.04902 0) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 10 "Net-(D5-Pad2)"))
+ (pad 1 smd rect (at -1.04902 0) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 11 /LED0))
+ (model LEDs.3dshapes/LED_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module LEDs.pretty:LED_0805 placed (layer F.Cu) (tedit 5913691D) (tstamp 590A375C)
+ (at 65.913 102.743 180)
+ (descr "LED 0805 smd package")
+ (tags "LED 0805 SMD")
+ (path /5909AF9A)
+ (attr smd)
+ (fp_text reference D6 (at 1.905 -1.651 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value LED1 (at -4.064 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.4 -0.3) (end -0.4 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start -0.3 0) (end 0 -0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 0.3) (end -0.3 0) (layer F.Fab) (width 0.15))
+ (fp_line (start 0 -0.3) (end 0 0.3) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 -0.6) (end -1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start 1 0.6) (end 1 -0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 0.6) (end 1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1 -0.6) (end -1 0.6) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.6 0.75) (end 1.1 0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.6 -0.75) (end 1.1 -0.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 0.15) (end -0.1 -0.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.1 -0.1) (end -0.25 0.05) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 -0.35) (end -0.35 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0) (end 0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.35 0) (end 0 -0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 -0.35) (end 0 0.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 0.35) (end -0.35 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.9 -0.95) (end 1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05))
+ (pad 2 smd rect (at 1.04902 0) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 12 "Net-(D6-Pad2)"))
+ (pad 1 smd rect (at -1.04902 0) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)
+ (net 13 /LED1))
+ (model LEDs.3dshapes/LED_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Housings_SOIC.pretty:SOIC-8_3.9x4.9mm_Pitch1.27mm placed (layer F.Cu) (tedit 54130A77) (tstamp 590A3768)
+ (at 60.3885 124.3965 90)
+ (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
+ (tags "SOIC 1.27")
+ (path /59098D4D)
+ (attr smd)
+ (fp_text reference D7 (at 0 -3.5 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value USB6B1 (at 0 3.5 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.95 2.45) (end -1.95 -1.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.95 -1.45) (end -0.95 -2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -3.75 -2.75) (end -3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 3.75 -2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.75 -2.75) (end 3.75 -2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.75 2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.075 -2.575) (end -2.075 -2.525) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2.075 2.575) (end 2.075 2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 2.575) (end -2.075 2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 2.575) (end 2.075 2.575) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 -2.525) (end -3.475 -2.525) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -2.7 -1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 24 "Net-(D7-Pad1)"))
+ (pad 2 smd rect (at -2.7 -0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 14 "Net-(D7-Pad2)"))
+ (pad 3 smd rect (at -2.7 0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 15 "Net-(D7-Pad3)"))
+ (pad 4 smd rect (at -2.7 1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 25 "Net-(D7-Pad4)"))
+ (pad 5 smd rect (at 2.7 1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 6 smd rect (at 2.7 0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 16 "Net-(D7-Pad6)"))
+ (pad 7 smd rect (at 2.7 -0.635 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 17 "Net-(D7-Pad7)"))
+ (pad 8 smd rect (at 2.7 -1.905 90) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 28 /5Vusb))
+ (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers.pretty:Pin_Header_Straight_1x02 placed (layer F.Cu) (tedit 5A5E5A59) (tstamp 590A376E)
+ (at 45.212 81.661)
+ (descr "Through hole pin header")
+ (tags "pin header")
+ (path /58C4940D)
+ (fp_text reference JP1 (at -0.212 -3.661 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Terminal (at -0.431 5.202) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.27 1.27) (end 1.27 3.81) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.75 -1.75) (end -1.75 4.3) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.75 -1.75) (end 1.75 4.3) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 4.3) (end 1.75 4.3) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
+ (net 47 "Net-(J2-Pad7)"))
+ (pad 2 thru_hole oval (at 0 2.54) (size 2.032 2.032) (drill 1.016) (layers *.Cu *.Mask)
+ (net 18 "Net-(JP1-Pad2)"))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
+ (at (xyz 0 -0.05 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module Pin_Headers.pretty:Pin_Header_Straight_1x03 placed (layer F.Cu) (tedit 0) (tstamp 590A37E8)
+ (at 65.659 72.44842 90)
+ (descr "Through hole pin header")
+ (tags "pin header")
+ (path /590AD3A7)
+ (fp_text reference P12 (at 0 -5.1 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value USART_BOOT (at 0 -3.1 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1.75) (end -1.75 6.85) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.75 -1.75) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 6.85) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.27 1.27) (end -1.27 6.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 6.35) (end 1.27 6.35) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 6.35) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+ (net 48 /Rx))
+ (pad 3 thru_hole oval (at 0 5.08 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask)
+ (net 49 /Tx))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_1x03.wrl
+ (at (xyz 0 -0.1 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module Connect.pretty:USB_Mini-B placed (layer F.Cu) (tedit 59136879) (tstamp 590A37F7)
+ (at 60.3885 135.382 90)
+ (descr "USB Mini-B 5-pin SMD connector")
+ (tags "USB USB_B USB_Mini connector")
+ (path /58C433D0)
+ (attr smd)
+ (fp_text reference P13 (at -2.032 6.604 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value USB_A (at 0 -7.0993 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -4.85 -5.7) (end 4.85 -5.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.85 -5.7) (end 4.85 5.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.85 5.7) (end -4.85 5.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.85 5.7) (end -4.85 -5.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.59918 -3.85064) (end -3.59918 3.85064) (layer F.SilkS) (width 0.15))
+ (fp_line (start -4.59994 -3.85064) (end -4.59994 3.85064) (layer F.SilkS) (width 0.15))
+ (fp_line (start -4.59994 3.85064) (end 4.59994 3.85064) (layer F.SilkS) (width 0.15))
+ (fp_line (start 4.59994 3.85064) (end 4.59994 -3.85064) (layer F.SilkS) (width 0.15))
+ (fp_line (start 4.59994 -3.85064) (end -4.59994 -3.85064) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at 3.44932 -1.6002 90) (size 2.30124 0.50038) (layers F.Cu F.Paste F.Mask)
+ (net 24 "Net-(D7-Pad1)"))
+ (pad 2 smd rect (at 3.44932 -0.8001 90) (size 2.30124 0.50038) (layers F.Cu F.Paste F.Mask)
+ (net 14 "Net-(D7-Pad2)"))
+ (pad 3 smd rect (at 3.44932 0 90) (size 2.30124 0.50038) (layers F.Cu F.Paste F.Mask)
+ (net 15 "Net-(D7-Pad3)"))
+ (pad 4 smd rect (at 3.44932 0.8001 90) (size 2.30124 0.50038) (layers F.Cu F.Paste F.Mask)
+ (net 25 "Net-(D7-Pad4)"))
+ (pad 5 smd rect (at 3.44932 1.6002 90) (size 2.30124 0.50038) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 6 smd rect (at 3.35026 -4.45008 90) (size 2.49936 1.99898) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at -2.14884 -4.45008 90) (size 2.49936 1.99898) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at 3.35026 4.45008 90) (size 2.49936 1.99898) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at -2.14884 4.45008 90) (size 2.49936 1.99898) (layers F.Cu F.Paste F.Mask))
+ (pad "" np_thru_hole circle (at 0.8509 -2.19964 90) (size 0.89916 0.89916) (drill 0.89916) (layers *.Cu *.Mask))
+ (pad "" np_thru_hole circle (at 0.8509 2.19964 90) (size 0.89916 0.89916) (drill 0.89916) (layers *.Cu *.Mask))
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23_Handsoldering placed (layer B.Cu) (tedit 583F3954) (tstamp 590A37FE)
+ (at 46.736 119.38 180)
+ (descr "SOT-23, Handsoldering")
+ (tags SOT-23)
+ (path /5910E2F2)
+ (attr smd)
+ (fp_text reference Q1 (at 0 2.5 180) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value AO3407 (at 0 -2.5 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -2.7 1.75) (end 2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 1.75) (end 2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 -1.75) (end -2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.7 -1.75) (end -2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -2.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 1 /12Vin))
+ (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 32 "Net-(J2-Pad9)"))
+ (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer B.Cu) (tedit 58307AEF) (tstamp 590A3810)
+ (at 55.372 124.968)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590A6DD4)
+ (attr smd)
+ (fp_text reference R3 (at 0 1.9) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 220k (at 0 -1.9) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15))
+ (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 1 /12Vin))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 19 /V12))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer B.Cu) (tedit 58307AEF) (tstamp 590A3816)
+ (at 60.16752 124.98832)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590A6DDA)
+ (attr smd)
+ (fp_text reference R4 (at 0 1.9) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 56k (at 0 -1.9) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15))
+ (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 19 /V12))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 58307AEF) (tstamp 590A381C)
+ (at 55.372 102.743)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5909C002)
+ (attr smd)
+ (fp_text reference R5 (at 0 -1.9) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at 0 1.9) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 7 "Net-(D2-Pad1)"))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer B.Cu) (tedit 58307AEF) (tstamp 590A3822)
+ (at 55.1815 128.60782)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590A6F68)
+ (attr smd)
+ (fp_text reference R6 (at 0 1.9) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 47k (at 0 -1.9) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15))
+ (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 4 +5V))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 20 /V5))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer B.Cu) (tedit 58307AEF) (tstamp 590A3828)
+ (at 58.76544 129.70256 270)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590A6F6E)
+ (attr smd)
+ (fp_text reference R7 (at 0 1.9 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 47k (at 0 -1.9 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15))
+ (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 20 /V5))
+ (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 5913693E) (tstamp 590A382E)
+ (at 53.0225 95.8215 270)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /58C47F04)
+ (attr smd)
+ (fp_text reference R8 (at -3.175 1.27 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 4k7 (at 0 1.9 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 21 "Net-(R8-Pad1)"))
+ (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer B.Cu) (tedit 58307AEF) (tstamp 590A3834)
+ (at 44.196 88.265 90)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /58C488C6)
+ (attr smd)
+ (fp_text reference R9 (at 0 1.9 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 120 (at 0 -1.9 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end -2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2 0.8) (end 2 -0.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15))
+ (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 9 "Net-(D3-Pad2)"))
+ (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 18 "Net-(JP1-Pad2)"))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 59149DA9) (tstamp 590A38A0)
+ (at 47.48784 69.67728 90)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590D30C8)
+ (attr smd)
+ (fp_text reference R27 (at -2.54 -1.778 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.9 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 6 /BOOT0))
+ (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 58307AEF) (tstamp 590A38A6)
+ (at 70.866 104.2924 180)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /590D3334)
+ (attr smd)
+ (fp_text reference R28 (at 0 -1.9 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 10k (at 0 1.9 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 5 /NRST))
+ (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 591368AC) (tstamp 590A38AC)
+ (at 64.135 98.425 180)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5908EB17)
+ (attr smd)
+ (fp_text reference R29 (at 3.683 0 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at 0 1.9 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 10 "Net-(D5-Pad2)"))
+ (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering placed (layer F.Cu) (tedit 591368B8) (tstamp 590A38B2)
+ (at 62.865 101.6 90)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5909AFA0)
+ (attr smd)
+ (fp_text reference R30 (at 3.683 -0.127 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at -0.254 -1.778 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15))
+ (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 12 "Net-(D6-Pad2)"))
+ (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-223 placed (layer F.Cu) (tedit 583F3B4E) (tstamp 590A3904)
+ (at 57.4675 107.95)
+ (descr "module CMS SOT223 4 pins")
+ (tags "CMS SOT")
+ (path /58C431FC)
+ (attr smd)
+ (fp_text reference U2 (at 0 -4.5) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value LM1117-3.3 (at 0 4.5) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 3.6) (end 4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.85 -3.35) (end -1.85 3.35) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.85 3.41) (end 1.91 3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 -3.35) (end 1.85 -3.35) (layer F.Fab) (width 0.15))
+ (fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.85 3.35) (end 1.85 3.35) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer F.Fab) (width 0.15))
+ (pad 4 smd rect (at 3.15 0) (size 2 3.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 2 smd rect (at -3.15 0) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 3 smd rect (at -3.15 2.3) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 4 +5V))
+ (pad 1 smd rect (at -3.15 -2.3) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 0.4 0.4 0.4))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module Housings_SOIC.pretty:SOIC-8_3.9x4.9mm_Pitch1.27mm placed (layer F.Cu) (tedit 59145FB1) (tstamp 590A3918)
+ (at 55.753 90.4875 180)
+ (descr "8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
+ (tags "SOIC 1.27")
+ (path /58C43297)
+ (attr smd)
+ (fp_text reference U4 (at -5.334 0.381 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value MCP2551-I/SN (at 0 3.5 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.95 2.45) (end -1.95 -1.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.95 -1.45) (end -0.95 -2.45) (layer F.Fab) (width 0.15))
+ (fp_line (start -3.75 -2.75) (end -3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 3.75 -2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.75 -2.75) (end 3.75 -2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.75 2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.075 -2.575) (end -2.075 -2.525) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2.075 2.575) (end 2.075 2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 2.575) (end -2.075 2.43) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 2.575) (end 2.075 2.575) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.075 -2.525) (end -3.475 -2.525) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -2.7 -1.905 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 22 /CAN_Tx))
+ (pad 2 smd rect (at -2.7 -0.635 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 3 smd rect (at -2.7 0.635 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 4 +5V))
+ (pad 4 smd rect (at -2.7 1.905 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 23 /CAN_Rx))
+ (pad 5 smd rect (at 2.7 1.905 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at 2.7 0.635 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 9 "Net-(D3-Pad2)"))
+ (pad 7 smd rect (at 2.7 -0.635 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 8 "Net-(D3-Pad1)"))
+ (pad 8 smd rect (at 2.7 -1.905 180) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 21 "Net-(R8-Pad1)"))
+ (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Housings_QFP.pretty:LQFP-48_7x7mm_Pitch0.5mm placed (layer F.Cu) (tedit 54130A77) (tstamp 590A3974)
+ (at 69.215 88.5825 90)
+ (descr "48 LEAD LQFP 7x7mm (see MICREL LQFP7x7-48LD-PL-1.pdf)")
+ (tags "QFP 0.5")
+ (path /58C42C0E)
+ (attr smd)
+ (fp_text reference U7 (at 0 -6 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value STM32F042C6Tx (at 0 6 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.15))
+ (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.15))
+ (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.15))
+ (fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer F.Fab) (width 0.15))
+ (fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer F.Fab) (width 0.15))
+ (fp_line (start -5.25 -5.25) (end -5.25 5.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 5.25 -5.25) (end 5.25 5.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.25 -5.25) (end 5.25 -5.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.25 5.25) (end 5.25 5.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3.625 -3.625) (end -3.625 -3.175) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.625 -3.625) (end 3.625 -3.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.625 3.625) (end 3.625 3.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.625 3.625) (end -3.625 3.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.625 -3.625) (end -3.1 -3.625) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.625 3.625) (end -3.1 3.625) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.625 3.625) (end 3.1 3.625) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.625 -3.625) (end 3.1 -3.625) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.625 -3.175) (end -5 -3.175) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -4.35 -2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 2 smd rect (at -4.35 -2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 11 /LED0))
+ (pad 3 smd rect (at -4.35 -1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 13 /LED1))
+ (pad 4 smd rect (at -4.35 -1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 5 smd rect (at -4.35 -0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at -4.35 -0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 7 smd rect (at -4.35 0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 5 /NRST))
+ (pad 8 smd rect (at -4.35 0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 9 smd rect (at -4.35 1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 10 smd rect (at -4.35 1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 19 /V12))
+ (pad 11 smd rect (at -4.35 2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 20 /V5))
+ (pad 12 smd rect (at -4.35 2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 13 smd rect (at -2.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 14 smd rect (at -2.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 45 /INP1))
+ (pad 15 smd rect (at -1.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 46 /INP2))
+ (pad 16 smd rect (at -1.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 17 smd rect (at -0.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 18 smd rect (at -0.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 44 /O3))
+ (pad 19 smd rect (at 0.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 43 /O2))
+ (pad 20 smd rect (at 0.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 42 /O1))
+ (pad 21 smd rect (at 1.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 22 smd rect (at 1.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 23 smd rect (at 2.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 24 smd rect (at 2.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 25 smd rect (at 4.35 2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 26 smd rect (at 4.35 2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 27 smd rect (at 4.35 1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 29 /brdaddr0))
+ (pad 28 smd rect (at 4.35 1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 30 /brdaddr1))
+ (pad 29 smd rect (at 4.35 0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 31 /brdaddr2))
+ (pad 30 smd rect (at 4.35 0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 49 /Tx))
+ (pad 31 smd rect (at 4.35 -0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 48 /Rx))
+ (pad 32 smd rect (at 4.35 -0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 26 "Net-(R34-Pad2)"))
+ (pad 33 smd rect (at 4.35 -1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 27 "Net-(R35-Pad2)"))
+ (pad 34 smd rect (at 4.35 -1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 35 smd rect (at 4.35 -2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 36 smd rect (at 4.35 -2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 37 smd rect (at 2.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 38 smd rect (at 2.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 39 smd rect (at 1.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 40 smd rect (at 1.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 41 smd rect (at 0.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 42 smd rect (at 0.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 43 smd rect (at -0.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask))
+ (pad 44 smd rect (at -0.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 6 /BOOT0))
+ (pad 45 smd rect (at -1.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 23 /CAN_Rx))
+ (pad 46 smd rect (at -1.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 22 /CAN_Tx))
+ (pad 47 smd rect (at -2.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (pad 48 smd rect (at -2.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model Housings_QFP.3dshapes/LQFP-48_7x7mm_Pitch0.5mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Capacitors_Tantalum_SMD.pretty:Tantalum_Case-A_EIA-3216-18_Hand (layer F.Cu) (tedit 57B6E980) (tstamp 590A4FE1)
+ (at 64.6684 113.3348 270)
+ (descr "Tantalum capacitor, Case A, EIA 3216-18, 3.2x1.6x1.6mm, Hand soldering footprint")
+ (tags "capacitor tantalum smd")
+ (path /58C454F6)
+ (attr smd)
+ (fp_text reference C2 (at 0 -2.55 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 47u (at 0 2.55 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -4 -1.2) (end -4 1.2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4 1.2) (end 4 1.2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4 1.2) (end 4 -1.2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4 -1.2) (end -4 -1.2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.6 -0.8) (end -1.6 0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.6 0.8) (end 1.6 0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.6 0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start 1.6 -0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.28 -0.8) (end -1.28 0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start -1.12 -0.8) (end -1.12 0.8) (layer F.Fab) (width 0.15))
+ (fp_line (start -3.9 -1.05) (end 1.6 -1.05) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.9 1.05) (end 1.6 1.05) (layer F.SilkS) (width 0.15))
+ (fp_line (start -3.9 -1.05) (end -3.9 1.05) (layer F.SilkS) (width 0.15))
+ (pad 1 smd rect (at -2 0 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 2 smd rect (at 2 0 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model Capacitors_Tantalum_SMD.3dshapes/Tantalum_Case-A_EIA-3216-18.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module my_footprints:Hole_3mm (layer F.Cu) (tedit 5913F6E4) (tstamp 59141404)
+ (at 29 136)
+ (path /59143415)
+ (fp_text reference P15 (at 0 3.81) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Hole (at 0 -7.62) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3) (layers *.Cu *.Mask))
+ )
+
+ (module my_footprints:Hole_3mm (layer F.Cu) (tedit 5913F6E4) (tstamp 59141409)
+ (at 86 60)
+ (path /5914456D)
+ (fp_text reference P16 (at 0 3.81) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Hole (at 0 -7.62) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3) (layers *.Cu *.Mask))
+ )
+
+ (module my_footprints:Hole_3mm (layer F.Cu) (tedit 5913F6E4) (tstamp 5914140E)
+ (at 47 60)
+ (path /591446F3)
+ (fp_text reference P17 (at 0 3.81) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Hole (at 0 -7.62) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3) (layers *.Cu *.Mask))
+ )
+
+ (module my_footprints:Hole_3mm (layer F.Cu) (tedit 5913F6E4) (tstamp 59141413)
+ (at 86 136)
+ (path /591446F9)
+ (fp_text reference P18 (at 0 3.81) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Hole (at 0 -7.62) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3) (layers *.Cu *.Mask))
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering (layer B.Cu) (tedit 58AA848B) (tstamp 5966FF5A)
+ (at 51.308 119.38 90)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /596772D4)
+ (attr smd)
+ (fp_text reference C15 (at 0 1.25 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 0.1 (at 0 -1.5 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 1.25 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.8 0.65) (end 1.8 0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.8 0.65) (end -1.8 -0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -0.65) (end 1.8 0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -0.65) (end -1.8 -0.65) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask)
+ (net 1 /12Vin))
+ (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58AAD9E8) (tstamp 5966FFFF)
+ (at 65.65392 77.724)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5968E385)
+ (attr smd)
+ (fp_text reference R34 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 22 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 -1.45) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 17 "Net-(D7-Pad7)"))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 26 "Net-(R34-Pad2)"))
+ (model Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58AAD9E8) (tstamp 59670010)
+ (at 65.71234 79.46136)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5968E83B)
+ (attr smd)
+ (fp_text reference R35 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 22 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 -1.45) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 16 "Net-(D7-Pad6)"))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 27 "Net-(R35-Pad2)"))
+ (model Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Diodes_SMD.pretty:D_SMB_Handsoldering (layer F.Cu) (tedit 5864304C) (tstamp 5A56A7D6)
+ (at 54.991 117.094 270)
+ (descr "Diode SMB Handsoldering")
+ (tags "Diode SMB Handsoldering")
+ (path /5A545B43)
+ (attr smd)
+ (fp_text reference D4 (at 0 -3.1 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value MBRS130L (at 0.1 4.75 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -4.6 -2.15) (end -4.6 2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start 2.3 2) (end -2.3 2) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.3 2) (end -2.3 -2) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -2) (end 2.3 2) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.3 -2) (end -2.3 -2) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.7 -2.25) (end 4.7 -2.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.7 -2.25) (end 4.7 2.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.7 2.25) (end -4.7 2.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -4.7 2.25) (end -4.7 -2.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -0.64944 0.00102) (end -1.55114 0.00102) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.50118 0.00102) (end 1.4994 0.00102) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.64944 -0.79908) (end -0.64944 0.80112) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.50118 0.75032) (end 0.50118 -0.79908) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.64944 0.00102) (end 0.50118 0.75032) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.64944 0.00102) (end 0.50118 -0.79908) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.6 2.15) (end 2.7 2.15) (layer F.SilkS) (width 0.12))
+ (fp_line (start -4.6 -2.15) (end 2.7 -2.15) (layer F.SilkS) (width 0.12))
+ (pad 1 smd rect (at -2.7 0 270) (size 3.5 2.3) (layers F.Cu F.Paste F.Mask)
+ (net 4 +5V))
+ (pad 2 smd rect (at 2.7 0 270) (size 3.5 2.3) (layers F.Cu F.Paste F.Mask)
+ (net 28 /5Vusb))
+ (model Diodes_SMD.3dshapes/D_SMB_Handsoldering.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 0.3937 0.3937 0.3937))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Pin_Headers.pretty:Pin_Header_Straight_2x03_Pitch2.54mm (layer F.Cu) (tedit 5862ED53) (tstamp 5A5A56FC)
+ (at 79.12608 77.33792 180)
+ (descr "Through hole straight pin header, 2x03, 2.54mm pitch, double rows")
+ (tags "Through hole pin header THT 2x03 2.54mm double row")
+ (path /5A50A198)
+ (fp_text reference J1 (at 1.27 -2.39 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value CONN_02X03 (at 1.27 7.47 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.27 -1.27) (end -1.27 6.35) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 6.35) (end 3.81 6.35) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.81 6.35) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.81 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.39 1.27) (end -1.39 6.47) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.39 6.47) (end 3.93 6.47) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.93 6.47) (end 3.93 -1.39) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.93 -1.39) (end 1.27 -1.39) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.27 -1.39) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.27 1.27) (end -1.39 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.39 0) (end -1.39 -1.39) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.39 -1.39) (end 0 -1.39) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.6 -1.6) (end -1.6 6.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.6 6.6) (end 4.1 6.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.1 6.6) (end 4.1 -1.6) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.1 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05))
+ (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 2 thru_hole oval (at 2.54 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 29 /brdaddr0))
+ (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 4 thru_hole oval (at 2.54 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 30 /brdaddr1))
+ (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 6 thru_hole oval (at 2.54 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 31 /brdaddr2))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_2x03_Pitch2.54mm.wrl
+ (at (xyz 0.05 -0.1 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
+ )
+ )
+
+ (module Capacitors_SMD.pretty:C_0603_HandSoldering (layer B.Cu) (tedit 58AA848B) (tstamp 5A691CB9)
+ (at 48.006 135.001 180)
+ (descr "Capacitor SMD 0603, hand soldering")
+ (tags "capacitor 0603")
+ (path /5A586F5C)
+ (attr smd)
+ (fp_text reference C1 (at 0 1.25 180) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 0.1 (at 0 -1.5 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 1.25 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.8 0.65) (end 1.8 0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.8 0.65) (end -1.8 -0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -0.65) (end 1.8 0.65) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -0.65) (end -1.8 -0.65) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask)
+ (net 4 +5V))
+ (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Connectors.pretty:DB9FC (layer F.Cu) (tedit 587FDE78) (tstamp 5A691CDA)
+ (at 41.783 79.756 90)
+ (descr "Connecteur DB9 femelle couche")
+ (tags "CONN DB9")
+ (path /5A5935B2)
+ (fp_text reference J2 (at 5.46 2.28 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value DB9_Female (at 6.73 -5.08 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -10.74 -16.82) (end -10.69 1.08) (layer F.SilkS) (width 0.12))
+ (fp_line (start -10.69 1.08) (end 21.91 1.08) (layer F.SilkS) (width 0.12))
+ (fp_line (start 21.91 1.08) (end 21.91 -16.82) (layer F.SilkS) (width 0.12))
+ (fp_line (start 21.91 -16.82) (end -10.74 -16.82) (layer F.SilkS) (width 0.12))
+ (fp_line (start -10.67 1.02) (end 21.84 1.02) (layer F.Fab) (width 0.1))
+ (fp_line (start 21.84 1.02) (end 21.84 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start 21.84 -16.76) (end -10.67 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.67 -16.76) (end -10.67 1.02) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.56 -16.76) (end -3.56 -9.14) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.56 -9.14) (end 14.73 -9.14) (layer F.Fab) (width 0.1))
+ (fp_line (start 14.73 -9.14) (end 14.73 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.03 -16.76) (end -2.03 -25.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.03 -25.4) (end 13.21 -25.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 13.21 -25.4) (end 13.21 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.92 -25.65) (end 22.09 -25.65) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -10.92 -25.65) (end -10.92 1.27) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 22.09 1.27) (end 22.09 -25.65) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 22.09 1.27) (end -10.92 1.27) (layer F.CrtYd) (width 0.05))
+ (pad "" thru_hole circle (at 18.29 -2.54 90) (size 3.81 3.81) (drill 3.05) (layers *.Cu *.Mask))
+ (pad "" thru_hole circle (at -7.11 -2.54 90) (size 3.81 3.81) (drill 3.05) (layers *.Cu *.Mask))
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 2 thru_hole circle (at 2.79 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 9 "Net-(D3-Pad2)"))
+ (pad 3 thru_hole circle (at 5.46 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 4 thru_hole circle (at 8.26 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 5 thru_hole circle (at 11.05 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 6 thru_hole circle (at 1.4 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 7 thru_hole circle (at 4.19 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 47 "Net-(J2-Pad7)"))
+ (pad 8 thru_hole circle (at 6.86 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 9 thru_hole circle (at 9.65 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 32 "Net-(J2-Pad9)"))
+ (model ${KISYS3DMOD}/Connectors.3dshapes/DB9FC.wrl
+ (at (xyz 0.2086614173228347 0.05314960629921261 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Connectors.pretty:DB9MC (layer F.Cu) (tedit 5A5E5A7B) (tstamp 5A691CFB)
+ (at 41.783 103.505 90)
+ (descr "Connecteur DB9 male couche")
+ (tags "CONN DB9")
+ (path /5A59367B)
+ (fp_text reference J3 (at -4.245 2.467 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value DB9_Male (at -4.32 -5.08 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -21.84 1.13) (end -21.84 -16.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start -21.84 -16.87) (end 10.91 -16.87) (layer F.SilkS) (width 0.12))
+ (fp_line (start 10.91 -16.87) (end 10.96 1.18) (layer F.SilkS) (width 0.12))
+ (fp_line (start 10.96 1.18) (end -21.84 1.18) (layer F.SilkS) (width 0.12))
+ (fp_line (start -21.72 1.02) (end 10.79 1.02) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.79 1.02) (end 10.79 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.79 -16.76) (end -21.72 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -21.72 -16.76) (end -21.72 1.02) (layer F.Fab) (width 0.1))
+ (fp_line (start -14.61 -16.76) (end -14.61 -9.14) (layer F.Fab) (width 0.1))
+ (fp_line (start -14.61 -9.14) (end 3.68 -9.14) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.68 -9.14) (end 3.68 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -13.08 -16.76) (end -13.08 -25.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -13.08 -25.4) (end 2.16 -25.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.16 -25.4) (end 2.16 -16.76) (layer F.Fab) (width 0.1))
+ (fp_line (start -21.97 -25.65) (end 11.04 -25.65) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -21.97 -25.65) (end -21.97 1.27) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 11.04 1.27) (end 11.04 -25.65) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 11.04 1.27) (end -21.97 1.27) (layer F.CrtYd) (width 0.05))
+ (pad "" thru_hole circle (at 7.24 -2.54 90) (size 3.81 3.81) (drill 3.05) (layers *.Cu *.Mask))
+ (pad "" thru_hole circle (at -18.16 -2.54 90) (size 3.81 3.81) (drill 3.05) (layers *.Cu *.Mask))
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 2 thru_hole circle (at -2.79 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 9 "Net-(D3-Pad2)"))
+ (pad 3 thru_hole circle (at -5.59 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (pad 4 thru_hole circle (at -8.25 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 5 thru_hole circle (at -11.05 0 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 9 thru_hole circle (at -9.65 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 32 "Net-(J2-Pad9)"))
+ (pad 8 thru_hole circle (at -6.86 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (pad 7 thru_hole circle (at -4.19 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask)
+ (net 47 "Net-(J2-Pad7)"))
+ (pad 6 thru_hole circle (at -1.4 -2.54 90) (size 1.52 1.52) (drill 1.02) (layers *.Cu *.Mask))
+ (model ${KISYS3DMOD}/Connectors.3dshapes/DB9MC.wrl
+ (at (xyz -0.22 0.05 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Pin_Headers.pretty:Pin_Header_Straight_1x07_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5A691D16)
+ (at 86.741 88.138)
+ (descr "Through hole straight pin header, 1x07, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x07 2.54mm single row")
+ (path /5A5A2990)
+ (fp_text reference J4 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_01x07 (at 0 17.57) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 16.51) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 16.51) (end -1.27 16.51) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 16.51) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 16.57) (end 1.33 16.57) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 16.57) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 16.57) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 17.05) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 17.05) (end 1.8 17.05) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 17.05) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 7.62 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 33 "Net-(J4-Pad1)"))
+ (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 34 /OUTP1))
+ (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 35 /OUTP2))
+ (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 36 /OUTP3))
+ (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 37 "Net-(J4-Pad5)"))
+ (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 38 "Net-(J4-Pad6)"))
+ (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x07_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23_Handsoldering (layer B.Cu) (tedit 58CE4E7E) (tstamp 5A691D1D)
+ (at 80.645 81.026)
+ (descr "SOT-23, Handsoldering")
+ (tags SOT-23)
+ (path /5A5A1353)
+ (attr smd)
+ (fp_text reference Q2 (at 0 2.5) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SI2300 (at 0 -2.5) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.7 1.75) (end 2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 1.75) (end 2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 -1.75) (end -2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.7 -1.75) (end -2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -2.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.7 0.95) (end -0.7 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.15 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 0.95) (end -0.15 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1.5 0.95) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 39 "Net-(Q2-Pad1)"))
+ (pad 2 smd rect (at -1.5 -0.95) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (pad 3 smd rect (at 1.5 0) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 34 /OUTP1))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes\SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23_Handsoldering (layer B.Cu) (tedit 58CE4E7E) (tstamp 5A691D24)
+ (at 80.264 91.059 270)
+ (descr "SOT-23, Handsoldering")
+ (tags SOT-23)
+ (path /5A5A57A1)
+ (attr smd)
+ (fp_text reference Q3 (at 0 2.5 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SI2300 (at 0 -2.5 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 540) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.7 1.75) (end 2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 1.75) (end 2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 -1.75) (end -2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.7 -1.75) (end -2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -2.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.7 0.95) (end -0.7 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.15 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 0.95) (end -0.15 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1.5 0.95 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 40 "Net-(Q3-Pad1)"))
+ (pad 2 smd rect (at -1.5 -0.95 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (pad 3 smd rect (at 1.5 0 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 35 /OUTP2))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes\SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23_Handsoldering (layer B.Cu) (tedit 58CE4E7E) (tstamp 5A691D2B)
+ (at 80.264 99.314 270)
+ (descr "SOT-23, Handsoldering")
+ (tags SOT-23)
+ (path /5A5A5C15)
+ (attr smd)
+ (fp_text reference Q4 (at 0 2.5 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SI2300 (at 0 -2.5 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 540) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.7 1.75) (end 2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 1.75) (end 2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.7 -1.75) (end -2.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.7 -1.75) (end -2.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -2.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.7 0.95) (end -0.7 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.15 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 0.95) (end -0.15 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1.5 0.95 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 41 "Net-(Q4-Pad1)"))
+ (pad 2 smd rect (at -1.5 -0.95 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (pad 3 smd rect (at 1.5 0 270) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 36 /OUTP3))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes\SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5A691D31)
+ (at 80.518 84.963)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A1F28)
+ (attr smd)
+ (fp_text reference R1 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 42 /O1))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 39 "Net-(Q2-Pad1)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5A691D37)
+ (at 79.883 89.662)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A57A7)
+ (attr smd)
+ (fp_text reference R2 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 43 /O2))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 40 "Net-(Q3-Pad1)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5A691D3D)
+ (at 79.883 91.44)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A5C1B)
+ (attr smd)
+ (fp_text reference R10 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 330 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 44 /O3))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 41 "Net-(Q4-Pad1)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer B.Cu) (tedit 58E0A804) (tstamp 5A691D43)
+ (at 79.883 106.807)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A929C)
+ (attr smd)
+ (fp_text reference R11 (at 0 1.45) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 330 (at 0 -1.55) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.5 -0.68) (end -0.5 -0.68) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.5 0.68) (end 0.5 0.68) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.96 0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.96 0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 45 /INP1))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 37 "Net-(J4-Pad5)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer B.Cu) (tedit 58E0A804) (tstamp 5A691D49)
+ (at 79.883 108.585)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A93D0)
+ (attr smd)
+ (fp_text reference R12 (at 0 1.45) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 330 (at 0 -1.55) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.5 -0.68) (end -0.5 -0.68) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.5 0.68) (end 0.5 0.68) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.96 0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.96 0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 46 /INP2))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask)
+ (net 38 "Net-(J4-Pad6)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0603_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5A691D4F)
+ (at 79.756 81.534)
+ (descr "Resistor SMD 0603, hand soldering")
+ (tags "resistor 0603")
+ (path /5A5A3B4E)
+ (attr smd)
+ (fp_text reference R13 (at 0 -1.45) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 4.7 (at 0 1.55) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.075)))
+ )
+ (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.96 -0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.96 -0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 33 "Net-(J4-Pad1)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-223 (layer B.Cu) (tedit 58CE4E7E) (tstamp 5A691D57)
+ (at 49.022 128.143 270)
+ (descr "module CMS SOT223 4 pins")
+ (tags "CMS SOT")
+ (path /5A5866DE)
+ (attr smd)
+ (fp_text reference U1 (at 0 4.5 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value LM1117-5.0 (at 0 -4.5 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 540) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start -1.85 2.3) (end -0.8 3.35) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer B.SilkS) (width 0.12))
+ (fp_line (start 1.91 3.41) (end 1.91 2.15) (layer B.SilkS) (width 0.12))
+ (fp_line (start 4.4 3.6) (end -4.4 3.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 4.4 -3.6) (end 4.4 3.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -4.4 -3.6) (end 4.4 -3.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -4.4 3.6) (end -4.4 -3.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.85 2.3) (end -1.85 -3.35) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.85 -3.41) (end 1.91 -3.41) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.8 3.35) (end 1.85 3.35) (layer B.Fab) (width 0.1))
+ (fp_line (start -4.1 3.41) (end 1.91 3.41) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.85 -3.35) (end 1.85 -3.35) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.85 3.35) (end 1.85 -3.35) (layer B.Fab) (width 0.1))
+ (pad 4 smd rect (at 3.15 0 270) (size 2 3.8) (layers B.Cu B.Paste B.Mask)
+ (net 4 +5V))
+ (pad 2 smd rect (at -3.15 0 270) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
+ (net 4 +5V))
+ (pad 3 smd rect (at -3.15 -2.3 270) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
+ (net 1 /12Vin))
+ (pad 1 smd rect (at -3.15 2.3 270) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Connectors_Terminal_Blocks.pretty:TerminalBlock_Pheonix_MKDS1.5-2pol (layer F.Cu) (tedit 5A5E5A86) (tstamp 5A691FD7)
+ (at 37 135)
+ (descr "2-way 5mm pitch terminal block, Phoenix MKDS series")
+ (path /5A5B6143)
+ (fp_text reference J5 (at 2.5 -6.75) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value 12v (at 2.5 -6.6) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.7 -5.4) (end 7.7 -5.4) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -2.7 4.8) (end -2.7 -5.4) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 7.7 4.8) (end -2.7 4.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 7.7 -5.4) (end 7.7 4.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 2.5 4.1) (end 2.5 4.6) (layer F.SilkS) (width 0.15))
+ (fp_circle (center 5 0.1) (end 3 0.1) (layer F.SilkS) (width 0.15))
+ (fp_circle (center 0 0.1) (end 2 0.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.5 2.6) (end 7.5 2.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.5 -2.3) (end 7.5 -2.3) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.5 4.1) (end 7.5 4.1) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.5 4.6) (end 7.5 4.6) (layer F.SilkS) (width 0.15))
+ (fp_line (start 7.5 4.6) (end 7.5 -5.2) (layer F.SilkS) (width 0.15))
+ (fp_line (start 7.5 -5.2) (end -2.5 -5.2) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2.5 -5.2) (end -2.5 4.6) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0) (size 2.5 2.5) (drill 1.3) (layers *.Cu *.Mask)
+ (net 32 "Net-(J2-Pad9)"))
+ (pad 2 thru_hole circle (at 5 0) (size 2.5 2.5) (drill 1.3) (layers *.Cu *.Mask)
+ (net 2 GND))
+ (model Terminal_Blocks.3dshapes/TerminalBlock_Pheonix_MKDS1.5-2pol.wrl
+ (at (xyz 0.0984 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module TO_SOT_Packages_SMD.pretty:SOT-23 (layer B.Cu) (tedit 58CE4E7E) (tstamp 5A5CFD3F)
+ (at 72.263 109.22 270)
+ (descr "SOT-23, Standard")
+ (tags SOT-23)
+ (path /5A5D29E2)
+ (attr smd)
+ (fp_text reference D1 (at 0 2.5 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SP0502BAHT (at 0 -2.5 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 540) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start -0.7 0.95) (end -0.7 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.15 1.52) (end 0.7 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 0.95) (end -0.15 1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.7 1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.7 -1.52) (end 0.7 -1.52) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.7 1.75) (end 1.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.7 1.75) (end 1.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.7 -1.75) (end -1.7 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.7 -1.75) (end -1.7 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.76 1.58) (end -1.4 1.58) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -1 0.95 270) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 45 /INP1))
+ (pad 2 smd rect (at -1 -0.95 270) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 46 /INP2))
+ (pad 3 smd rect (at 1 0 270) (size 0.9 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Buttons_Switches_SMD.pretty:SW_SPST_FSMSM (layer F.Cu) (tedit 58723FBE) (tstamp 5A5D6052)
+ (at 71.9455 113.10112 270)
+ (descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English)
+ (tags "SPST button tactile switch")
+ (path /590A0134)
+ (attr smd)
+ (fp_text reference SW1 (at 0 -2.6 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Reset (at 0 3 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 -2.6 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1) (end 1.75 -1) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.75 -1) (end 1.75 1) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.75 1) (end -1.75 1) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.75 1) (end -1.75 -1) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.06 -1.81) (end 3.06 -1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.06 -1.81) (end 3.06 1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.06 1.81) (end -3.06 1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start -3.06 1.81) (end -3.06 -1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.5 0.8) (end 1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 -0.8) (end 1.5 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.5 -0.8) (end 1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 -0.8) (end -1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.95 2) (end 5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 5.95 -2) (end 5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3 1.75) (end 3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -3 -1.75) (end 3 -1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -3 -1.75) (end -3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start 3 -1.75) (end 3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.95 -2) (end -5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.95 -2) (end 5.95 -2) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -4.59 0 270) (size 2.18 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 5 /NRST))
+ (pad 2 smd rect (at 4.59 0 270) (size 2.18 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Buttons_Switches_SMD.pretty:SW_SPST_FSMSM (layer F.Cu) (tedit 58723FBE) (tstamp 5A5D606C)
+ (at 52.9844 73.5203 90)
+ (descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English)
+ (tags "SPST button tactile switch")
+ (path /5909F6B6)
+ (attr smd)
+ (fp_text reference SW2 (at 0 -2.6 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Boot (at 0 3 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text user %R (at 0 -2.6 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1) (end 1.75 -1) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.75 -1) (end 1.75 1) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.75 1) (end -1.75 1) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.75 1) (end -1.75 -1) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.06 -1.81) (end 3.06 -1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.06 -1.81) (end 3.06 1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start 3.06 1.81) (end -3.06 1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start -3.06 1.81) (end -3.06 -1.81) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.5 0.8) (end 1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 -0.8) (end 1.5 -0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.5 -0.8) (end 1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.5 -0.8) (end -1.5 0.8) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.95 2) (end 5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 5.95 -2) (end 5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -3 1.75) (end 3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -3 -1.75) (end 3 -1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -3 -1.75) (end -3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start 3 -1.75) (end 3 1.75) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.95 -2) (end -5.95 2) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -5.95 -2) (end 5.95 -2) (layer F.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -4.59 0 90) (size 2.18 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 6 /BOOT0))
+ (pad 2 smd rect (at 4.59 0 90) (size 2.18 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 +3V3))
+ (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Resistors_SMD.pretty:R_0805_HandSoldering (layer B.Cu) (tedit 58E0A804) (tstamp 5A5D7AE2)
+ (at 45.593 91.567)
+ (descr "Resistor SMD 0805, hand soldering")
+ (tags "resistor 0805")
+ (path /5A5D5996)
+ (attr smd)
+ (fp_text reference R14 (at 0 1.7) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value 0 (at 0 -1.75) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror))
+ )
+ (fp_line (start -1 -0.62) (end -1 0.62) (layer B.Fab) (width 0.1))
+ (fp_line (start 1 -0.62) (end -1 -0.62) (layer B.Fab) (width 0.1))
+ (fp_line (start 1 0.62) (end 1 -0.62) (layer B.Fab) (width 0.1))
+ (fp_line (start -1 0.62) (end 1 0.62) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.6 -0.88) (end -0.6 -0.88) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.6 0.88) (end 0.6 0.88) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.35 0.9) (end 2.35 0.9) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.35 0.9) (end -2.35 -0.9) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.35 -0.9) (end 2.35 0.9) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.35 -0.9) (end -2.35 -0.9) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
+ (net 47 "Net-(J2-Pad7)"))
+ (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
+ (net 8 "Net-(D3-Pad1)"))
+ (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module my_footprints:TH_via (layer F.Cu) (tedit 5A5E61D1) (tstamp 5A6BF76C)
+ (at 45.847 137.668)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value TH_via (at 0 -0.5) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask)
+ (net 2 GND) (zone_connect 1))
+ )
+
+ (module Pin_Headers.pretty:Pin_Header_Straight_1x01_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5A6EC022)
+ (at 52.197 134.62)
+ (descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x01 2.54mm single row")
+ (path /5A6066AA)
+ (fp_text reference J6 (at 0 -2.33) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_01x01 (at 0 2.33) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.33 1.33) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 1.8) (end 1.8 1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 4 +5V))
+ (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x01_Pitch2.54mm.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Diode_SMD.pretty:D_SMA (layer B.Cu) (tedit 586432E5) (tstamp 5B27B948)
+ (at 58.928 121.793)
+ (descr "Diode SMA (DO-214AC)")
+ (tags "Diode SMA (DO-214AC)")
+ (path /59684468)
+ (attr smd)
+ (fp_text reference D8 (at 0 2.5) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SMAJ5.0A (at 0 -2.6) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 2.5) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -3.4 1.65) (end -3.4 -1.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 2.3 -1.5) (end -2.3 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.5) (end -2.3 1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.3 1.5) (end 2.3 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.3 1.5) (end -2.3 1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.5 1.75) (end 3.5 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 3.5 1.75) (end 3.5 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 3.5 -1.75) (end -3.5 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -3.5 -1.75) (end -3.5 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.64944 -0.00102) (end -1.55114 -0.00102) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.50118 -0.00102) (end 1.4994 -0.00102) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 0.79908) (end -0.64944 -0.80112) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.50118 -0.75032) (end 0.50118 0.79908) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 -0.00102) (end 0.50118 -0.75032) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 -0.00102) (end 0.50118 0.79908) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.4 -1.65) (end 2 -1.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.4 1.65) (end 2 1.65) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -2 0) (size 2.5 1.8) (layers B.Cu B.Paste B.Mask)
+ (net 19 /V12))
+ (pad 2 smd rect (at 2 0) (size 2.5 1.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Diode_SMD.pretty:D_SMA (layer B.Cu) (tedit 586432E5) (tstamp 5B27B95F)
+ (at 65.659 132.461 270)
+ (descr "Diode SMA (DO-214AC)")
+ (tags "Diode SMA (DO-214AC)")
+ (path /5968325A)
+ (attr smd)
+ (fp_text reference D9 (at 0 2.5 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text value SMAJ5.0A (at 0 -2.6 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_text user %R (at 0 2.5 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -3.4 1.65) (end -3.4 -1.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start 2.3 -1.5) (end -2.3 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.3 -1.5) (end -2.3 1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.3 1.5) (end 2.3 -1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.3 1.5) (end -2.3 1.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.5 1.75) (end 3.5 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 3.5 1.75) (end 3.5 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 3.5 -1.75) (end -3.5 -1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -3.5 -1.75) (end -3.5 1.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.64944 -0.00102) (end -1.55114 -0.00102) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.50118 -0.00102) (end 1.4994 -0.00102) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 0.79908) (end -0.64944 -0.80112) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.50118 -0.75032) (end 0.50118 0.79908) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 -0.00102) (end 0.50118 -0.75032) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.64944 -0.00102) (end 0.50118 0.79908) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.4 -1.65) (end 2 -1.65) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.4 1.65) (end 2 1.65) (layer B.SilkS) (width 0.12))
+ (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers B.Cu B.Paste B.Mask)
+ (net 20 /V5))
+ (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers B.Cu B.Paste B.Mask)
+ (net 2 GND))
+ (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (dimension 84 (width 0.3) (layer Dwgs.User)
+ (gr_text "84.000 mm" (at 95.35 98 90) (layer Dwgs.User)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (feature1 (pts (xy 90 56) (xy 96.7 56)))
+ (feature2 (pts (xy 90 140) (xy 96.7 140)))
+ (crossbar (pts (xy 94 140) (xy 94 56)))
+ (arrow1a (pts (xy 94 56) (xy 94.586421 57.126504)))
+ (arrow1b (pts (xy 94 56) (xy 93.413579 57.126504)))
+ (arrow2a (pts (xy 94 140) (xy 94.586421 138.873496)))
+ (arrow2b (pts (xy 94 140) (xy 93.413579 138.873496)))
+ )
+ (dimension 65 (width 0.3) (layer Dwgs.User)
+ (gr_text "65.000 mm" (at 57.5 145.35) (layer Dwgs.User)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (feature1 (pts (xy 90 140) (xy 90 146.7)))
+ (feature2 (pts (xy 25 140) (xy 25 146.7)))
+ (crossbar (pts (xy 25 144) (xy 90 144)))
+ (arrow1a (pts (xy 90 144) (xy 88.873496 144.586421)))
+ (arrow1b (pts (xy 90 144) (xy 88.873496 143.413579)))
+ (arrow2a (pts (xy 25 144) (xy 26.126504 144.586421)))
+ (arrow2b (pts (xy 25 144) (xy 26.126504 143.413579)))
+ )
+ (gr_text 5V (at 50.546 131.572) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text g (at 84.201 103.632) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text I2 (at 84.328 101.092) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text I1 (at 84.455 98.552) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text "1\n2\n3" (at 84.963 93.218) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text U (at 84.328 88.519) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text "2\n1\n0" (at 83.75 74.75) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Addr (at 78 67.75) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Term (at 50.75 83) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text "GND\nRX\nTX" (at 68 68 90) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Boot (at 56.5 75.25 90) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text RST (at 76.073 113.157 90) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text "CAN:\n2 - CANL\n3 - GND\n7 - CANH\n9 - +12V" (at 76.75 126.5) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+ )
+ (gr_text "+ 12V -" (at 39.75 128) (layer F.Cu)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_line (start 25 56) (end 90 56) (angle 90) (layer Edge.Cuts) (width 0.15))
+ (gr_line (start 25 140) (end 25 56) (angle 90) (layer Edge.Cuts) (width 0.15))
+ (gr_line (start 90 140) (end 25 140) (angle 90) (layer Edge.Cuts) (width 0.15))
+ (gr_line (start 90 56) (end 90 140) (angle 90) (layer Edge.Cuts) (width 0.15))
+ (gr_text "CAN bus" (at 47 105 270) (layer F.SilkS)
+ (effects (font (size 3 3) (thickness 0.3)))
+ )
+ (gr_text Terminal (at 48.25 81.75 90) (layer F.SilkS)
+ (effects (font (size 2 2) (thickness 0.3)))
+ )
+ (gr_text Tx (at 71.12508 68.78828 90) (layer F.SilkS)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Rx (at 68.45808 68.66128 90) (layer F.SilkS)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Gnd (at 65.66408 67.89928 90) (layer F.SilkS)
+ (effects (font (size 1.5 1.5) (thickness 0.3)))
+ )
+ (gr_text Reset (at 76.073 113.03 90) (layer F.SilkS)
+ (effects (font (size 3 1.5) (thickness 0.3)))
+ )
+ (gr_text Boot (at 57 74.75 90) (layer F.SilkS)
+ (effects (font (size 3 1.5) (thickness 0.3)))
+ )
+
+ (segment (start 54.272 124.968) (end 51.347 124.968) (width 0.5) (layer B.Cu) (net 1))
+ (segment (start 51.347 124.968) (end 51.322 124.993) (width 0.5) (layer B.Cu) (net 1) (tstamp 5A5E500D))
+ (segment (start 51.322 124.993) (end 51.322 120.344) (width 0.5) (layer B.Cu) (net 1))
+ (segment (start 51.322 120.344) (end 51.308 120.33) (width 0.5) (layer B.Cu) (net 1) (tstamp 5A692014))
+ (segment (start 48.236 120.33) (end 51.308 120.33) (width 0.5) (layer B.Cu) (net 1))
+ (segment (start 60.452 135.763) (end 64.357 135.763) (width 0.5) (layer B.Cu) (net 2))
+ (segment (start 64.357 135.763) (end 65.659 134.461) (width 0.5) (layer B.Cu) (net 2) (tstamp 5B27BA21) (status 800000))
+ (segment (start 61.26752 124.98832) (end 61.26752 122.13252) (width 0.5) (layer B.Cu) (net 2))
+ (segment (start 61.26752 122.13252) (end 60.928 121.793) (width 0.5) (layer B.Cu) (net 2) (tstamp 5B27B9DD))
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diff --git a/F0-nolib/canbus/kicad/stm32.net b/F0-nolib/canbus/kicad/stm32.net
new file mode 100644
index 0000000..2e5df0a
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32.net
@@ -0,0 +1,1064 @@
+(export (version D)
+ (design
+ (source /home/eddy/Docs/SAO/ELECTRONICS/STM32/c8t6/canbus/kicad/stm32.sch)
+ (date "Пн 18 июн 2018 13:42:04")
+ (tool "Eeschema 4.0.7")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title)
+ (company)
+ (rev)
+ (date)
+ (source stm32.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
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+ (value 0.1)
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+ (tstamp 58C42D39))
+ (comp (ref U2)
+ (value LM1117-3.3)
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+ (sheetpath (names /) (tstamps /))
+ (tstamp 58C431FC))
+ (comp (ref U4)
+ (value MCP2551-I/SN)
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+ (sheetpath (names /) (tstamps /))
+ (tstamp 58C43297))
+ (comp (ref P13)
+ (value USB_A)
+ (footprint Connect.pretty:USB_Mini-B)
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+ (sheetpath (names /) (tstamps /))
+ (tstamp 58C433D0))
+ (comp (ref C2)
+ (value 47u)
+ (footprint Capacitors_Tantalum_SMD.pretty:Tantalum_Case-A_EIA-3216-18_Hand)
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+ (sheetpath (names /) (tstamps /))
+ (tstamp 58C454F6))
+ (comp (ref D3)
+ (value PESD1CAN)
+ (footprint TO_SOT_Packages_SMD.pretty:SOT-23)
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+ (value 4k7)
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+ (comp (ref R9)
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+ (tstamp 58C488C6))
+ (comp (ref JP1)
+ (value Terminal)
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+ (tstamp 5A6066AA)))
+ (libparts
+ (libpart (lib device) (part C)
+ (description "Unpolarized capacitor")
+ (footprints
+ (fp C_*))
+ (fields
+ (field (name Reference) C)
+ (field (name Value) C))
+ (pins
+ (pin (num 1) (name ~) (type passive))
+ (pin (num 2) (name ~) (type passive))))
+ (libpart (lib stm32-cache) (part CONN_01X01)
+ (footprints
+ (fp Pin_Header_Straight_1X*)
+ (fp Pin_Header_Angled_1X*)
+ (fp Socket_Strip_Straight_1X*)
+ (fp Socket_Strip_Angled_1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) CONN_01X01))
+ (pins
+ (pin (num 1) (name P1) (type passive))))
+ (libpart (lib stm32-cache) (part CONN_01X03)
+ (footprints
+ (fp Pin_Header_Straight_1X*)
+ (fp Pin_Header_Angled_1X*)
+ (fp Socket_Strip_Straight_1X*)
+ (fp Socket_Strip_Angled_1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) CONN_01X03))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name P2) (type passive))
+ (pin (num 3) (name P3) (type passive))))
+ (libpart (lib stm32-cache) (part CONN_02X03)
+ (footprints
+ (fp Pin_Header_Straight_2X*)
+ (fp Pin_Header_Angled_2X*)
+ (fp Socket_Strip_Straight_2X*)
+ (fp Socket_Strip_Angled_2X*)
+ (fp IDC_Header_Straight_*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) CONN_02X03))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name P2) (type passive))
+ (pin (num 3) (name P3) (type passive))
+ (pin (num 4) (name P4) (type passive))
+ (pin (num 5) (name P5) (type passive))
+ (pin (num 6) (name P6) (type passive))))
+ (libpart (lib device) (part CP)
+ (description "Polarised capacitor")
+ (footprints
+ (fp CP_*))
+ (fields
+ (field (name Reference) C)
+ (field (name Value) CP))
+ (pins
+ (pin (num 1) (name ~) (type passive))
+ (pin (num 2) (name ~) (type passive))))
+ (libpart (lib conn) (part Conn_01x01)
+ (description "Generic connector, single row, 01x01")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x01))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))))
+ (libpart (lib conn) (part Conn_01x02)
+ (description "Generic connector, single row, 01x02")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x02))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))
+ (pin (num 2) (name Pin_2) (type passive))))
+ (libpart (lib conn) (part Conn_01x07)
+ (description "Generic connector, single row, 01x07")
+ (docs ~)
+ (footprints
+ (fp Connector*:*_??x*mm*)
+ (fp Connector*:*1x??x*mm*)
+ (fp Pin?Header?Straight?1X*)
+ (fp Pin?Header?Angled?1X*)
+ (fp Socket?Strip?Straight?1X*)
+ (fp Socket?Strip?Angled?1X*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_01x07))
+ (pins
+ (pin (num 1) (name Pin_1) (type passive))
+ (pin (num 2) (name Pin_2) (type passive))
+ (pin (num 3) (name Pin_3) (type passive))
+ (pin (num 4) (name Pin_4) (type passive))
+ (pin (num 5) (name Pin_5) (type passive))
+ (pin (num 6) (name Pin_6) (type passive))
+ (pin (num 7) (name Pin_7) (type passive))))
+ (libpart (lib conn) (part DB9_Female)
+ (description "9-pin female D-SUB connector")
+ (footprints
+ (fp DB*F*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) DB9_Female))
+ (pins
+ (pin (num 1) (name 1) (type passive))
+ (pin (num 2) (name 2) (type passive))
+ (pin (num 3) (name 3) (type passive))
+ (pin (num 4) (name 4) (type passive))
+ (pin (num 5) (name 5) (type passive))
+ (pin (num 6) (name 6) (type passive))
+ (pin (num 7) (name 7) (type passive))
+ (pin (num 8) (name 8) (type passive))
+ (pin (num 9) (name 9) (type passive))))
+ (libpart (lib conn) (part DB9_Male)
+ (description "9-pin male D-SUB connector")
+ (footprints
+ (fp DB*M*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) DB9_Male))
+ (pins
+ (pin (num 1) (name 1) (type passive))
+ (pin (num 2) (name 2) (type passive))
+ (pin (num 3) (name 3) (type passive))
+ (pin (num 4) (name 4) (type passive))
+ (pin (num 5) (name 5) (type passive))
+ (pin (num 6) (name 6) (type passive))
+ (pin (num 7) (name 7) (type passive))
+ (pin (num 8) (name 8) (type passive))
+ (pin (num 9) (name 9) (type passive))))
+ (libpart (lib device) (part D_Schottky)
+ (description "Schottky diode")
+ (footprints
+ (fp TO-???*)
+ (fp *SingleDiode)
+ (fp *_Diode_*)
+ (fp *SingleDiode*)
+ (fp D_*))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) D_Schottky))
+ (pins
+ (pin (num 1) (name K) (type passive))
+ (pin (num 2) (name A) (type passive))))
+ (libpart (lib device) (part D_Zener)
+ (description "Zener Diode")
+ (docs https://en.wikipedia.org/wiki/Zener_diode)
+ (footprints
+ (fp TO-???*)
+ (fp *SingleDiode)
+ (fp *_Diode_*)
+ (fp *SingleDiode*)
+ (fp D_*))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) D_Zener))
+ (pins
+ (pin (num 1) (name K) (type passive))
+ (pin (num 2) (name A) (type passive))))
+ (libpart (lib device) (part Jumper_NO_Small)
+ (description "Jumper, normally open")
+ (fields
+ (field (name Reference) JP)
+ (field (name Value) Jumper_NO_Small))
+ (pins
+ (pin (num 1) (name 1) (type passive))
+ (pin (num 2) (name 2) (type passive))))
+ (libpart (lib stm32-cache) (part LED-RESCUE-stm32)
+ (footprints
+ (fp LED*))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) LED-RESCUE-stm32))
+ (pins
+ (pin (num 1) (name K) (type passive))
+ (pin (num 2) (name A) (type passive))))
+ (libpart (lib stm32-rescue) (part LM1117-3.3-RESCUE-stm32)
+ (footprints
+ (fp SOT-223*)
+ (fp TO-263*)
+ (fp TO-252*))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) LM1117-3.3-RESCUE-stm32))
+ (pins
+ (pin (num 1) (name GND/ADJ) (type power_in))
+ (pin (num 2) (name VO) (type passive))
+ (pin (num 3) (name VI) (type power_in))
+ (pin (num 4) (name VO) (type power_out))))
+ (libpart (lib interface) (part MCP2551-I/SN)
+ (description "High-Speed CAN Transceiver, 1Mbps, 5V supply, SOIC8 package")
+ (docs http://ww1.microchip.com/downloads/en/devicedoc/21667d.pdf)
+ (footprints
+ (fp SOIC*Pitch1.27mm*))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) MCP2551-I/SN)
+ (field (name Footprint) Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm))
+ (pins
+ (pin (num 1) (name TXD) (type input))
+ (pin (num 2) (name VSS) (type power_in))
+ (pin (num 3) (name VDD) (type power_in))
+ (pin (num 4) (name RXD) (type output))
+ (pin (num 5) (name Vref) (type power_out))
+ (pin (num 6) (name CANL) (type BiDi))
+ (pin (num 7) (name CANH) (type BiDi))
+ (pin (num 8) (name Rs) (type input))))
+ (libpart (lib elements) (part PESD1CAN)
+ (description "CAN bus ESD protection")
+ (footprints
+ (fp SOT23))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) PESD1CAN))
+ (pins
+ (pin (num 1) (name K) (type passive))
+ (pin (num 2) (name K) (type passive))
+ (pin (num 3) (name O) (type passive))))
+ (libpart (lib device) (part Q_NMOS_GSD)
+ (description "Transistor N-MOSFETwith substrate diode (general)")
+ (fields
+ (field (name Reference) Q)
+ (field (name Value) Q_NMOS_GSD))
+ (pins
+ (pin (num 1) (name G) (type input))
+ (pin (num 2) (name S) (type passive))
+ (pin (num 3) (name D) (type passive))))
+ (libpart (lib device) (part Q_PMOS_GSD)
+ (description "Transistor P-MOSFET with substrate diode (general)")
+ (fields
+ (field (name Reference) Q)
+ (field (name Value) Q_PMOS_GSD))
+ (pins
+ (pin (num 1) (name G) (type input))
+ (pin (num 2) (name S) (type passive))
+ (pin (num 3) (name D) (type passive))))
+ (libpart (lib device) (part R)
+ (description Resistor)
+ (footprints
+ (fp R_*)
+ (fp R_*))
+ (fields
+ (field (name Reference) R)
+ (field (name Value) R))
+ (pins
+ (pin (num 1) (name ~) (type passive))
+ (pin (num 2) (name ~) (type passive))))
+ (libpart (lib ESD_Protection) (part SP0502BAHT)
+ (description "TVS Diode Array, 5.5V Standoff, 2 Channels, SOT-23 package")
+ (docs http://www.littelfuse.com/~/media/files/littelfuse/technical%20resources/documents/data%20sheets/sp05xxba.pdf)
+ (footprints
+ (fp SOT?23*))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) SP0502BAHT)
+ (field (name Footprint) TO_SOT_Packages_SMD:SOT-23))
+ (pins
+ (pin (num 1) (name K) (type input))
+ (pin (num 2) (name K) (type input))
+ (pin (num 3) (name A) (type input))))
+ (libpart (lib stm32-cache) (part STM32F042C4Tx)
+ (aliases
+ (alias STM32F042C6Tx))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) STM32F042C4Tx)
+ (field (name Footprint) LQFP48))
+ (pins
+ (pin (num 1) (name VBAT) (type power_in))
+ (pin (num 2) (name PC13/RTC_OUT_ALARM/RTC_OUT_CALIB/RTC_TAMP1/RTC_TS/SYS_WKUP2) (type BiDi))
+ (pin (num 3) (name PC14/RCC_OSC32_IN) (type BiDi))
+ (pin (num 4) (name PC15/RCC_OSC32_OUT) (type BiDi))
+ (pin (num 5) (name PF0/CRS_SYNC/I2C1_SDA/RCC_OSC_IN) (type input))
+ (pin (num 6) (name PF1/I2C1_SCL/RCC_OSC_OUT) (type input))
+ (pin (num 7) (name NRST) (type input))
+ (pin (num 8) (name VSSA) (type power_in))
+ (pin (num 9) (name VDDA) (type power_in))
+ (pin (num 10) (name ADC_IN0/RTC_TAMP2/SYS_WKUP1/TIM2_CH1/TIM2_ETR/TSC_G1_IO1/USART2_CTS/PA0) (type BiDi))
+ (pin (num 11) (name ADC_IN1/TIM2_CH2/TSC_G1_IO2/USART2_DE/USART2_RTS/PA1) (type BiDi))
+ (pin (num 12) (name ADC_IN2/SYS_WKUP4/TIM2_CH3/TSC_G1_IO3/USART2_TX/PA2) (type BiDi))
+ (pin (num 13) (name ADC_IN3/TIM2_CH4/TSC_G1_IO4/USART2_RX/PA3) (type BiDi))
+ (pin (num 14) (name ADC_IN4/I2S1_WS/SPI1_NSS/TIM14_CH1/TSC_G2_IO1/USART2_CK/USB_OE/PA4) (type BiDi))
+ (pin (num 15) (name ADC_IN5/CEC/I2S1_CK/SPI1_SCK/TIM2_CH1/TIM2_ETR/TSC_G2_IO2/PA5) (type BiDi))
+ (pin (num 16) (name ADC_IN6/I2S1_MCK/SPI1_MISO/TIM16_CH1/TIM1_BKIN/TIM3_CH1/TSC_G2_IO3/PA6) (type BiDi))
+ (pin (num 17) (name ADC_IN7/I2S1_SD/SPI1_MOSI/TIM14_CH1/TIM17_CH1/TIM1_CH1N/TIM3_CH2/TSC_G2_IO4/PA7) (type BiDi))
+ (pin (num 18) (name PB0/ADC_IN8/TIM1_CH2N/TIM3_CH3/TSC_G3_IO2) (type BiDi))
+ (pin (num 19) (name PB1/ADC_IN9/TIM14_CH1/TIM1_CH3N/TIM3_CH4/TSC_G3_IO3) (type BiDi))
+ (pin (num 20) (name PB2/TSC_G3_IO4) (type BiDi))
+ (pin (num 21) (name PB10/CEC/I2C1_SCL/SPI2_SCK/TIM2_CH3/TSC_SYNC) (type BiDi))
+ (pin (num 22) (name PB11/I2C1_SDA/TIM2_CH4) (type BiDi))
+ (pin (num 23) (name VSS) (type power_in))
+ (pin (num 24) (name VDD) (type power_in))
+ (pin (num 25) (name PB12/SPI2_NSS/TIM1_BKIN) (type BiDi))
+ (pin (num 26) (name PB13/I2C1_SCL/SPI2_SCK/TIM1_CH1N) (type BiDi))
+ (pin (num 27) (name PB14/I2C1_SDA/SPI2_MISO/TIM1_CH2N) (type BiDi))
+ (pin (num 28) (name PB15/RTC_REFIN/SPI2_MOSI/SYS_WKUP7/TIM1_CH3N) (type BiDi))
+ (pin (num 29) (name CRS_SYNC/RCC_MCO/TIM1_CH1/USART1_CK/PA8) (type BiDi))
+ (pin (num 30) (name I2C1_SCL/TIM1_CH2/TSC_G4_IO1/USART1_TX/PA9) (type BiDi))
+ (pin (num 31) (name I2C1_SDA/TIM17_BKIN/TIM1_CH3/TSC_G4_IO2/USART1_RX/PA10) (type BiDi))
+ (pin (num 32) (name CAN_RX/I2C1_SCL/TIM1_CH4/TSC_G4_IO3/USART1_CTS/USB_DM/PA11) (type BiDi))
+ (pin (num 33) (name CAN_TX/I2C1_SDA/TIM1_ETR/TSC_G4_IO4/USART1_DE/USART1_RTS/USB_DP/PA12) (type BiDi))
+ (pin (num 34) (name IR_OUT/SYS_SWDIO/USB_OE/PA13) (type BiDi))
+ (pin (num 35) (name VSS) (type power_in))
+ (pin (num 36) (name VDDIO2) (type power_in))
+ (pin (num 37) (name SYS_SWCLK/USART2_TX/PA14) (type BiDi))
+ (pin (num 38) (name I2S1_WS/SPI1_NSS/TIM2_CH1/TIM2_ETR/USART2_RX/USB_OE/PA15) (type BiDi))
+ (pin (num 39) (name PB3/I2S1_CK/SPI1_SCK/TIM2_CH2/TSC_G5_IO1) (type BiDi))
+ (pin (num 40) (name PB4/I2S1_MCK/SPI1_MISO/TIM17_BKIN/TIM3_CH1/TSC_G5_IO2) (type BiDi))
+ (pin (num 41) (name PB5/I2C1_SMBA/I2S1_SD/SPI1_MOSI/SYS_WKUP6/TIM16_BKIN/TIM3_CH2) (type BiDi))
+ (pin (num 42) (name PB6/I2C1_SCL/TIM16_CH1N/TSC_G5_IO3/USART1_TX) (type BiDi))
+ (pin (num 43) (name PB7/I2C1_SDA/TIM17_CH1N/TSC_G5_IO4/USART1_RX) (type BiDi))
+ (pin (num 44) (name PF11) (type BiDi))
+ (pin (num 45) (name PB8/CAN_RX/CEC/I2C1_SCL/TIM16_CH1/TSC_SYNC) (type BiDi))
+ (pin (num 46) (name PB9/CAN_TX/I2C1_SDA/IR_OUT/SPI2_NSS/TIM17_CH1) (type BiDi))
+ (pin (num 47) (name VSS) (type power_in))
+ (pin (num 48) (name VDD) (type power_in))))
+ (libpart (lib stm32-cache) (part SW_Push)
+ (fields
+ (field (name Reference) SW)
+ (field (name Value) SW_Push))
+ (pins
+ (pin (num 1) (name 1) (type passive))
+ (pin (num 2) (name 2) (type passive))))
+ (libpart (lib elements) (part USB6B1)
+ (description "USB bus ESD protection")
+ (footprints
+ (fp SO8))
+ (fields
+ (field (name Reference) D)
+ (field (name Value) USB6B1))
+ (pins
+ (pin (num 1) (name VCC) (type passive))
+ (pin (num 2) (name I/O1) (type passive))
+ (pin (num 3) (name I/O2) (type passive))
+ (pin (num 4) (name GND) (type passive))
+ (pin (num 5) (name GND) (type passive))
+ (pin (num 6) (name I/O2) (type passive))
+ (pin (num 7) (name I/O1) (type passive))
+ (pin (num 8) (name VCC) (type passive))))
+ (libpart (lib stm32-cache) (part USB_A-RESCUE-stm32)
+ (footprints
+ (fp USB*))
+ (fields
+ (field (name Reference) P)
+ (field (name Value) USB_A-RESCUE-stm32))
+ (pins
+ (pin (num 1) (name VBUS) (type power_in))
+ (pin (num 2) (name D-) (type passive))
+ (pin (num 3) (name D+) (type passive))
+ (pin (num 4) (name GND) (type power_in))
+ (pin (num 5) (name shield) (type passive)))))
+ (libraries
+ (library (logical stm32-rescue)
+ (uri stm32-rescue.lib))
+ (library (logical device)
+ (uri /usr/share/kicad/library/device.lib))
+ (library (logical conn)
+ (uri /usr/share/kicad/library/conn.lib))
+ (library (logical interface)
+ (uri /usr/share/kicad/library/interface.lib))
+ (library (logical elements)
+ (uri elements.lib))
+ (library (logical ESD_Protection)
+ (uri /usr/share/kicad/library/ESD_Protection.lib))
+ (library (logical stm32-cache)
+ (uri /home/eddy/Docs/SAO/ELECTRONICS/STM32/c8t6/canbus/kicad/stm32-cache.lib)))
+ (nets
+ (net (code 1) (name "Net-(J2-Pad9)")
+ (node (ref J3) (pin 9))
+ (node (ref J5) (pin 1))
+ (node (ref Q1) (pin 3))
+ (node (ref J2) (pin 9)))
+ (net (code 2) (name "Net-(J3-Pad1)")
+ (node (ref J3) (pin 1)))
+ (net (code 3) (name "Net-(J3-Pad6)")
+ (node (ref J3) (pin 6)))
+ (net (code 4) (name "Net-(J3-Pad8)")
+ (node (ref J3) (pin 8)))
+ (net (code 5) (name "Net-(J3-Pad4)")
+ (node (ref J3) (pin 4)))
+ (net (code 6) (name /OUTP2)
+ (node (ref J4) (pin 3))
+ (node (ref Q3) (pin 3)))
+ (net (code 7) (name +3V3)
+ (node (ref C11) (pin 2))
+ (node (ref C13) (pin 2))
+ (node (ref C12) (pin 2))
+ (node (ref U2) (pin 4))
+ (node (ref U2) (pin 2))
+ (node (ref R29) (pin 2))
+ (node (ref U7) (pin 48))
+ (node (ref SW2) (pin 2))
+ (node (ref U7) (pin 36))
+ (node (ref U7) (pin 9))
+ (node (ref D2) (pin 2))
+ (node (ref C14) (pin 2))
+ (node (ref U7) (pin 24))
+ (node (ref R28) (pin 2))
+ (node (ref C6) (pin 2))
+ (node (ref R30) (pin 2))
+ (node (ref C2) (pin 1))
+ (node (ref R13) (pin 1)))
+ (net (code 8) (name "Net-(J4-Pad1)")
+ (node (ref J4) (pin 1))
+ (node (ref R13) (pin 2)))
+ (net (code 9) (name "Net-(J3-Pad5)")
+ (node (ref J3) (pin 5)))
+ (net (code 10) (name "Net-(J2-Pad1)")
+ (node (ref J2) (pin 1)))
+ (net (code 11) (name "Net-(J2-Pad6)")
+ (node (ref J2) (pin 6)))
+ (net (code 12) (name "Net-(J2-Pad8)")
+ (node (ref J2) (pin 8)))
+ (net (code 13) (name "Net-(J2-Pad4)")
+ (node (ref J2) (pin 4)))
+ (net (code 14) (name "Net-(J2-Pad5)")
+ (node (ref J2) (pin 5)))
+ (net (code 15) (name GND)
+ (node (ref Q1) (pin 1))
+ (node (ref P12) (pin 1))
+ (node (ref C1) (pin 2))
+ (node (ref J1) (pin 5))
+ (node (ref J2) (pin 3))
+ (node (ref C15) (pin 2))
+ (node (ref R5) (pin 1))
+ (node (ref R4) (pin 2))
+ (node (ref C14) (pin 1))
+ (node (ref Q3) (pin 2))
+ (node (ref U1) (pin 1))
+ (node (ref Q4) (pin 2))
+ (node (ref C11) (pin 1))
+ (node (ref J5) (pin 2))
+ (node (ref U7) (pin 47))
+ (node (ref D1) (pin 3))
+ (node (ref D3) (pin 3))
+ (node (ref U2) (pin 1))
+ (node (ref U4) (pin 2))
+ (node (ref C12) (pin 1))
+ (node (ref C13) (pin 1))
+ (node (ref D7) (pin 5))
+ (node (ref R8) (pin 2))
+ (node (ref R27) (pin 2))
+ (node (ref J1) (pin 1))
+ (node (ref D9) (pin 2))
+ (node (ref C5) (pin 2))
+ (node (ref SW1) (pin 2))
+ (node (ref D8) (pin 2))
+ (node (ref R7) (pin 2))
+ (node (ref J1) (pin 3))
+ (node (ref J3) (pin 3))
+ (node (ref C2) (pin 2))
+ (node (ref P13) (pin 5))
+ (node (ref U7) (pin 23))
+ (node (ref U7) (pin 8))
+ (node (ref U7) (pin 35))
+ (node (ref J4) (pin 7))
+ (node (ref Q2) (pin 2)))
+ (net (code 16) (name /OUTP1)
+ (node (ref J4) (pin 2))
+ (node (ref Q2) (pin 3)))
+ (net (code 17) (name /O1)
+ (node (ref U7) (pin 20))
+ (node (ref R1) (pin 1)))
+ (net (code 18) (name "Net-(Q2-Pad1)")
+ (node (ref Q2) (pin 1))
+ (node (ref R1) (pin 2)))
+ (net (code 19) (name +5V)
+ (node (ref R6) (pin 1))
+ (node (ref D4) (pin 1))
+ (node (ref U1) (pin 2))
+ (node (ref U1) (pin 4))
+ (node (ref C1) (pin 1))
+ (node (ref J6) (pin 1))
+ (node (ref U4) (pin 3))
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+ (node (ref U7) (pin 33))
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+ (node (ref D7) (pin 6))
+ (node (ref R35) (pin 1)))
+ (net (code 22) (name "Net-(D7-Pad7)")
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+ (net (code 23) (name "Net-(U7-Pad22)")
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+ (net (code 24) (name "Net-(R34-Pad2)")
+ (node (ref R34) (pin 2))
+ (node (ref U7) (pin 32)))
+ (net (code 25) (name "Net-(U7-Pad42)")
+ (node (ref U7) (pin 42)))
+ (net (code 26) (name "Net-(U7-Pad13)")
+ (node (ref U7) (pin 13)))
+ (net (code 27) (name "Net-(U7-Pad43)")
+ (node (ref U7) (pin 43)))
+ (net (code 28) (name "Net-(U7-Pad12)")
+ (node (ref U7) (pin 12)))
+ (net (code 29) (name "Net-(U7-Pad34)")
+ (node (ref U7) (pin 34)))
+ (net (code 30) (name /BOOT0)
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+ (node (ref SW2) (pin 1))
+ (node (ref R27) (pin 1))
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+ (net (code 32) (name "Net-(U7-Pad16)")
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+ (net (code 33) (name "Net-(U7-Pad26)")
+ (node (ref U7) (pin 26)))
+ (net (code 34) (name "Net-(U7-Pad1)")
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+ (net (code 35) (name /LED0)
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+ (net (code 79) (name "Net-(D5-Pad2)")
+ (node (ref R29) (pin 1))
+ (node (ref D5) (pin 2)))
+ (net (code 80) (name "Net-(P17-Pad1)")
+ (node (ref P17) (pin 1)))
+ (net (code 81) (name /12Vin)
+ (node (ref U1) (pin 3))
+ (node (ref C15) (pin 1))
+ (node (ref Q1) (pin 2))
+ (node (ref R3) (pin 1)))
+ (net (code 82) (name "Net-(P15-Pad1)")
+ (node (ref P15) (pin 1)))
+ (net (code 83) (name "Net-(P16-Pad1)")
+ (node (ref P16) (pin 1)))
+ (net (code 84) (name "Net-(P18-Pad1)")
+ (node (ref P18) (pin 1)))))
\ No newline at end of file
diff --git a/F0-nolib/canbus/kicad/stm32.pro b/F0-nolib/canbus/kicad/stm32.pro
new file mode 100644
index 0000000..39fd092
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32.pro
@@ -0,0 +1,67 @@
+update=Чт 11 янв 2018 23:12:54
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
+version=1
+[eeschema]
+version=1
+LibDir=/home/eddy/kicad/Kicad-Libraries/library
+[eeschema/libraries]
+LibName1=stm32-rescue
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
+LibName31=stm32
+LibName32=vreg
+LibName33=elements
+LibName34=ESD_Protection
+LibName35=switches
+LibName36=acs712
diff --git a/F0-nolib/canbus/kicad/stm32.sch b/F0-nolib/canbus/kicad/stm32.sch
new file mode 100644
index 0000000..79f1677
--- /dev/null
+++ b/F0-nolib/canbus/kicad/stm32.sch
@@ -0,0 +1,1737 @@
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+LIBS:power
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+LIBS:transistors
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+LIBS:74xx
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diff --git a/F0-nolib/canbus/src/CANbus.geany b/F0-nolib/canbus/src/CANbus.geany
new file mode 100644
index 0000000..168beab
--- /dev/null
+++ b/F0-nolib/canbus/src/CANbus.geany
@@ -0,0 +1,32 @@
+[editor]
+line_wrapping=false
+line_break_column=100
+auto_continue_multiline=true
+
+[file_prefs]
+final_new_line=true
+ensure_convert_new_lines=true
+strip_trailing_spaces=true
+replace_tabs=true
+
+[indentation]
+indent_width=4
+indent_type=0
+indent_hard_tab_width=4
+detect_indent=false
+detect_indent_width=false
+indent_mode=3
+
+[project]
+name=CANbus
+base_path=/home/eddy/Docs/SAO/ELECTRONICS/STM32/F0-srcs/canbus/src
+
+[long line marker]
+long_line_behaviour=1
+long_line_column=100
+
+[files]
+current_page=-1
+
+[VTE]
+last_dir=/home/eddy
diff --git a/F0-nolib/canbus/src/Makefile b/F0-nolib/canbus/src/Makefile
new file mode 100644
index 0000000..aae0b4e
--- /dev/null
+++ b/F0-nolib/canbus/src/Makefile
@@ -0,0 +1,145 @@
+BINARY = canbus
+BOOTPORT ?= /dev/ttyUSB0
+BOOTSPEED ?= 57600
+# MCU FAMILY
+FAMILY = F0
+# MCU code
+MCU = F042x6
+# hardware definitions
+DEFS += -DUSARTNUM=1
+#DEFS += -DCHECK_TMOUT
+#DEFS += -DEBUG
+# change this linking script depending on particular MCU model,
+# for example, if you have STM32F103VBT6, you should write:
+LDSCRIPT = ld/stm32f042k.ld
+
+INDEPENDENT_HEADERS=
+
+FP_FLAGS ?= -msoft-float
+ASM_FLAGS = -mthumb -mcpu=cortex-m0 -march=armv6-m -mtune=cortex-m0
+ARCH_FLAGS = $(ASM_FLAGS) $(FP_FLAGS)
+
+###############################################################################
+# Executables
+OPREFIX ?= /opt/bin/arm-none-eabi
+#PREFIX ?= /usr/x86_64-pc-linux-gnu/arm-none-eabi/gcc-bin/7.3.0/arm-none-eabi
+PREFIX ?= $(OPREFIX)
+
+RM := rm -f
+RMDIR := rmdir
+CC := $(PREFIX)-gcc
+LD := $(PREFIX)-gcc
+AR := $(PREFIX)-ar
+AS := $(PREFIX)-as
+OBJCOPY := $(OPREFIX)-objcopy
+OBJDUMP := $(OPREFIX)-objdump
+GDB := $(OPREFIX)-gdb
+STFLASH := $(shell which st-flash)
+STBOOT := $(shell which stm32flash)
+
+###############################################################################
+# Source files
+OBJDIR = mk
+LDSCRIPT ?= $(BINARY).ld
+SRC := $(wildcard *.c)
+OBJS := $(addprefix $(OBJDIR)/, $(SRC:%.c=%.o))
+STARTUP = $(OBJDIR)/startup.o
+OBJS += $(STARTUP)
+DEPS := $(OBJS:.o=.d)
+
+INC_DIR ?= ../../inc
+
+INCLUDE := -I$(INC_DIR)/F0 -I$(INC_DIR)/cm
+LIB_DIR := $(INC_DIR)/ld
+
+###############################################################################
+# C flags
+CFLAGS += -O2 -g -MD -D__thumb2__=1
+CFLAGS += -Wall -Wextra -Wshadow -Wimplicit-function-declaration
+CFLAGS += -Wredundant-decls $(INCLUDE)
+# -Wmissing-prototypes -Wstrict-prototypes
+CFLAGS += -fno-common -ffunction-sections -fdata-sections
+
+###############################################################################
+# Linker flags
+LDFLAGS += --static -nostartfiles
+#--specs=nano.specs
+LDFLAGS += -L$(LIB_DIR)
+LDFLAGS += -T$(LDSCRIPT)
+LDFLAGS += -Wl,-Map=$(OBJDIR)/$(BINARY).map
+LDFLAGS += -Wl,--gc-sections
+
+###############################################################################
+# Used libraries
+LDLIBS += -Wl,--start-group -lc -lgcc -Wl,--end-group
+LDLIBS += $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
+
+DEFS += -DSTM32$(FAMILY) -DSTM32$(MCU)
+
+#.SUFFIXES: .elf .bin .hex .srec .list .map .images
+#.SECONDEXPANSION:
+#.SECONDARY:
+
+ELF := $(OBJDIR)/$(BINARY).elf
+LIST := $(OBJDIR)/$(BINARY).list
+BIN := $(BINARY).bin
+HEX := $(BINARY).hex
+
+all: bin list
+
+elf: $(ELF)
+bin: $(BIN)
+hex: $(HEX)
+list: $(LIST)
+
+ifneq ($(MAKECMDGOALS),clean)
+-include $(DEPS)
+endif
+
+$(OBJDIR):
+ mkdir $(OBJDIR)
+
+$(STARTUP): $(INC_DIR)/startup/vector.c
+ $(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $<
+
+$(OBJDIR)/%.o: %.c
+ @echo " CC $<"
+ $(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $<
+
+#$(OBJDIR)/%.d: %.c $(OBJDIR)
+# $(CC) -MM -MG $< | sed -e 's,^\([^:]*\)\.o[ ]*:,$(@D)/\1.o $(@D)/\1.d:,' >$@
+
+$(BIN): $(ELF)
+ @echo " OBJCOPY $(BIN)"
+ $(OBJCOPY) -Obinary $(ELF) $(BIN)
+
+$(HEX): $(ELF)
+ @echo " OBJCOPY $(HEX)"
+ $(OBJCOPY) -Oihex $(ELF) $(HEX)
+
+$(LIST): $(ELF)
+ @echo " OBJDUMP $(LIST)"
+ $(OBJDUMP) -S $(ELF) > $(LIST)
+
+$(ELF): $(OBJDIR) $(OBJS)
+ @echo " LD $(ELF)"
+ $(LD) $(LDFLAGS) $(ARCH_FLAGS) $(OBJS) $(LDLIBS) -o $(ELF)
+
+clean:
+ @echo " CLEAN"
+ $(RM) $(OBJS) $(DEPS) $(ELF) $(HEX) $(LIST) $(OBJDIR)/*.map *.d
+ @rmdir $(OBJDIR) 2>/dev/null || true
+
+
+flash: $(BIN)
+ @echo " FLASH $(BIN)"
+ $(STFLASH) write $(BIN) 0x8000000
+
+boot: $(BIN)
+ @echo " LOAD $(BIN) through bootloader"
+ $(STBOOT) -b$(BOOTSPEED) $(BOOTPORT) -w $(BIN)
+
+gentags:
+ CFLAGS="$(CFLAGS) $(DEFS)" geany -g $(BINARY).c.tags *[hc] 2>/dev/null
+
+.PHONY: clean flash boot gentags
diff --git a/F0-nolib/canbus/src/can.c b/F0-nolib/canbus/src/can.c
new file mode 100644
index 0000000..011d7db
--- /dev/null
+++ b/F0-nolib/canbus/src/can.c
@@ -0,0 +1,131 @@
+/*
+ * geany_encoding=koi8-r
+ * can.c
+ *
+ * Copyright 2018 Edward V. Emelianov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ *
+ */
+#include "can.h"
+#include "hardware.h"
+#include "usart.h"
+
+#define CMD_TOGGLE (0xDA)
+#define CAN_ID_MASK (0xFF70U)
+#define CAN_ID1 (0x651U)
+#define CAN_ID2 (0x652U)
+#define FILTER_LIST (0) /* 0: filter mode = identifier mask, 1: filter mode = identifier list */
+
+#define CAN_FLAG_GOTDUMMY (1)
+static uint8_t CAN_addr = 255;
+static uint8_t CAN_flags = 0;
+
+// get CAN address data from GPIO pins
+void readCANaddr(){
+ CAN_addr = READ_CAN_INV_ADDR();
+ CAN_addr = ~CAN_addr & 0x7;
+}
+
+uint8_t getCANaddr(){
+ return CAN_addr;
+}
+
+void CAN_setup(){
+ if(CAN_addr == 255) readCANaddr();
+ // Configure GPIO: PB8 - CAN_Rx, PB9 - CAN_Tx
+ /* (1) Select AF mode (10) on PB8 and PB9 */
+ /* (2) AF4 for CAN signals */
+ GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER8 | GPIO_MODER_MODER9))
+ | (GPIO_MODER_MODER8_AF | GPIO_MODER_MODER9_AF); /* (1) */
+ GPIOB->AFR[1] = (GPIOB->AFR[1] &~ (GPIO_AFRH_AFRH0 | GPIO_AFRH_AFRH1))\
+ | (4 << (0 * 4)) | (4 << (1 * 4)); /* (2) */
+ /* Enable the peripheral clock CAN */
+ RCC->APB1ENR |= RCC_APB1ENR_CANEN;
+ /* Configure CAN */
+ /* (1) Enter CAN init mode to write the configuration */
+ /* (2) Wait the init mode entering */
+ /* (3) Exit sleep mode */
+ /* (4) Loopback mode, set timing to 1Mb/s: BS1 = 4, BS2 = 3, prescaler = 6 */
+ /* (5) Leave init mode */
+ /* (6) Wait the init mode leaving */
+ /* (7) Enter filter init mode, (16-bit + mask, filter 0 for FIFO 0) */
+ /* (8) Acivate filter 0 */
+ /* (9) Identifier list mode */
+ /* (11) Set the Id list */
+ /* (12) Set the Id + mask (all bits of standard id will care) */
+ /* (13) Leave filter init */
+ /* (14) Set FIFO0 message pending IT enable */
+ CAN->MCR |= CAN_MCR_INRQ; /* (1) */
+ while((CAN->MSR & CAN_MSR_INAK)!=CAN_MSR_INAK) /* (2) */
+ {
+ /* add time out here for a robust application */
+ }
+ CAN->MCR &=~ CAN_MCR_SLEEP; /* (3) */
+ CAN->BTR |= CAN_BTR_LBKM | 2 << 20 | 3 << 16 | 5 << 0; /* (4) */
+ CAN->MCR &=~ CAN_MCR_INRQ; /* (5) */
+ while((CAN->MSR & CAN_MSR_INAK)==CAN_MSR_INAK) /* (6) */
+ {
+ /* add time out here for a robust application */
+ }
+ CAN->FMR = CAN_FMR_FINIT; /* (7) */
+ CAN->FA1R = CAN_FA1R_FACT0; /* (8) */
+ #if (FILTER_LIST)
+ CAN->FM1R = CAN_FM1R_FBM0; /* (9) */
+ CAN->sFilterRegister[0].FR1 = CAN_ID2 << 5 | CAN_ID1 << (16+5); /* (10) */
+ #else
+ CAN->sFilterRegister[0].FR1 = CAN_ID1 << 5 | CAN_ID_MASK << 16; /* (11) */
+ #endif /* FILTER_LIST */
+
+ CAN->FMR &=~ CAN_FMR_FINIT; /* (12) */
+ CAN->IER |= CAN_IER_FMPIE0; /* (13) */
+
+ /* Configure IT */
+ /* (14) Set priority for CAN_IRQn */
+ /* (15) Enable CAN_IRQn */
+ NVIC_SetPriority(CEC_CAN_IRQn, 0); /* (16) */
+ NVIC_EnableIRQ(CEC_CAN_IRQn); /* (17) */
+}
+
+void can_proc(){
+ if(CAN_flags){
+ if(CAN_flags & CAN_FLAG_GOTDUMMY){
+ SEND("Got dummy message\n");
+ }
+ CAN_flags = 0;
+ }
+}
+
+void can_send_dummy(){
+ if((CAN->TSR & CAN_TSR_TME0) == CAN_TSR_TME0){ /* check mailbox 0 is empty */
+ CAN->sTxMailBox[0].TDTR = 1; /* fill data length = 1 */
+ CAN->sTxMailBox[0].TDLR = CMD_TOGGLE; /* fill 8-bit data */
+ CAN->sTxMailBox[0].TIR = (uint32_t)(CAN_ID1 << 21 | CAN_TI0R_TXRQ); /* fill Id field and request a transmission */
+ }
+}
+
+void cec_can_isr(){
+ uint32_t CAN_ReceiveMessage = 0;
+
+ if(CAN->RF0R & CAN_RF0R_FMP0){ /* check if a message is filtered and received by FIFO 0 */
+ LED_blink(LED1); /* Toggle LED1 */
+ CAN_ReceiveMessage = CAN->sFIFOMailBox[0].RDLR; /* read data */
+ CAN->RF0R |= CAN_RF0R_RFOM0; /* release FIFO */
+ if((CAN_ReceiveMessage & 0xFF) == CMD_TOGGLE){
+ CAN_flags |= CAN_FLAG_GOTDUMMY;
+ }
+ }
+}
diff --git a/F0-nolib/canbus/src/can.h b/F0-nolib/canbus/src/can.h
new file mode 100644
index 0000000..3e381a8
--- /dev/null
+++ b/F0-nolib/canbus/src/can.h
@@ -0,0 +1,37 @@
+/*
+ * geany_encoding=koi8-r
+ * can.h
+ *
+ * Copyright 2018 Edward V. Emelianov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ *
+ */
+#pragma once
+#ifndef __CAN_H__
+#define __CAN_H__
+
+#include "hardware.h"
+
+void readCANaddr();
+uint8_t getCANaddr();
+
+void CAN_setup();
+
+void can_send_dummy();
+void can_proc();
+
+#endif // __CAN_H__
diff --git a/F0-nolib/canbus/src/canbus.bin b/F0-nolib/canbus/src/canbus.bin
new file mode 100755
index 0000000..9a85c3c
Binary files /dev/null and b/F0-nolib/canbus/src/canbus.bin differ
diff --git a/F0-nolib/canbus/src/canbus.c.tags b/F0-nolib/canbus/src/canbus.c.tags
new file mode 100644
index 0000000..8b3defa
--- /dev/null
+++ b/F0-nolib/canbus/src/canbus.c.tags
@@ -0,0 +1,4387 @@
+# format=tagmanager
+ADC655360
+ADC1655360
+ADC1_BASE655360
+ADC1_COMP_IRQHandler655360
+ADC1_COMP_IRQn655360
+ADC_BASE655360
+ADC_CCR_TSEN655360
+ADC_CCR_VBATEN655360
+ADC_CCR_VREFEN655360
+ADC_CFGR1_ALIGN655360
+ADC_CFGR1_AUTDLY655360
+ADC_CFGR1_AUTOFF655360
+ADC_CFGR1_AWDCH655360
+ADC_CFGR1_AWDCH_0655360
+ADC_CFGR1_AWDCH_1655360
+ADC_CFGR1_AWDCH_2655360
+ADC_CFGR1_AWDCH_3655360
+ADC_CFGR1_AWDCH_4655360
+ADC_CFGR1_AWDEN655360
+ADC_CFGR1_AWDSGL655360
+ADC_CFGR1_CONT655360
+ADC_CFGR1_DISCEN655360
+ADC_CFGR1_DMACFG655360
+ADC_CFGR1_DMAEN655360
+ADC_CFGR1_EXTEN655360
+ADC_CFGR1_EXTEN_0655360
+ADC_CFGR1_EXTEN_1655360
+ADC_CFGR1_EXTSEL655360
+ADC_CFGR1_EXTSEL_0655360
+ADC_CFGR1_EXTSEL_1655360
+ADC_CFGR1_EXTSEL_2655360
+ADC_CFGR1_OVRMOD655360
+ADC_CFGR1_RES655360
+ADC_CFGR1_RES_0655360
+ADC_CFGR1_RES_1655360
+ADC_CFGR1_SCANDIR655360
+ADC_CFGR1_WAIT655360
+ADC_CFGR2_CKMODE655360
+ADC_CFGR2_CKMODE_0655360
+ADC_CFGR2_CKMODE_1655360
+ADC_CFGR2_JITOFFDIV2655360
+ADC_CFGR2_JITOFFDIV4655360
+ADC_CHSELR_CHSEL0655360
+ADC_CHSELR_CHSEL1655360
+ADC_CHSELR_CHSEL10655360
+ADC_CHSELR_CHSEL11655360
+ADC_CHSELR_CHSEL12655360
+ADC_CHSELR_CHSEL13655360
+ADC_CHSELR_CHSEL14655360
+ADC_CHSELR_CHSEL15655360
+ADC_CHSELR_CHSEL16655360
+ADC_CHSELR_CHSEL17655360
+ADC_CHSELR_CHSEL18655360
+ADC_CHSELR_CHSEL2655360
+ADC_CHSELR_CHSEL3655360
+ADC_CHSELR_CHSEL4655360
+ADC_CHSELR_CHSEL5655360
+ADC_CHSELR_CHSEL6655360
+ADC_CHSELR_CHSEL7655360
+ADC_CHSELR_CHSEL8655360
+ADC_CHSELR_CHSEL9655360
+ADC_CR_ADCAL655360
+ADC_CR_ADDIS655360
+ADC_CR_ADEN655360
+ADC_CR_ADSTART655360
+ADC_CR_ADSTP655360
+ADC_DR_DATA655360
+ADC_HTR_HT655360
+ADC_IER_ADRDYIE655360
+ADC_IER_AWDIE655360
+ADC_IER_EOCIE655360
+ADC_IER_EOSEQIE655360
+ADC_IER_EOSIE655360
+ADC_IER_EOSMPIE655360
+ADC_IER_OVRIE655360
+ADC_ISR_ADRDY655360
+ADC_ISR_AWD655360
+ADC_ISR_EOC655360
+ADC_ISR_EOS655360
+ADC_ISR_EOSEQ655360
+ADC_ISR_EOSMP655360
+ADC_ISR_OVR655360
+ADC_LTR_LT655360
+ADC_SMPR1_SMPR655360
+ADC_SMPR1_SMPR_0655360
+ADC_SMPR1_SMPR_1655360
+ADC_SMPR1_SMPR_2655360
+ADC_SMPR_SMP655360
+ADC_SMPR_SMP_0655360
+ADC_SMPR_SMP_1655360
+ADC_SMPR_SMP_2655360
+ADC_TR_HT655360
+ADC_TR_LT655360
+AHB2PERIPH_BASE655360
+AHBPERIPH_BASE655360
+ALL_OK4anon_enum_00
+APBPERIPH_BASE655360
+CAN655360
+CAN_BASE655360
+CAN_BTR_BRP655360
+CAN_BTR_LBKM655360
+CAN_BTR_SILM655360
+CAN_BTR_SJW655360
+CAN_BTR_SJW_0655360
+CAN_BTR_SJW_1655360
+CAN_BTR_TS1655360
+CAN_BTR_TS1_0655360
+CAN_BTR_TS1_1655360
+CAN_BTR_TS1_2655360
+CAN_BTR_TS1_3655360
+CAN_BTR_TS2655360
+CAN_BTR_TS2_0655360
+CAN_BTR_TS2_1655360
+CAN_BTR_TS2_2655360
+CAN_ESR_BOFF655360
+CAN_ESR_EPVF655360
+CAN_ESR_EWGF655360
+CAN_ESR_LEC655360
+CAN_ESR_LEC_0655360
+CAN_ESR_LEC_1655360
+CAN_ESR_LEC_2655360
+CAN_ESR_REC655360
+CAN_ESR_TEC655360
+CAN_F0R1_FB0655360
+CAN_F0R1_FB1655360
+CAN_F0R1_FB10655360
+CAN_F0R1_FB11655360
+CAN_F0R1_FB12655360
+CAN_F0R1_FB13655360
+CAN_F0R1_FB14655360
+CAN_F0R1_FB15655360
+CAN_F0R1_FB16655360
+CAN_F0R1_FB17655360
+CAN_F0R1_FB18655360
+CAN_F0R1_FB19655360
+CAN_F0R1_FB2655360
+CAN_F0R1_FB20655360
+CAN_F0R1_FB21655360
+CAN_F0R1_FB22655360
+CAN_F0R1_FB23655360
+CAN_F0R1_FB24655360
+CAN_F0R1_FB25655360
+CAN_F0R1_FB26655360
+CAN_F0R1_FB27655360
+CAN_F0R1_FB28655360
+CAN_F0R1_FB29655360
+CAN_F0R1_FB3655360
+CAN_F0R1_FB30655360
+CAN_F0R1_FB31655360
+CAN_F0R1_FB4655360
+CAN_F0R1_FB5655360
+CAN_F0R1_FB6655360
+CAN_F0R1_FB7655360
+CAN_F0R1_FB8655360
+CAN_F0R1_FB9655360
+CAN_F0R2_FB0655360
+CAN_F0R2_FB1655360
+CAN_F0R2_FB10655360
+CAN_F0R2_FB11655360
+CAN_F0R2_FB12655360
+CAN_F0R2_FB13655360
+CAN_F0R2_FB14655360
+CAN_F0R2_FB15655360
+CAN_F0R2_FB16655360
+CAN_F0R2_FB17655360
+CAN_F0R2_FB18655360
+CAN_F0R2_FB19655360
+CAN_F0R2_FB2655360
+CAN_F0R2_FB20655360
+CAN_F0R2_FB21655360
+CAN_F0R2_FB22655360
+CAN_F0R2_FB23655360
+CAN_F0R2_FB24655360
+CAN_F0R2_FB25655360
+CAN_F0R2_FB26655360
+CAN_F0R2_FB27655360
+CAN_F0R2_FB28655360
+CAN_F0R2_FB29655360
+CAN_F0R2_FB3655360
+CAN_F0R2_FB30655360
+CAN_F0R2_FB31655360
+CAN_F0R2_FB4655360
+CAN_F0R2_FB5655360
+CAN_F0R2_FB6655360
+CAN_F0R2_FB7655360
+CAN_F0R2_FB8655360
+CAN_F0R2_FB9655360
+CAN_F10R1_FB0655360
+CAN_F10R1_FB1655360
+CAN_F10R1_FB10655360
+CAN_F10R1_FB11655360
+CAN_F10R1_FB12655360
+CAN_F10R1_FB13655360
+CAN_F10R1_FB14655360
+CAN_F10R1_FB15655360
+CAN_F10R1_FB16655360
+CAN_F10R1_FB17655360
+CAN_F10R1_FB18655360
+CAN_F10R1_FB19655360
+CAN_F10R1_FB2655360
+CAN_F10R1_FB20655360
+CAN_F10R1_FB21655360
+CAN_F10R1_FB22655360
+CAN_F10R1_FB23655360
+CAN_F10R1_FB24655360
+CAN_F10R1_FB25655360
+CAN_F10R1_FB26655360
+CAN_F10R1_FB27655360
+CAN_F10R1_FB28655360
+CAN_F10R1_FB29655360
+CAN_F10R1_FB3655360
+CAN_F10R1_FB30655360
+CAN_F10R1_FB31655360
+CAN_F10R1_FB4655360
+CAN_F10R1_FB5655360
+CAN_F10R1_FB6655360
+CAN_F10R1_FB7655360
+CAN_F10R1_FB8655360
+CAN_F10R1_FB9655360
+CAN_F10R2_FB0655360
+CAN_F10R2_FB1655360
+CAN_F10R2_FB10655360
+CAN_F10R2_FB11655360
+CAN_F10R2_FB12655360
+CAN_F10R2_FB13655360
+CAN_F10R2_FB14655360
+CAN_F10R2_FB15655360
+CAN_F10R2_FB16655360
+CAN_F10R2_FB17655360
+CAN_F10R2_FB18655360
+CAN_F10R2_FB19655360
+CAN_F10R2_FB2655360
+CAN_F10R2_FB20655360
+CAN_F10R2_FB21655360
+CAN_F10R2_FB22655360
+CAN_F10R2_FB23655360
+CAN_F10R2_FB24655360
+CAN_F10R2_FB25655360
+CAN_F10R2_FB26655360
+CAN_F10R2_FB27655360
+CAN_F10R2_FB28655360
+CAN_F10R2_FB29655360
+CAN_F10R2_FB3655360
+CAN_F10R2_FB30655360
+CAN_F10R2_FB31655360
+CAN_F10R2_FB4655360
+CAN_F10R2_FB5655360
+CAN_F10R2_FB6655360
+CAN_F10R2_FB7655360
+CAN_F10R2_FB8655360
+CAN_F10R2_FB9655360
+CAN_F11R1_FB0655360
+CAN_F11R1_FB1655360
+CAN_F11R1_FB10655360
+CAN_F11R1_FB11655360
+CAN_F11R1_FB12655360
+CAN_F11R1_FB13655360
+CAN_F11R1_FB14655360
+CAN_F11R1_FB15655360
+CAN_F11R1_FB16655360
+CAN_F11R1_FB17655360
+CAN_F11R1_FB18655360
+CAN_F11R1_FB19655360
+CAN_F11R1_FB2655360
+CAN_F11R1_FB20655360
+CAN_F11R1_FB21655360
+CAN_F11R1_FB22655360
+CAN_F11R1_FB23655360
+CAN_F11R1_FB24655360
+CAN_F11R1_FB25655360
+CAN_F11R1_FB26655360
+CAN_F11R1_FB27655360
+CAN_F11R1_FB28655360
+CAN_F11R1_FB29655360
+CAN_F11R1_FB3655360
+CAN_F11R1_FB30655360
+CAN_F11R1_FB31655360
+CAN_F11R1_FB4655360
+CAN_F11R1_FB5655360
+CAN_F11R1_FB6655360
+CAN_F11R1_FB7655360
+CAN_F11R1_FB8655360
+CAN_F11R1_FB9655360
+CAN_F11R2_FB0655360
+CAN_F11R2_FB1655360
+CAN_F11R2_FB10655360
+CAN_F11R2_FB11655360
+CAN_F11R2_FB12655360
+CAN_F11R2_FB13655360
+CAN_F11R2_FB14655360
+CAN_F11R2_FB15655360
+CAN_F11R2_FB16655360
+CAN_F11R2_FB17655360
+CAN_F11R2_FB18655360
+CAN_F11R2_FB19655360
+CAN_F11R2_FB2655360
+CAN_F11R2_FB20655360
+CAN_F11R2_FB21655360
+CAN_F11R2_FB22655360
+CAN_F11R2_FB23655360
+CAN_F11R2_FB24655360
+CAN_F11R2_FB25655360
+CAN_F11R2_FB26655360
+CAN_F11R2_FB27655360
+CAN_F11R2_FB28655360
+CAN_F11R2_FB29655360
+CAN_F11R2_FB3655360
+CAN_F11R2_FB30655360
+CAN_F11R2_FB31655360
+CAN_F11R2_FB4655360
+CAN_F11R2_FB5655360
+CAN_F11R2_FB6655360
+CAN_F11R2_FB7655360
+CAN_F11R2_FB8655360
+CAN_F11R2_FB9655360
+CAN_F12R1_FB0655360
+CAN_F12R1_FB1655360
+CAN_F12R1_FB10655360
+CAN_F12R1_FB11655360
+CAN_F12R1_FB12655360
+CAN_F12R1_FB13655360
+CAN_F12R1_FB14655360
+CAN_F12R1_FB15655360
+CAN_F12R1_FB16655360
+CAN_F12R1_FB17655360
+CAN_F12R1_FB18655360
+CAN_F12R1_FB19655360
+CAN_F12R1_FB2655360
+CAN_F12R1_FB20655360
+CAN_F12R1_FB21655360
+CAN_F12R1_FB22655360
+CAN_F12R1_FB23655360
+CAN_F12R1_FB24655360
+CAN_F12R1_FB25655360
+CAN_F12R1_FB26655360
+CAN_F12R1_FB27655360
+CAN_F12R1_FB28655360
+CAN_F12R1_FB29655360
+CAN_F12R1_FB3655360
+CAN_F12R1_FB30655360
+CAN_F12R1_FB31655360
+CAN_F12R1_FB4655360
+CAN_F12R1_FB5655360
+CAN_F12R1_FB6655360
+CAN_F12R1_FB7655360
+CAN_F12R1_FB8655360
+CAN_F12R1_FB9655360
+CAN_F12R2_FB0655360
+CAN_F12R2_FB1655360
+CAN_F12R2_FB10655360
+CAN_F12R2_FB11655360
+CAN_F12R2_FB12655360
+CAN_F12R2_FB13655360
+CAN_F12R2_FB14655360
+CAN_F12R2_FB15655360
+CAN_F12R2_FB16655360
+CAN_F12R2_FB17655360
+CAN_F12R2_FB18655360
+CAN_F12R2_FB19655360
+CAN_F12R2_FB2655360
+CAN_F12R2_FB20655360
+CAN_F12R2_FB21655360
+CAN_F12R2_FB22655360
+CAN_F12R2_FB23655360
+CAN_F12R2_FB24655360
+CAN_F12R2_FB25655360
+CAN_F12R2_FB26655360
+CAN_F12R2_FB27655360
+CAN_F12R2_FB28655360
+CAN_F12R2_FB29655360
+CAN_F12R2_FB3655360
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+CAN_F8R2_FB14655360
+CAN_F8R2_FB15655360
+CAN_F8R2_FB16655360
+CAN_F8R2_FB17655360
+CAN_F8R2_FB18655360
+CAN_F8R2_FB19655360
+CAN_F8R2_FB2655360
+CAN_F8R2_FB20655360
+CAN_F8R2_FB21655360
+CAN_F8R2_FB22655360
+CAN_F8R2_FB23655360
+CAN_F8R2_FB24655360
+CAN_F8R2_FB25655360
+CAN_F8R2_FB26655360
+CAN_F8R2_FB27655360
+CAN_F8R2_FB28655360
+CAN_F8R2_FB29655360
+CAN_F8R2_FB3655360
+CAN_F8R2_FB30655360
+CAN_F8R2_FB31655360
+CAN_F8R2_FB4655360
+CAN_F8R2_FB5655360
+CAN_F8R2_FB6655360
+CAN_F8R2_FB7655360
+CAN_F8R2_FB8655360
+CAN_F8R2_FB9655360
+CAN_F9R1_FB0655360
+CAN_F9R1_FB1655360
+CAN_F9R1_FB10655360
+CAN_F9R1_FB11655360
+CAN_F9R1_FB12655360
+CAN_F9R1_FB13655360
+CAN_F9R1_FB14655360
+CAN_F9R1_FB15655360
+CAN_F9R1_FB16655360
+CAN_F9R1_FB17655360
+CAN_F9R1_FB18655360
+CAN_F9R1_FB19655360
+CAN_F9R1_FB2655360
+CAN_F9R1_FB20655360
+CAN_F9R1_FB21655360
+CAN_F9R1_FB22655360
+CAN_F9R1_FB23655360
+CAN_F9R1_FB24655360
+CAN_F9R1_FB25655360
+CAN_F9R1_FB26655360
+CAN_F9R1_FB27655360
+CAN_F9R1_FB28655360
+CAN_F9R1_FB29655360
+CAN_F9R1_FB3655360
+CAN_F9R1_FB30655360
+CAN_F9R1_FB31655360
+CAN_F9R1_FB4655360
+CAN_F9R1_FB5655360
+CAN_F9R1_FB6655360
+CAN_F9R1_FB7655360
+CAN_F9R1_FB8655360
+CAN_F9R1_FB9655360
+CAN_F9R2_FB0655360
+CAN_F9R2_FB1655360
+CAN_F9R2_FB10655360
+CAN_F9R2_FB11655360
+CAN_F9R2_FB12655360
+CAN_F9R2_FB13655360
+CAN_F9R2_FB14655360
+CAN_F9R2_FB15655360
+CAN_F9R2_FB16655360
+CAN_F9R2_FB17655360
+CAN_F9R2_FB18655360
+CAN_F9R2_FB19655360
+CAN_F9R2_FB2655360
+CAN_F9R2_FB20655360
+CAN_F9R2_FB21655360
+CAN_F9R2_FB22655360
+CAN_F9R2_FB23655360
+CAN_F9R2_FB24655360
+CAN_F9R2_FB25655360
+CAN_F9R2_FB26655360
+CAN_F9R2_FB27655360
+CAN_F9R2_FB28655360
+CAN_F9R2_FB29655360
+CAN_F9R2_FB3655360
+CAN_F9R2_FB30655360
+CAN_F9R2_FB31655360
+CAN_F9R2_FB4655360
+CAN_F9R2_FB5655360
+CAN_F9R2_FB6655360
+CAN_F9R2_FB7655360
+CAN_F9R2_FB8655360
+CAN_F9R2_FB9655360
+CAN_FA1R_FACT655360
+CAN_FA1R_FACT0655360
+CAN_FA1R_FACT1655360
+CAN_FA1R_FACT10655360
+CAN_FA1R_FACT11655360
+CAN_FA1R_FACT12655360
+CAN_FA1R_FACT13655360
+CAN_FA1R_FACT2655360
+CAN_FA1R_FACT3655360
+CAN_FA1R_FACT4655360
+CAN_FA1R_FACT5655360
+CAN_FA1R_FACT6655360
+CAN_FA1R_FACT7655360
+CAN_FA1R_FACT8655360
+CAN_FA1R_FACT9655360
+CAN_FFA1R_FFA655360
+CAN_FFA1R_FFA0655360
+CAN_FFA1R_FFA1655360
+CAN_FFA1R_FFA10655360
+CAN_FFA1R_FFA11655360
+CAN_FFA1R_FFA12655360
+CAN_FFA1R_FFA13655360
+CAN_FFA1R_FFA2655360
+CAN_FFA1R_FFA3655360
+CAN_FFA1R_FFA4655360
+CAN_FFA1R_FFA5655360
+CAN_FFA1R_FFA6655360
+CAN_FFA1R_FFA7655360
+CAN_FFA1R_FFA8655360
+CAN_FFA1R_FFA9655360
+CAN_FM1R_FBM655360
+CAN_FM1R_FBM0655360
+CAN_FM1R_FBM1655360
+CAN_FM1R_FBM10655360
+CAN_FM1R_FBM11655360
+CAN_FM1R_FBM12655360
+CAN_FM1R_FBM13655360
+CAN_FM1R_FBM2655360
+CAN_FM1R_FBM3655360
+CAN_FM1R_FBM4655360
+CAN_FM1R_FBM5655360
+CAN_FM1R_FBM6655360
+CAN_FM1R_FBM7655360
+CAN_FM1R_FBM8655360
+CAN_FM1R_FBM9655360
+CAN_FMR_FINIT655360
+CAN_FS1R_FSC655360
+CAN_FS1R_FSC0655360
+CAN_FS1R_FSC1655360
+CAN_FS1R_FSC10655360
+CAN_FS1R_FSC11655360
+CAN_FS1R_FSC12655360
+CAN_FS1R_FSC13655360
+CAN_FS1R_FSC2655360
+CAN_FS1R_FSC3655360
+CAN_FS1R_FSC4655360
+CAN_FS1R_FSC5655360
+CAN_FS1R_FSC6655360
+CAN_FS1R_FSC7655360
+CAN_FS1R_FSC8655360
+CAN_FS1R_FSC9655360
+CAN_IER_BOFIE655360
+CAN_IER_EPVIE655360
+CAN_IER_ERRIE655360
+CAN_IER_EWGIE655360
+CAN_IER_FFIE0655360
+CAN_IER_FFIE1655360
+CAN_IER_FMPIE0655360
+CAN_IER_FMPIE1655360
+CAN_IER_FOVIE0655360
+CAN_IER_FOVIE1655360
+CAN_IER_LECIE655360
+CAN_IER_SLKIE655360
+CAN_IER_TMEIE655360
+CAN_IER_WKUIE655360
+CAN_MCR_ABOM655360
+CAN_MCR_AWUM655360
+CAN_MCR_INRQ655360
+CAN_MCR_NART655360
+CAN_MCR_RESET655360
+CAN_MCR_RFLM655360
+CAN_MCR_SLEEP655360
+CAN_MCR_TTCM655360
+CAN_MCR_TXFP655360
+CAN_MSR_ERRI655360
+CAN_MSR_INAK655360
+CAN_MSR_RX655360
+CAN_MSR_RXM655360
+CAN_MSR_SAMP655360
+CAN_MSR_SLAK655360
+CAN_MSR_SLAKI655360
+CAN_MSR_TXM655360
+CAN_MSR_WKUI655360
+CAN_RDH0R_DATA4655360
+CAN_RDH0R_DATA5655360
+CAN_RDH0R_DATA6655360
+CAN_RDH0R_DATA7655360
+CAN_RDH1R_DATA4655360
+CAN_RDH1R_DATA5655360
+CAN_RDH1R_DATA6655360
+CAN_RDH1R_DATA7655360
+CAN_RDL0R_DATA0655360
+CAN_RDL0R_DATA1655360
+CAN_RDL0R_DATA2655360
+CAN_RDL0R_DATA3655360
+CAN_RDL1R_DATA0655360
+CAN_RDL1R_DATA1655360
+CAN_RDL1R_DATA2655360
+CAN_RDL1R_DATA3655360
+CAN_RDT0R_DLC655360
+CAN_RDT0R_FMI655360
+CAN_RDT0R_TIME655360
+CAN_RDT1R_DLC655360
+CAN_RDT1R_FMI655360
+CAN_RDT1R_TIME655360
+CAN_RF0R_FMP0655360
+CAN_RF0R_FOVR0655360
+CAN_RF0R_FULL0655360
+CAN_RF0R_RFOM0655360
+CAN_RF1R_FMP1655360
+CAN_RF1R_FOVR1655360
+CAN_RF1R_FULL1655360
+CAN_RF1R_RFOM1655360
+CAN_RI0R_EXID655360
+CAN_RI0R_IDE655360
+CAN_RI0R_RTR655360
+CAN_RI0R_STID655360
+CAN_RI1R_EXID655360
+CAN_RI1R_IDE655360
+CAN_RI1R_RTR655360
+CAN_RI1R_STID655360
+CAN_TDH0R_DATA4655360
+CAN_TDH0R_DATA5655360
+CAN_TDH0R_DATA6655360
+CAN_TDH0R_DATA7655360
+CAN_TDH1R_DATA4655360
+CAN_TDH1R_DATA5655360
+CAN_TDH1R_DATA6655360
+CAN_TDH1R_DATA7655360
+CAN_TDH2R_DATA4655360
+CAN_TDH2R_DATA5655360
+CAN_TDH2R_DATA6655360
+CAN_TDH2R_DATA7655360
+CAN_TDL0R_DATA0655360
+CAN_TDL0R_DATA1655360
+CAN_TDL0R_DATA2655360
+CAN_TDL0R_DATA3655360
+CAN_TDL1R_DATA0655360
+CAN_TDL1R_DATA1655360
+CAN_TDL1R_DATA2655360
+CAN_TDL1R_DATA3655360
+CAN_TDL2R_DATA0655360
+CAN_TDL2R_DATA1655360
+CAN_TDL2R_DATA2655360
+CAN_TDL2R_DATA3655360
+CAN_TDT0R_DLC655360
+CAN_TDT0R_TGT655360
+CAN_TDT0R_TIME655360
+CAN_TDT1R_DLC655360
+CAN_TDT1R_TGT655360
+CAN_TDT1R_TIME655360
+CAN_TDT2R_DLC655360
+CAN_TDT2R_TGT655360
+CAN_TDT2R_TIME655360
+CAN_TI0R_EXID655360
+CAN_TI0R_IDE655360
+CAN_TI0R_RTR655360
+CAN_TI0R_STID655360
+CAN_TI0R_TXRQ655360
+CAN_TI1R_EXID655360
+CAN_TI1R_IDE655360
+CAN_TI1R_RTR655360
+CAN_TI1R_STID655360
+CAN_TI1R_TXRQ655360
+CAN_TI2R_EXID655360
+CAN_TI2R_IDE655360
+CAN_TI2R_RTR655360
+CAN_TI2R_STID655360
+CAN_TI2R_TXRQ655360
+CAN_TSR_ABRQ0655360
+CAN_TSR_ABRQ1655360
+CAN_TSR_ABRQ2655360
+CAN_TSR_ALST0655360
+CAN_TSR_ALST1655360
+CAN_TSR_ALST2655360
+CAN_TSR_CODE655360
+CAN_TSR_LOW655360
+CAN_TSR_LOW0655360
+CAN_TSR_LOW1655360
+CAN_TSR_LOW2655360
+CAN_TSR_RQCP0655360
+CAN_TSR_RQCP1655360
+CAN_TSR_RQCP2655360
+CAN_TSR_TERR0655360
+CAN_TSR_TERR1655360
+CAN_TSR_TERR2655360
+CAN_TSR_TME655360
+CAN_TSR_TME0655360
+CAN_TSR_TME1655360
+CAN_TSR_TME2655360
+CAN_TSR_TXOK0655360
+CAN_TSR_TXOK1655360
+CAN_TSR_TXOK2655360
+CAN_addr163840uint8_t
+CAN_setup16()0void
+CAN_setup1024()0void
+CEC655360
+CEC_BASE655360
+CEC_CFGR_BRDNOGEN655360
+CEC_CFGR_BREGEN655360
+CEC_CFGR_BRESTP655360
+CEC_CFGR_LBPEGEN655360
+CEC_CFGR_LSTN655360
+CEC_CFGR_OAR655360
+CEC_CFGR_RXTOL655360
+CEC_CFGR_SFT655360
+CEC_CFGR_SFTOPT655360
+CEC_CR_CECEN655360
+CEC_CR_TXEOM655360
+CEC_CR_TXSOM655360
+CEC_IER_ARBLSTIE655360
+CEC_IER_BREIE655360
+CEC_IER_LBPEIE655360
+CEC_IER_RXACKEIE655360
+CEC_IER_RXBRIE655360
+CEC_IER_RXENDIE655360
+CEC_IER_RXOVRIE655360
+CEC_IER_SBPEIE655360
+CEC_IER_TXACKEIE655360
+CEC_IER_TXBRIE655360
+CEC_IER_TXENDIE655360
+CEC_IER_TXERRIE655360
+CEC_IER_TXUDRIE655360
+CEC_ISR_ARBLST655360
+CEC_ISR_BRE655360
+CEC_ISR_LBPE655360
+CEC_ISR_RXACKE655360
+CEC_ISR_RXBR655360
+CEC_ISR_RXEND655360
+CEC_ISR_RXOVR655360
+CEC_ISR_SBPE655360
+CEC_ISR_TXACKE655360
+CEC_ISR_TXBR655360
+CEC_ISR_TXEND655360
+CEC_ISR_TXERR655360
+CEC_ISR_TXUDR655360
+CEC_TXDR_RXD655360
+CEC_TXDR_TXD655360
+CLEAR_BIT131072(REG,BIT)0
+CLEAR_REG131072(REG)0
+CONCAT131072(a,b)0
+CRC655360
+CRC_BASE655360
+CRC_CR_RESET655360
+CRC_CR_REV_IN655360
+CRC_CR_REV_IN_0655360
+CRC_CR_REV_IN_1655360
+CRC_CR_REV_OUT655360
+CRC_DR_DR655360
+CRC_IDR_IDR655360
+CRC_INIT_INIT655360
+CRS655360
+CRS_BASE655360
+CRS_CFGR_FELIM655360
+CRS_CFGR_RELOAD655360
+CRS_CFGR_SYNCDIV655360
+CRS_CFGR_SYNCDIV_0655360
+CRS_CFGR_SYNCDIV_1655360
+CRS_CFGR_SYNCDIV_2655360
+CRS_CFGR_SYNCPOL655360
+CRS_CFGR_SYNCSRC655360
+CRS_CFGR_SYNCSRC_0655360
+CRS_CFGR_SYNCSRC_1655360
+CRS_CR_AUTOTRIMEN655360
+CRS_CR_CEN655360
+CRS_CR_ERRIE655360
+CRS_CR_ESYNCIE655360
+CRS_CR_SWSYNC655360
+CRS_CR_SYNCOKIE655360
+CRS_CR_SYNCWARNIE655360
+CRS_CR_TRIM655360
+CRS_ICR_ERRC655360
+CRS_ICR_ESYNCC655360
+CRS_ICR_SYNCOKC655360
+CRS_ICR_SYNCWARNC655360
+CRS_ISR_ERRF655360
+CRS_ISR_ESYNCF655360
+CRS_ISR_FECAP655360
+CRS_ISR_FEDIR655360
+CRS_ISR_SYNCERR655360
+CRS_ISR_SYNCMISS655360
+CRS_ISR_SYNCOKF655360
+CRS_ISR_SYNCWARNF655360
+CRS_ISR_TRIMOVF655360
+DBGMCU655360
+DBGMCU_APB1_FZ_DBG_CAN_STOP655360
+DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT655360
+DBGMCU_APB1_FZ_DBG_IWDG_STOP655360
+DBGMCU_APB1_FZ_DBG_RTC_STOP655360
+DBGMCU_APB1_FZ_DBG_TIM14_STOP655360
+DBGMCU_APB1_FZ_DBG_TIM2_STOP655360
+DBGMCU_APB1_FZ_DBG_TIM3_STOP655360
+DBGMCU_APB1_FZ_DBG_WWDG_STOP655360
+DBGMCU_APB2_FZ_DBG_TIM16_STOP655360
+DBGMCU_APB2_FZ_DBG_TIM17_STOP655360
+DBGMCU_APB2_FZ_DBG_TIM1_STOP655360
+DBGMCU_BASE655360
+DBGMCU_CR_DBG_STANDBY655360
+DBGMCU_CR_DBG_STOP655360
+DBGMCU_IDCODE_DEV_ID655360
+DBGMCU_IDCODE_REV_ID655360
+DBGMCU_IDCODE_REV_ID_0655360
+DBGMCU_IDCODE_REV_ID_1655360
+DBGMCU_IDCODE_REV_ID_10655360
+DBGMCU_IDCODE_REV_ID_11655360
+DBGMCU_IDCODE_REV_ID_12655360
+DBGMCU_IDCODE_REV_ID_13655360
+DBGMCU_IDCODE_REV_ID_14655360
+DBGMCU_IDCODE_REV_ID_15655360
+DBGMCU_IDCODE_REV_ID_2655360
+DBGMCU_IDCODE_REV_ID_3655360
+DBGMCU_IDCODE_REV_ID_4655360
+DBGMCU_IDCODE_REV_ID_5655360
+DBGMCU_IDCODE_REV_ID_6655360
+DBGMCU_IDCODE_REV_ID_7655360
+DBGMCU_IDCODE_REV_ID_8655360
+DBGMCU_IDCODE_REV_ID_9655360
+DMA1655360
+DMA1_BASE655360
+DMA1_Channel1655360
+DMA1_Channel1_BASE655360
+DMA1_Channel2655360
+DMA1_Channel2_BASE655360
+DMA1_Channel3655360
+DMA1_Channel3_BASE655360
+DMA1_Channel4655360
+DMA1_Channel4_5_6_7_IRQHandler655360
+DMA1_Channel4_5_6_7_IRQn655360
+DMA1_Channel4_BASE655360
+DMA1_Channel5655360
+DMA1_Channel5_BASE655360
+DMA1_Channel6655360
+DMA1_Channel6_BASE655360
+DMA1_Channel7655360
+DMA1_Channel7_BASE655360
+DMA_CCR_CIRC655360
+DMA_CCR_DIR655360
+DMA_CCR_EN655360
+DMA_CCR_HTIE655360
+DMA_CCR_MEM2MEM655360
+DMA_CCR_MINC655360
+DMA_CCR_MSIZE655360
+DMA_CCR_MSIZE_0655360
+DMA_CCR_MSIZE_1655360
+DMA_CCR_PINC655360
+DMA_CCR_PL655360
+DMA_CCR_PL_0655360
+DMA_CCR_PL_1655360
+DMA_CCR_PSIZE655360
+DMA_CCR_PSIZE_0655360
+DMA_CCR_PSIZE_1655360
+DMA_CCR_TCIE655360
+DMA_CCR_TEIE655360
+DMA_CMAR_MA655360
+DMA_CNDTR_NDT655360
+DMA_CPAR_PA655360
+DMA_IFCR_CGIF1655360
+DMA_IFCR_CGIF2655360
+DMA_IFCR_CGIF3655360
+DMA_IFCR_CGIF4655360
+DMA_IFCR_CGIF5655360
+DMA_IFCR_CGIF6655360
+DMA_IFCR_CGIF7655360
+DMA_IFCR_CHTIF1655360
+DMA_IFCR_CHTIF2655360
+DMA_IFCR_CHTIF3655360
+DMA_IFCR_CHTIF4655360
+DMA_IFCR_CHTIF5655360
+DMA_IFCR_CHTIF6655360
+DMA_IFCR_CHTIF7655360
+DMA_IFCR_CTCIF1655360
+DMA_IFCR_CTCIF2655360
+DMA_IFCR_CTCIF3655360
+DMA_IFCR_CTCIF4655360
+DMA_IFCR_CTCIF5655360
+DMA_IFCR_CTCIF6655360
+DMA_IFCR_CTCIF7655360
+DMA_IFCR_CTEIF1655360
+DMA_IFCR_CTEIF2655360
+DMA_IFCR_CTEIF3655360
+DMA_IFCR_CTEIF4655360
+DMA_IFCR_CTEIF5655360
+DMA_IFCR_CTEIF6655360
+DMA_IFCR_CTEIF7655360
+DMA_ISR_GIF1655360
+DMA_ISR_GIF2655360
+DMA_ISR_GIF3655360
+DMA_ISR_GIF4655360
+DMA_ISR_GIF5655360
+DMA_ISR_GIF6655360
+DMA_ISR_GIF7655360
+DMA_ISR_HTIF1655360
+DMA_ISR_HTIF2655360
+DMA_ISR_HTIF3655360
+DMA_ISR_HTIF4655360
+DMA_ISR_HTIF5655360
+DMA_ISR_HTIF6655360
+DMA_ISR_HTIF7655360
+DMA_ISR_TCIF1655360
+DMA_ISR_TCIF2655360
+DMA_ISR_TCIF3655360
+DMA_ISR_TCIF4655360
+DMA_ISR_TCIF5655360
+DMA_ISR_TCIF6655360
+DMA_ISR_TCIF7655360
+DMA_ISR_TEIF1655360
+DMA_ISR_TEIF2655360
+DMA_ISR_TEIF3655360
+DMA_ISR_TEIF4655360
+DMA_ISR_TEIF5655360
+DMA_ISR_TEIF6655360
+DMA_ISR_TEIF7655360
+EXTI655360
+EXTI_BASE655360
+EXTI_EMR_MR0655360
+EXTI_EMR_MR1655360
+EXTI_EMR_MR10655360
+EXTI_EMR_MR11655360
+EXTI_EMR_MR12655360
+EXTI_EMR_MR13655360
+EXTI_EMR_MR14655360
+EXTI_EMR_MR15655360
+EXTI_EMR_MR16655360
+EXTI_EMR_MR17655360
+EXTI_EMR_MR19655360
+EXTI_EMR_MR2655360
+EXTI_EMR_MR21655360
+EXTI_EMR_MR22655360
+EXTI_EMR_MR23655360
+EXTI_EMR_MR25655360
+EXTI_EMR_MR27655360
+EXTI_EMR_MR3655360
+EXTI_EMR_MR4655360
+EXTI_EMR_MR5655360
+EXTI_EMR_MR6655360
+EXTI_EMR_MR7655360
+EXTI_EMR_MR8655360
+EXTI_EMR_MR9655360
+EXTI_FTSR_TR0655360
+EXTI_FTSR_TR1655360
+EXTI_FTSR_TR10655360
+EXTI_FTSR_TR11655360
+EXTI_FTSR_TR12655360
+EXTI_FTSR_TR13655360
+EXTI_FTSR_TR14655360
+EXTI_FTSR_TR15655360
+EXTI_FTSR_TR16655360
+EXTI_FTSR_TR17655360
+EXTI_FTSR_TR19655360
+EXTI_FTSR_TR2655360
+EXTI_FTSR_TR3655360
+EXTI_FTSR_TR4655360
+EXTI_FTSR_TR5655360
+EXTI_FTSR_TR6655360
+EXTI_FTSR_TR7655360
+EXTI_FTSR_TR8655360
+EXTI_FTSR_TR9655360
+EXTI_IMR_MR0655360
+EXTI_IMR_MR1655360
+EXTI_IMR_MR10655360
+EXTI_IMR_MR11655360
+EXTI_IMR_MR12655360
+EXTI_IMR_MR13655360
+EXTI_IMR_MR14655360
+EXTI_IMR_MR15655360
+EXTI_IMR_MR16655360
+EXTI_IMR_MR17655360
+EXTI_IMR_MR19655360
+EXTI_IMR_MR2655360
+EXTI_IMR_MR21655360
+EXTI_IMR_MR22655360
+EXTI_IMR_MR23655360
+EXTI_IMR_MR25655360
+EXTI_IMR_MR27655360
+EXTI_IMR_MR3655360
+EXTI_IMR_MR4655360
+EXTI_IMR_MR5655360
+EXTI_IMR_MR6655360
+EXTI_IMR_MR7655360
+EXTI_IMR_MR8655360
+EXTI_IMR_MR9655360
+EXTI_PR_PR0655360
+EXTI_PR_PR1655360
+EXTI_PR_PR10655360
+EXTI_PR_PR11655360
+EXTI_PR_PR12655360
+EXTI_PR_PR13655360
+EXTI_PR_PR14655360
+EXTI_PR_PR15655360
+EXTI_PR_PR16655360
+EXTI_PR_PR17655360
+EXTI_PR_PR19655360
+EXTI_PR_PR2655360
+EXTI_PR_PR3655360
+EXTI_PR_PR4655360
+EXTI_PR_PR5655360
+EXTI_PR_PR6655360
+EXTI_PR_PR7655360
+EXTI_PR_PR8655360
+EXTI_PR_PR9655360
+EXTI_RTSR_TR0655360
+EXTI_RTSR_TR1655360
+EXTI_RTSR_TR10655360
+EXTI_RTSR_TR11655360
+EXTI_RTSR_TR12655360
+EXTI_RTSR_TR13655360
+EXTI_RTSR_TR14655360
+EXTI_RTSR_TR15655360
+EXTI_RTSR_TR16655360
+EXTI_RTSR_TR17655360
+EXTI_RTSR_TR19655360
+EXTI_RTSR_TR2655360
+EXTI_RTSR_TR3655360
+EXTI_RTSR_TR4655360
+EXTI_RTSR_TR5655360
+EXTI_RTSR_TR6655360
+EXTI_RTSR_TR7655360
+EXTI_RTSR_TR8655360
+EXTI_RTSR_TR9655360
+EXTI_SWIER_SWIER0655360
+EXTI_SWIER_SWIER1655360
+EXTI_SWIER_SWIER10655360
+EXTI_SWIER_SWIER11655360
+EXTI_SWIER_SWIER12655360
+EXTI_SWIER_SWIER13655360
+EXTI_SWIER_SWIER14655360
+EXTI_SWIER_SWIER15655360
+EXTI_SWIER_SWIER16655360
+EXTI_SWIER_SWIER17655360
+EXTI_SWIER_SWIER19655360
+EXTI_SWIER_SWIER2655360
+EXTI_SWIER_SWIER3655360
+EXTI_SWIER_SWIER4655360
+EXTI_SWIER_SWIER5655360
+EXTI_SWIER_SWIER6655360
+EXTI_SWIER_SWIER7655360
+EXTI_SWIER_SWIER8655360
+EXTI_SWIER_SWIER9655360
+FLASH655360
+FLASH_ACR_LATENCY655360
+FLASH_ACR_PRFTBE655360
+FLASH_ACR_PRFTBS655360
+FLASH_AR_FAR655360
+FLASH_BASE655360
+FLASH_CR_EOPIE655360
+FLASH_CR_ERRIE655360
+FLASH_CR_LOCK655360
+FLASH_CR_MER655360
+FLASH_CR_OBL_LAUNCH655360
+FLASH_CR_OPTER655360
+FLASH_CR_OPTPG655360
+FLASH_CR_OPTWRE655360
+FLASH_CR_PER655360
+FLASH_CR_PG655360
+FLASH_CR_STRT655360
+FLASH_FKEY1655360
+FLASH_FKEY2655360
+FLASH_KEYR_FKEYR655360
+FLASH_OBR_BOOT1655360
+FLASH_OBR_IWDG_SW655360
+FLASH_OBR_OPTERR655360
+FLASH_OBR_RDPRT1655360
+FLASH_OBR_RDPRT2655360
+FLASH_OBR_USER655360
+FLASH_OBR_VDDA_ANALOG655360
+FLASH_OBR_VDDA_MONITOR655360
+FLASH_OBR_nBOOT1655360
+FLASH_OBR_nRST_STDBY655360
+FLASH_OBR_nRST_STOP655360
+FLASH_OPTKEY1655360
+FLASH_OPTKEY2655360
+FLASH_OPTKEYR_OPTKEYR655360
+FLASH_R_BASE655360
+FLASH_SR_BSY655360
+FLASH_SR_EOP655360
+FLASH_SR_PGERR655360
+FLASH_SR_WRPERR655360
+FLASH_SR_WRPRTERR655360
+FLASH_WRPR_WRP655360
+FORMUSART131072(X)0
+GPIOA655360
+GPIOA_BASE655360
+GPIOB655360
+GPIOB_BASE655360
+GPIOC655360
+GPIOC_BASE655360
+GPIOF655360
+GPIOF_BASE655360
+GPIO_AFRH_AFRH0655360
+GPIO_AFRH_AFRH1655360
+GPIO_AFRH_AFRH2655360
+GPIO_AFRH_AFRH3655360
+GPIO_AFRH_AFRH4655360
+GPIO_AFRH_AFRH5655360
+GPIO_AFRH_AFRH6655360
+GPIO_AFRH_AFRH7655360
+GPIO_AFRL_AFRL0655360
+GPIO_AFRL_AFRL1655360
+GPIO_AFRL_AFRL2655360
+GPIO_AFRL_AFRL3655360
+GPIO_AFRL_AFRL4655360
+GPIO_AFRL_AFRL5655360
+GPIO_AFRL_AFRL6655360
+GPIO_AFRL_AFRL7655360
+GPIO_BRR_BR_0655360
+GPIO_BRR_BR_1655360
+GPIO_BRR_BR_10655360
+GPIO_BRR_BR_11655360
+GPIO_BRR_BR_12655360
+GPIO_BRR_BR_13655360
+GPIO_BRR_BR_14655360
+GPIO_BRR_BR_15655360
+GPIO_BRR_BR_2655360
+GPIO_BRR_BR_3655360
+GPIO_BRR_BR_4655360
+GPIO_BRR_BR_5655360
+GPIO_BRR_BR_6655360
+GPIO_BRR_BR_7655360
+GPIO_BRR_BR_8655360
+GPIO_BRR_BR_9655360
+GPIO_BSRR_BR_0655360
+GPIO_BSRR_BR_1655360
+GPIO_BSRR_BR_10655360
+GPIO_BSRR_BR_11655360
+GPIO_BSRR_BR_12655360
+GPIO_BSRR_BR_13655360
+GPIO_BSRR_BR_14655360
+GPIO_BSRR_BR_15655360
+GPIO_BSRR_BR_2655360
+GPIO_BSRR_BR_3655360
+GPIO_BSRR_BR_4655360
+GPIO_BSRR_BR_5655360
+GPIO_BSRR_BR_6655360
+GPIO_BSRR_BR_7655360
+GPIO_BSRR_BR_8655360
+GPIO_BSRR_BR_9655360
+GPIO_BSRR_BS_0655360
+GPIO_BSRR_BS_1655360
+GPIO_BSRR_BS_10655360
+GPIO_BSRR_BS_11655360
+GPIO_BSRR_BS_12655360
+GPIO_BSRR_BS_13655360
+GPIO_BSRR_BS_14655360
+GPIO_BSRR_BS_15655360
+GPIO_BSRR_BS_2655360
+GPIO_BSRR_BS_3655360
+GPIO_BSRR_BS_4655360
+GPIO_BSRR_BS_5655360
+GPIO_BSRR_BS_6655360
+GPIO_BSRR_BS_7655360
+GPIO_BSRR_BS_8655360
+GPIO_BSRR_BS_9655360
+GPIO_IDR_0655360
+GPIO_IDR_1655360
+GPIO_IDR_10655360
+GPIO_IDR_11655360
+GPIO_IDR_12655360
+GPIO_IDR_13655360
+GPIO_IDR_14655360
+GPIO_IDR_15655360
+GPIO_IDR_2655360
+GPIO_IDR_3655360
+GPIO_IDR_4655360
+GPIO_IDR_5655360
+GPIO_IDR_6655360
+GPIO_IDR_7655360
+GPIO_IDR_8655360
+GPIO_IDR_9655360
+GPIO_LCKR_LCK0655360
+GPIO_LCKR_LCK1655360
+GPIO_LCKR_LCK10655360
+GPIO_LCKR_LCK11655360
+GPIO_LCKR_LCK12655360
+GPIO_LCKR_LCK13655360
+GPIO_LCKR_LCK14655360
+GPIO_LCKR_LCK15655360
+GPIO_LCKR_LCK2655360
+GPIO_LCKR_LCK3655360
+GPIO_LCKR_LCK4655360
+GPIO_LCKR_LCK5655360
+GPIO_LCKR_LCK6655360
+GPIO_LCKR_LCK7655360
+GPIO_LCKR_LCK8655360
+GPIO_LCKR_LCK9655360
+GPIO_LCKR_LCKK655360
+GPIO_MODER_MODER0655360
+GPIO_MODER_MODER0_0655360
+GPIO_MODER_MODER0_1655360
+GPIO_MODER_MODER0_AF655360
+GPIO_MODER_MODER0_AI655360
+GPIO_MODER_MODER0_O655360
+GPIO_MODER_MODER1655360
+GPIO_MODER_MODER10655360
+GPIO_MODER_MODER10_0655360
+GPIO_MODER_MODER10_1655360
+GPIO_MODER_MODER10_AF655360
+GPIO_MODER_MODER10_AI655360
+GPIO_MODER_MODER10_O655360
+GPIO_MODER_MODER11655360
+GPIO_MODER_MODER11_0655360
+GPIO_MODER_MODER11_1655360
+GPIO_MODER_MODER11_AF655360
+GPIO_MODER_MODER11_AI655360
+GPIO_MODER_MODER11_O655360
+GPIO_MODER_MODER12655360
+GPIO_MODER_MODER12_0655360
+GPIO_MODER_MODER12_1655360
+GPIO_MODER_MODER12_AF655360
+GPIO_MODER_MODER12_AI655360
+GPIO_MODER_MODER12_O655360
+GPIO_MODER_MODER13655360
+GPIO_MODER_MODER13_0655360
+GPIO_MODER_MODER13_1655360
+GPIO_MODER_MODER13_AF655360
+GPIO_MODER_MODER13_AI655360
+GPIO_MODER_MODER13_O655360
+GPIO_MODER_MODER14655360
+GPIO_MODER_MODER14_0655360
+GPIO_MODER_MODER14_1655360
+GPIO_MODER_MODER14_AF655360
+GPIO_MODER_MODER14_AI655360
+GPIO_MODER_MODER14_O655360
+GPIO_MODER_MODER15655360
+GPIO_MODER_MODER15_0655360
+GPIO_MODER_MODER15_1655360
+GPIO_MODER_MODER15_AF655360
+GPIO_MODER_MODER15_AI655360
+GPIO_MODER_MODER15_O655360
+GPIO_MODER_MODER1_0655360
+GPIO_MODER_MODER1_1655360
+GPIO_MODER_MODER1_AF655360
+GPIO_MODER_MODER1_AI655360
+GPIO_MODER_MODER1_O655360
+GPIO_MODER_MODER2655360
+GPIO_MODER_MODER2_0655360
+GPIO_MODER_MODER2_1655360
+GPIO_MODER_MODER2_AF655360
+GPIO_MODER_MODER2_AI655360
+GPIO_MODER_MODER2_O655360
+GPIO_MODER_MODER3655360
+GPIO_MODER_MODER3_0655360
+GPIO_MODER_MODER3_1655360
+GPIO_MODER_MODER3_AF655360
+GPIO_MODER_MODER3_AI655360
+GPIO_MODER_MODER3_O655360
+GPIO_MODER_MODER4655360
+GPIO_MODER_MODER4_0655360
+GPIO_MODER_MODER4_1655360
+GPIO_MODER_MODER4_AF655360
+GPIO_MODER_MODER4_AI655360
+GPIO_MODER_MODER4_O655360
+GPIO_MODER_MODER5655360
+GPIO_MODER_MODER5_0655360
+GPIO_MODER_MODER5_1655360
+GPIO_MODER_MODER5_AF655360
+GPIO_MODER_MODER5_AI655360
+GPIO_MODER_MODER5_O655360
+GPIO_MODER_MODER6655360
+GPIO_MODER_MODER6_0655360
+GPIO_MODER_MODER6_1655360
+GPIO_MODER_MODER6_AF655360
+GPIO_MODER_MODER6_AI655360
+GPIO_MODER_MODER6_O655360
+GPIO_MODER_MODER7655360
+GPIO_MODER_MODER7_0655360
+GPIO_MODER_MODER7_1655360
+GPIO_MODER_MODER7_AF655360
+GPIO_MODER_MODER7_AI655360
+GPIO_MODER_MODER7_O655360
+GPIO_MODER_MODER8655360
+GPIO_MODER_MODER8_0655360
+GPIO_MODER_MODER8_1655360
+GPIO_MODER_MODER8_AF655360
+GPIO_MODER_MODER8_AI655360
+GPIO_MODER_MODER8_O655360
+GPIO_MODER_MODER9655360
+GPIO_MODER_MODER9_0655360
+GPIO_MODER_MODER9_1655360
+GPIO_MODER_MODER9_AF655360
+GPIO_MODER_MODER9_AI655360
+GPIO_MODER_MODER9_O655360
+GPIO_ODR_0655360
+GPIO_ODR_1655360
+GPIO_ODR_10655360
+GPIO_ODR_11655360
+GPIO_ODR_12655360
+GPIO_ODR_13655360
+GPIO_ODR_14655360
+GPIO_ODR_15655360
+GPIO_ODR_2655360
+GPIO_ODR_3655360
+GPIO_ODR_4655360
+GPIO_ODR_5655360
+GPIO_ODR_6655360
+GPIO_ODR_7655360
+GPIO_ODR_8655360
+GPIO_ODR_9655360
+GPIO_OSPEEDER_OSPEEDR0655360
+GPIO_OSPEEDER_OSPEEDR0_0655360
+GPIO_OSPEEDER_OSPEEDR0_1655360
+GPIO_OSPEEDER_OSPEEDR1655360
+GPIO_OSPEEDER_OSPEEDR10655360
+GPIO_OSPEEDER_OSPEEDR10_0655360
+GPIO_OSPEEDER_OSPEEDR10_1655360
+GPIO_OSPEEDER_OSPEEDR11655360
+GPIO_OSPEEDER_OSPEEDR11_0655360
+GPIO_OSPEEDER_OSPEEDR11_1655360
+GPIO_OSPEEDER_OSPEEDR12655360
+GPIO_OSPEEDER_OSPEEDR12_0655360
+GPIO_OSPEEDER_OSPEEDR12_1655360
+GPIO_OSPEEDER_OSPEEDR13655360
+GPIO_OSPEEDER_OSPEEDR13_0655360
+GPIO_OSPEEDER_OSPEEDR13_1655360
+GPIO_OSPEEDER_OSPEEDR14655360
+GPIO_OSPEEDER_OSPEEDR14_0655360
+GPIO_OSPEEDER_OSPEEDR14_1655360
+GPIO_OSPEEDER_OSPEEDR15655360
+GPIO_OSPEEDER_OSPEEDR15_0655360
+GPIO_OSPEEDER_OSPEEDR15_1655360
+GPIO_OSPEEDER_OSPEEDR1_0655360
+GPIO_OSPEEDER_OSPEEDR1_1655360
+GPIO_OSPEEDER_OSPEEDR2655360
+GPIO_OSPEEDER_OSPEEDR2_0655360
+GPIO_OSPEEDER_OSPEEDR2_1655360
+GPIO_OSPEEDER_OSPEEDR3655360
+GPIO_OSPEEDER_OSPEEDR3_0655360
+GPIO_OSPEEDER_OSPEEDR3_1655360
+GPIO_OSPEEDER_OSPEEDR4655360
+GPIO_OSPEEDER_OSPEEDR4_0655360
+GPIO_OSPEEDER_OSPEEDR4_1655360
+GPIO_OSPEEDER_OSPEEDR5655360
+GPIO_OSPEEDER_OSPEEDR5_0655360
+GPIO_OSPEEDER_OSPEEDR5_1655360
+GPIO_OSPEEDER_OSPEEDR6655360
+GPIO_OSPEEDER_OSPEEDR6_0655360
+GPIO_OSPEEDER_OSPEEDR6_1655360
+GPIO_OSPEEDER_OSPEEDR7655360
+GPIO_OSPEEDER_OSPEEDR7_0655360
+GPIO_OSPEEDER_OSPEEDR7_1655360
+GPIO_OSPEEDER_OSPEEDR8655360
+GPIO_OSPEEDER_OSPEEDR8_0655360
+GPIO_OSPEEDER_OSPEEDR8_1655360
+GPIO_OSPEEDER_OSPEEDR9655360
+GPIO_OSPEEDER_OSPEEDR9_0655360
+GPIO_OSPEEDER_OSPEEDR9_1655360
+GPIO_OSPEEDR_OSPEEDR0655360
+GPIO_OSPEEDR_OSPEEDR0_0655360
+GPIO_OSPEEDR_OSPEEDR0_1655360
+GPIO_OSPEEDR_OSPEEDR1655360
+GPIO_OSPEEDR_OSPEEDR10655360
+GPIO_OSPEEDR_OSPEEDR10_0655360
+GPIO_OSPEEDR_OSPEEDR10_1655360
+GPIO_OSPEEDR_OSPEEDR11655360
+GPIO_OSPEEDR_OSPEEDR11_0655360
+GPIO_OSPEEDR_OSPEEDR11_1655360
+GPIO_OSPEEDR_OSPEEDR12655360
+GPIO_OSPEEDR_OSPEEDR12_0655360
+GPIO_OSPEEDR_OSPEEDR12_1655360
+GPIO_OSPEEDR_OSPEEDR13655360
+GPIO_OSPEEDR_OSPEEDR13_0655360
+GPIO_OSPEEDR_OSPEEDR13_1655360
+GPIO_OSPEEDR_OSPEEDR14655360
+GPIO_OSPEEDR_OSPEEDR14_0655360
+GPIO_OSPEEDR_OSPEEDR14_1655360
+GPIO_OSPEEDR_OSPEEDR15655360
+GPIO_OSPEEDR_OSPEEDR15_0655360
+GPIO_OSPEEDR_OSPEEDR15_1655360
+GPIO_OSPEEDR_OSPEEDR1_0655360
+GPIO_OSPEEDR_OSPEEDR1_1655360
+GPIO_OSPEEDR_OSPEEDR2655360
+GPIO_OSPEEDR_OSPEEDR2_0655360
+GPIO_OSPEEDR_OSPEEDR2_1655360
+GPIO_OSPEEDR_OSPEEDR3655360
+GPIO_OSPEEDR_OSPEEDR3_0655360
+GPIO_OSPEEDR_OSPEEDR3_1655360
+GPIO_OSPEEDR_OSPEEDR4655360
+GPIO_OSPEEDR_OSPEEDR4_0655360
+GPIO_OSPEEDR_OSPEEDR4_1655360
+GPIO_OSPEEDR_OSPEEDR5655360
+GPIO_OSPEEDR_OSPEEDR5_0655360
+GPIO_OSPEEDR_OSPEEDR5_1655360
+GPIO_OSPEEDR_OSPEEDR6655360
+GPIO_OSPEEDR_OSPEEDR6_0655360
+GPIO_OSPEEDR_OSPEEDR6_1655360
+GPIO_OSPEEDR_OSPEEDR7655360
+GPIO_OSPEEDR_OSPEEDR7_0655360
+GPIO_OSPEEDR_OSPEEDR7_1655360
+GPIO_OSPEEDR_OSPEEDR8655360
+GPIO_OSPEEDR_OSPEEDR8_0655360
+GPIO_OSPEEDR_OSPEEDR8_1655360
+GPIO_OSPEEDR_OSPEEDR9655360
+GPIO_OSPEEDR_OSPEEDR9_0655360
+GPIO_OSPEEDR_OSPEEDR9_1655360
+GPIO_OTYPER_OT_0655360
+GPIO_OTYPER_OT_1655360
+GPIO_OTYPER_OT_10655360
+GPIO_OTYPER_OT_11655360
+GPIO_OTYPER_OT_12655360
+GPIO_OTYPER_OT_13655360
+GPIO_OTYPER_OT_14655360
+GPIO_OTYPER_OT_15655360
+GPIO_OTYPER_OT_2655360
+GPIO_OTYPER_OT_3655360
+GPIO_OTYPER_OT_4655360
+GPIO_OTYPER_OT_5655360
+GPIO_OTYPER_OT_6655360
+GPIO_OTYPER_OT_7655360
+GPIO_OTYPER_OT_8655360
+GPIO_OTYPER_OT_9655360
+GPIO_PUPDR_PUPDR0655360
+GPIO_PUPDR_PUPDR0_0655360
+GPIO_PUPDR_PUPDR0_1655360
+GPIO_PUPDR_PUPDR1655360
+GPIO_PUPDR_PUPDR10655360
+GPIO_PUPDR_PUPDR10_0655360
+GPIO_PUPDR_PUPDR10_1655360
+GPIO_PUPDR_PUPDR11655360
+GPIO_PUPDR_PUPDR11_0655360
+GPIO_PUPDR_PUPDR11_1655360
+GPIO_PUPDR_PUPDR12655360
+GPIO_PUPDR_PUPDR12_0655360
+GPIO_PUPDR_PUPDR12_1655360
+GPIO_PUPDR_PUPDR13655360
+GPIO_PUPDR_PUPDR13_0655360
+GPIO_PUPDR_PUPDR13_1655360
+GPIO_PUPDR_PUPDR14655360
+GPIO_PUPDR_PUPDR14_0655360
+GPIO_PUPDR_PUPDR14_1655360
+GPIO_PUPDR_PUPDR15655360
+GPIO_PUPDR_PUPDR15_0655360
+GPIO_PUPDR_PUPDR15_1655360
+GPIO_PUPDR_PUPDR1_0655360
+GPIO_PUPDR_PUPDR1_1655360
+GPIO_PUPDR_PUPDR2655360
+GPIO_PUPDR_PUPDR2_0655360
+GPIO_PUPDR_PUPDR2_1655360
+GPIO_PUPDR_PUPDR3655360
+GPIO_PUPDR_PUPDR3_0655360
+GPIO_PUPDR_PUPDR3_1655360
+GPIO_PUPDR_PUPDR4655360
+GPIO_PUPDR_PUPDR4_0655360
+GPIO_PUPDR_PUPDR4_1655360
+GPIO_PUPDR_PUPDR5655360
+GPIO_PUPDR_PUPDR5_0655360
+GPIO_PUPDR_PUPDR5_1655360
+GPIO_PUPDR_PUPDR6655360
+GPIO_PUPDR_PUPDR6_0655360
+GPIO_PUPDR_PUPDR6_1655360
+GPIO_PUPDR_PUPDR7655360
+GPIO_PUPDR_PUPDR7_0655360
+GPIO_PUPDR_PUPDR7_1655360
+GPIO_PUPDR_PUPDR8655360
+GPIO_PUPDR_PUPDR8_0655360
+GPIO_PUPDR_PUPDR8_1655360
+GPIO_PUPDR_PUPDR9655360
+GPIO_PUPDR_PUPDR9_0655360
+GPIO_PUPDR_PUPDR9_1655360
+I2C1655360
+I2C1_BASE655360
+I2C_CR1_ADDRIE655360
+I2C_CR1_ALERTEN655360
+I2C_CR1_ANFOFF655360
+I2C_CR1_DFN655360
+I2C_CR1_ERRIE655360
+I2C_CR1_GCEN655360
+I2C_CR1_NACKIE655360
+I2C_CR1_NOSTRETCH655360
+I2C_CR1_PE655360
+I2C_CR1_PECEN655360
+I2C_CR1_RXDMAEN655360
+I2C_CR1_RXIE655360
+I2C_CR1_SBC655360
+I2C_CR1_SMBDEN655360
+I2C_CR1_SMBHEN655360
+I2C_CR1_STOPIE655360
+I2C_CR1_SWRST655360
+I2C_CR1_TCIE655360
+I2C_CR1_TXDMAEN655360
+I2C_CR1_TXIE655360
+I2C_CR1_WUPEN655360
+I2C_CR2_ADD10655360
+I2C_CR2_AUTOEND655360
+I2C_CR2_HEAD10R655360
+I2C_CR2_NACK655360
+I2C_CR2_NBYTES655360
+I2C_CR2_PECBYTE655360
+I2C_CR2_RD_WRN655360
+I2C_CR2_RELOAD655360
+I2C_CR2_SADD655360
+I2C_CR2_START655360
+I2C_CR2_STOP655360
+I2C_ICR_ADDRCF655360
+I2C_ICR_ALERTCF655360
+I2C_ICR_ARLOCF655360
+I2C_ICR_BERRCF655360
+I2C_ICR_NACKCF655360
+I2C_ICR_OVRCF655360
+I2C_ICR_PECCF655360
+I2C_ICR_STOPCF655360
+I2C_ICR_TIMOUTCF655360
+I2C_ISR_ADDCODE655360
+I2C_ISR_ADDR655360
+I2C_ISR_ALERT655360
+I2C_ISR_ARLO655360
+I2C_ISR_BERR655360
+I2C_ISR_BUSY655360
+I2C_ISR_DIR655360
+I2C_ISR_NACKF655360
+I2C_ISR_OVR655360
+I2C_ISR_PECERR655360
+I2C_ISR_RXNE655360
+I2C_ISR_STOPF655360
+I2C_ISR_TC655360
+I2C_ISR_TCR655360
+I2C_ISR_TIMEOUT655360
+I2C_ISR_TXE655360
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+I2C_TIMINGR_PRESC655360
+I2C_TIMINGR_SCLDEL655360
+I2C_TIMINGR_SCLH655360
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+INT_FAST16_WIDTH655360
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+INT_FAST8_WIDTH655360
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+INT_LEAST16_WIDTH655360
+INT_LEAST32_MAX655360
+INT_LEAST32_MIN655360
+INT_LEAST32_WIDTH655360
+INT_LEAST64_MAX655360
+INT_LEAST64_MIN655360
+INT_LEAST64_WIDTH655360
+INT_LEAST8_MAX655360
+INT_LEAST8_MIN655360
+INT_LEAST8_WIDTH655360
+IS_ADC_ALL_INSTANCE131072(INSTANCE)0
+IS_ADC_COMMON_INSTANCE131072(INSTANCE)0
+IS_CAN_ALL_INSTANCE131072(INSTANCE)0
+IS_CEC_ALL_INSTANCE131072(INSTANCE)0
+IS_CRC_ALL_INSTANCE131072(INSTANCE)0
+IS_DMA_ALL_INSTANCE131072(INSTANCE)0
+IS_FUNCTIONAL_STATE131072(STATE)0
+IS_GPIO_AF_INSTANCE131072(INSTANCE)0
+IS_GPIO_ALL_INSTANCE131072(INSTANCE)0
+IS_GPIO_LOCK_INSTANCE131072(INSTANCE)0
+IS_I2C_ALL_INSTANCE131072(INSTANCE)0
+IS_I2S_ALL_INSTANCE131072(INSTANCE)0
+IS_IRDA_INSTANCE131072(INSTANCE)0
+IS_IWDG_ALL_INSTANCE131072(INSTANCE)0
+IS_RTC_ALL_INSTANCE131072(INSTANCE)0
+IS_SMARTCARD_INSTANCE131072(INSTANCE)0
+IS_SMBUS_ALL_INSTANCE131072(INSTANCE)0
+IS_SPI_ALL_INSTANCE131072(INSTANCE)0
+IS_TIM_32B_COUNTER_INSTANCE131072(INSTANCE)0
+IS_TIM_BKIN2_INSTANCE131072(INSTANCE)0
+IS_TIM_BREAK_INSTANCE131072(INSTANCE)0
+IS_TIM_CC1_INSTANCE131072(INSTANCE)0
+IS_TIM_CC2_INSTANCE131072(INSTANCE)0
+IS_TIM_CC3_INSTANCE131072(INSTANCE)0
+IS_TIM_CC4_INSTANCE131072(INSTANCE)0
+IS_TIM_CC5_INSTANCE131072(INSTANCE)0
+IS_TIM_CC6_INSTANCE131072(INSTANCE)0
+IS_TIM_CCXN_INSTANCE131072(INSTANCE,CHANNEL)0
+IS_TIM_CCX_INSTANCE131072(INSTANCE,CHANNEL)0
+IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE131072(INSTANCE)0
+IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE131072(INSTANCE)0
+IS_TIM_CLOCKSOURCE_ITRX_INSTANCE131072(INSTANCE)0
+IS_TIM_CLOCKSOURCE_TIX_INSTANCE131072(INSTANCE)0
+IS_TIM_CLOCK_DIVISION_INSTANCE131072(INSTANCE)0
+IS_TIM_CLOCK_SELECT_INSTANCE131072(INSTANCE)0
+IS_TIM_COMMUTATION_EVENT_INSTANCE131072(INSTANCE)0
+IS_TIM_COUNTER_MODE_SELECT_INSTANCE131072(INSTANCE)0
+IS_TIM_DMABURST_INSTANCE131072(INSTANCE)0
+IS_TIM_DMA_CC_INSTANCE131072(INSTANCE)0
+IS_TIM_DMA_INSTANCE131072(INSTANCE)0
+IS_TIM_ENCODER_INTERFACE_INSTANCE131072(INSTANCE)0
+IS_TIM_HALL_INTERFACE_INSTANCE131072(INSTANCE)0
+IS_TIM_INSTANCE131072(INSTANCE)0
+IS_TIM_MASTER_INSTANCE131072(INSTANCE)0
+IS_TIM_OCXREF_CLEAR_INSTANCE131072(INSTANCE)0
+IS_TIM_REMAP_INSTANCE131072(INSTANCE)0
+IS_TIM_REPETITION_COUNTER_INSTANCE131072(INSTANCE)0
+IS_TIM_SLAVE_INSTANCE131072(INSTANCE)0
+IS_TIM_SYNCHRO_INSTANCE131072(INSTANCE)0
+IS_TIM_TRGO2_INSTANCE131072(INSTANCE)0
+IS_TIM_XOR_INSTANCE131072(INSTANCE)0
+IS_TSC_ALL_INSTANCE131072(INSTANCE)0
+IS_UART_AUTOBAUDRATE_DETECTION_INSTANCE131072(INSTANCE)0
+IS_UART_DRIVER_ENABLE_INSTANCE131072(INSTANCE)0
+IS_UART_HALFDUPLEX_INSTANCE131072(INSTANCE)0
+IS_UART_HWFLOW_INSTANCE131072(INSTANCE)0
+IS_UART_INSTANCE131072(INSTANCE)0
+IS_UART_LIN_INSTANCE131072(INSTANCE)0
+IS_UART_WAKEUP_INSTANCE131072(INSTANCE)0
+IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE131072(INSTANCE)0
+IS_USART_INSTANCE131072(INSTANCE)0
+IS_USB_ALL_INSTANCE131072(INSTANCE)0
+IS_WWDG_ALL_INSTANCE131072(INSTANCE)0
+IWDG655360
+IWDG_BASE655360
+IWDG_KR_KEY655360
+IWDG_PR_PR655360
+IWDG_PR_PR_0655360
+IWDG_PR_PR_1655360
+IWDG_PR_PR_2655360
+IWDG_REFRESH655360
+IWDG_RLR_RL655360
+IWDG_SR_PVU655360
+IWDG_SR_RVU655360
+IWDG_SR_WVU655360
+IWDG_START655360
+IWDG_WINR_WIN655360
+IWDG_WRITE_ACCESS655360
+LED0_pin655360
+LED0_port655360
+LED1_pin655360
+LED1_port655360
+LED_blink131072(x)0
+LINE_BUSY4anon_enum_00
+MODIFY_REG131072(REG,CLEARMASK,SETMASK)0
+MSG131072(str)0
+NULL655360
+NVIC655360
+NVIC_BASE655360
+OB655360
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+OB_RDP_RDP655360
+OB_RDP_nRDP655360
+OB_USER_USER655360
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+OB_WRP0_WRP0655360
+OB_WRP0_nWRP0655360
+OB_WRP1_WRP1655360
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+OB_WRP2_WRP2655360
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+OB_WRP3_WRP3655360
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+PERIPH_BASE655360
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+PWR655360
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+PWR_CR_PLS_1655360
+PWR_CR_PLS_2655360
+PWR_CR_PLS_LEV0655360
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+PWR_CR_PLS_LEV2655360
+PWR_CR_PLS_LEV3655360
+PWR_CR_PLS_LEV4655360
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+RCC655360
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+RCC_AHBENR_DMA1EN655360
+RCC_AHBENR_DMAEN655360
+RCC_AHBENR_FLITFEN655360
+RCC_AHBENR_GPIOAEN655360
+RCC_AHBENR_GPIOBEN655360
+RCC_AHBENR_GPIOCEN655360
+RCC_AHBENR_GPIOFEN655360
+RCC_AHBENR_SRAMEN655360
+RCC_AHBENR_TSCEN655360
+RCC_AHBENR_TSEN655360
+RCC_AHBRSTR_GPIOARST655360
+RCC_AHBRSTR_GPIOBRST655360
+RCC_AHBRSTR_GPIOCRST655360
+RCC_AHBRSTR_GPIOFRST655360
+RCC_AHBRSTR_TSCRST655360
+RCC_AHBRSTR_TSRST655360
+RCC_APB1ENR_CANEN655360
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+RCC_APB1ENR_CRSEN655360
+RCC_APB1ENR_DACEN655360
+RCC_APB1ENR_I2C1EN655360
+RCC_APB1ENR_I2C2EN655360
+RCC_APB1ENR_PWREN655360
+RCC_APB1ENR_SPI2EN655360
+RCC_APB1ENR_TIM14EN655360
+RCC_APB1ENR_TIM2EN655360
+RCC_APB1ENR_TIM3EN655360
+RCC_APB1ENR_USART2EN655360
+RCC_APB1ENR_USART3EN655360
+RCC_APB1ENR_USART4EN655360
+RCC_APB1ENR_USBEN655360
+RCC_APB1ENR_WWDGEN655360
+RCC_APB1RSTR_CANRST655360
+RCC_APB1RSTR_CECRST655360
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+RCC_APB1RSTR_TIM3RST655360
+RCC_APB1RSTR_USART2RST655360
+RCC_APB1RSTR_USART3RST655360
+RCC_APB1RSTR_USART4RST655360
+RCC_APB1RSTR_USBRST655360
+RCC_APB1RSTR_WWDGRST655360
+RCC_APB2ENR_ADC1EN655360
+RCC_APB2ENR_ADCEN655360
+RCC_APB2ENR_DBGMCUEN655360
+RCC_APB2ENR_SPI1EN655360
+RCC_APB2ENR_SYSCFGCOMPEN655360
+RCC_APB2ENR_SYSCFGEN655360
+RCC_APB2ENR_TIM16EN655360
+RCC_APB2ENR_TIM17EN655360
+RCC_APB2ENR_TIM1EN655360
+RCC_APB2ENR_USART1EN655360
+RCC_APB2RSTR_ADC1RST655360
+RCC_APB2RSTR_ADCRST655360
+RCC_APB2RSTR_DBGMCURST655360
+RCC_APB2RSTR_SPI1RST655360
+RCC_APB2RSTR_SYSCFGRST655360
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+RCC_APB2RSTR_TIM17RST655360
+RCC_APB2RSTR_TIM1RST655360
+RCC_APB2RSTR_USART1RST655360
+RCC_BASE655360
+RCC_BDCR_BDRST655360
+RCC_BDCR_LSEBYP655360
+RCC_BDCR_LSEDRV655360
+RCC_BDCR_LSEDRV_0655360
+RCC_BDCR_LSEDRV_1655360
+RCC_BDCR_LSEON655360
+RCC_BDCR_LSERDY655360
+RCC_BDCR_RTCEN655360
+RCC_BDCR_RTCSEL655360
+RCC_BDCR_RTCSEL_0655360
+RCC_BDCR_RTCSEL_1655360
+RCC_BDCR_RTCSEL_HSE655360
+RCC_BDCR_RTCSEL_LSE655360
+RCC_BDCR_RTCSEL_LSI655360
+RCC_BDCR_RTCSEL_NOCLOCK655360
+RCC_CFGR2_PREDIV655360
+RCC_CFGR2_PREDIV_0655360
+RCC_CFGR2_PREDIV_1655360
+RCC_CFGR2_PREDIV_2655360
+RCC_CFGR2_PREDIV_3655360
+RCC_CFGR2_PREDIV_DIV1655360
+RCC_CFGR2_PREDIV_DIV10655360
+RCC_CFGR2_PREDIV_DIV11655360
+RCC_CFGR2_PREDIV_DIV12655360
+RCC_CFGR2_PREDIV_DIV13655360
+RCC_CFGR2_PREDIV_DIV14655360
+RCC_CFGR2_PREDIV_DIV15655360
+RCC_CFGR2_PREDIV_DIV16655360
+RCC_CFGR2_PREDIV_DIV2655360
+RCC_CFGR2_PREDIV_DIV3655360
+RCC_CFGR2_PREDIV_DIV4655360
+RCC_CFGR2_PREDIV_DIV5655360
+RCC_CFGR2_PREDIV_DIV6655360
+RCC_CFGR2_PREDIV_DIV7655360
+RCC_CFGR2_PREDIV_DIV8655360
+RCC_CFGR2_PREDIV_DIV9655360
+RCC_CFGR3_CECSW655360
+RCC_CFGR3_CECSW_HSI_DIV244655360
+RCC_CFGR3_CECSW_LSE655360
+RCC_CFGR3_I2C1SW655360
+RCC_CFGR3_I2C1SW_HSI655360
+RCC_CFGR3_I2C1SW_SYSCLK655360
+RCC_CFGR3_USART1SW655360
+RCC_CFGR3_USART1SW_0655360
+RCC_CFGR3_USART1SW_1655360
+RCC_CFGR3_USART1SW_HSI655360
+RCC_CFGR3_USART1SW_LSE655360
+RCC_CFGR3_USART1SW_PCLK655360
+RCC_CFGR3_USART1SW_SYSCLK655360
+RCC_CFGR3_USART2SW655360
+RCC_CFGR3_USART2SW_0655360
+RCC_CFGR3_USART2SW_1655360
+RCC_CFGR3_USART2SW_HSI655360
+RCC_CFGR3_USART2SW_LSE655360
+RCC_CFGR3_USART2SW_PCLK655360
+RCC_CFGR3_USART2SW_SYSCLK655360
+RCC_CFGR3_USBSW655360
+RCC_CFGR3_USBSW_HSI48655360
+RCC_CFGR3_USBSW_PLLCLK655360
+RCC_CFGR_ADCPRE655360
+RCC_CFGR_ADCPRE_DIV2655360
+RCC_CFGR_ADCPRE_DIV4655360
+RCC_CFGR_HPRE655360
+RCC_CFGR_HPRE_0655360
+RCC_CFGR_HPRE_1655360
+RCC_CFGR_HPRE_2655360
+RCC_CFGR_HPRE_3655360
+RCC_CFGR_HPRE_DIV1655360
+RCC_CFGR_HPRE_DIV128655360
+RCC_CFGR_HPRE_DIV16655360
+RCC_CFGR_HPRE_DIV2655360
+RCC_CFGR_HPRE_DIV256655360
+RCC_CFGR_HPRE_DIV4655360
+RCC_CFGR_HPRE_DIV512655360
+RCC_CFGR_HPRE_DIV64655360
+RCC_CFGR_HPRE_DIV8655360
+RCC_CFGR_MCO655360
+RCC_CFGR_MCOPRE655360
+RCC_CFGR_MCOPRE_DIV1655360
+RCC_CFGR_MCOPRE_DIV128655360
+RCC_CFGR_MCOPRE_DIV16655360
+RCC_CFGR_MCOPRE_DIV2655360
+RCC_CFGR_MCOPRE_DIV32655360
+RCC_CFGR_MCOPRE_DIV4655360
+RCC_CFGR_MCOPRE_DIV64655360
+RCC_CFGR_MCOPRE_DIV8655360
+RCC_CFGR_MCO_0655360
+RCC_CFGR_MCO_1655360
+RCC_CFGR_MCO_2655360
+RCC_CFGR_MCO_3655360
+RCC_CFGR_MCO_HSE655360
+RCC_CFGR_MCO_HSI655360
+RCC_CFGR_MCO_HSI14655360
+RCC_CFGR_MCO_HSI48655360
+RCC_CFGR_MCO_LSE655360
+RCC_CFGR_MCO_LSI655360
+RCC_CFGR_MCO_NOCLOCK655360
+RCC_CFGR_MCO_PLL655360
+RCC_CFGR_MCO_SYSCLK655360
+RCC_CFGR_PLLMUL655360
+RCC_CFGR_PLLMUL10655360
+RCC_CFGR_PLLMUL11655360
+RCC_CFGR_PLLMUL12655360
+RCC_CFGR_PLLMUL13655360
+RCC_CFGR_PLLMUL14655360
+RCC_CFGR_PLLMUL15655360
+RCC_CFGR_PLLMUL16655360
+RCC_CFGR_PLLMUL2655360
+RCC_CFGR_PLLMUL3655360
+RCC_CFGR_PLLMUL4655360
+RCC_CFGR_PLLMUL5655360
+RCC_CFGR_PLLMUL6655360
+RCC_CFGR_PLLMUL7655360
+RCC_CFGR_PLLMUL8655360
+RCC_CFGR_PLLMUL9655360
+RCC_CFGR_PLLMUL_0655360
+RCC_CFGR_PLLMUL_1655360
+RCC_CFGR_PLLMUL_2655360
+RCC_CFGR_PLLMUL_3655360
+RCC_CFGR_PLLNODIV655360
+RCC_CFGR_PLLSRC655360
+RCC_CFGR_PLLSRC_HSE_PREDIV655360
+RCC_CFGR_PLLSRC_HSI48_PREDIV655360
+RCC_CFGR_PLLSRC_HSI_DIV2655360
+RCC_CFGR_PLLSRC_HSI_PREDIV655360
+RCC_CFGR_PLLXTPRE655360
+RCC_CFGR_PLLXTPRE_HSE_PREDIV_DIV1655360
+RCC_CFGR_PLLXTPRE_HSE_PREDIV_DIV2655360
+RCC_CFGR_PPRE655360
+RCC_CFGR_PPRE_0655360
+RCC_CFGR_PPRE_1655360
+RCC_CFGR_PPRE_2655360
+RCC_CFGR_PPRE_DIV1655360
+RCC_CFGR_PPRE_DIV16655360
+RCC_CFGR_PPRE_DIV2655360
+RCC_CFGR_PPRE_DIV4655360
+RCC_CFGR_PPRE_DIV8655360
+RCC_CFGR_SW655360
+RCC_CFGR_SWS655360
+RCC_CFGR_SWS_0655360
+RCC_CFGR_SWS_1655360
+RCC_CFGR_SWS_HSE655360
+RCC_CFGR_SWS_HSI655360
+RCC_CFGR_SWS_HSI48655360
+RCC_CFGR_SWS_PLL655360
+RCC_CFGR_SW_0655360
+RCC_CFGR_SW_1655360
+RCC_CFGR_SW_HSE655360
+RCC_CFGR_SW_HSI655360
+RCC_CFGR_SW_HSI48655360
+RCC_CFGR_SW_PLL655360
+RCC_CFGR_USBPRE655360
+RCC_CIR_CSSC655360
+RCC_CIR_CSSF655360
+RCC_CIR_HSERDYC655360
+RCC_CIR_HSERDYF655360
+RCC_CIR_HSERDYIE655360
+RCC_CIR_HSI14RDYC655360
+RCC_CIR_HSI14RDYF655360
+RCC_CIR_HSI14RDYIE655360
+RCC_CIR_HSI48RDYC655360
+RCC_CIR_HSI48RDYF655360
+RCC_CIR_HSI48RDYIE655360
+RCC_CIR_HSIRDYC655360
+RCC_CIR_HSIRDYF655360
+RCC_CIR_HSIRDYIE655360
+RCC_CIR_LSERDYC655360
+RCC_CIR_LSERDYF655360
+RCC_CIR_LSERDYIE655360
+RCC_CIR_LSIRDYC655360
+RCC_CIR_LSIRDYF655360
+RCC_CIR_LSIRDYIE655360
+RCC_CIR_PLLRDYC655360
+RCC_CIR_PLLRDYF655360
+RCC_CIR_PLLRDYIE655360
+RCC_CR2_HSI14CAL655360
+RCC_CR2_HSI14DIS655360
+RCC_CR2_HSI14ON655360
+RCC_CR2_HSI14RDY655360
+RCC_CR2_HSI14TRIM655360
+RCC_CR2_HSI48CAL655360
+RCC_CR2_HSI48ON655360
+RCC_CR2_HSI48RDY655360
+RCC_CR_CSSON655360
+RCC_CR_HSEBYP655360
+RCC_CR_HSEON655360
+RCC_CR_HSERDY655360
+RCC_CR_HSICAL655360
+RCC_CR_HSICAL_0655360
+RCC_CR_HSICAL_1655360
+RCC_CR_HSICAL_2655360
+RCC_CR_HSICAL_3655360
+RCC_CR_HSICAL_4655360
+RCC_CR_HSICAL_5655360
+RCC_CR_HSICAL_6655360
+RCC_CR_HSICAL_7655360
+RCC_CR_HSION655360
+RCC_CR_HSIRDY655360
+RCC_CR_HSITRIM655360
+RCC_CR_HSITRIM_0655360
+RCC_CR_HSITRIM_1655360
+RCC_CR_HSITRIM_2655360
+RCC_CR_HSITRIM_3655360
+RCC_CR_HSITRIM_4655360
+RCC_CR_PLLON655360
+RCC_CR_PLLRDY655360
+RCC_CSR_IWDGRSTF655360
+RCC_CSR_LPWRRSTF655360
+RCC_CSR_LSION655360
+RCC_CSR_LSIRDY655360
+RCC_CSR_OBL655360
+RCC_CSR_OBLRSTF655360
+RCC_CSR_PINRSTF655360
+RCC_CSR_PORRSTF655360
+RCC_CSR_RMVF655360
+RCC_CSR_SFTRSTF655360
+RCC_CSR_V18PWRRSTF655360
+RCC_CSR_WWDGRSTF655360
+RCC_IRQHandler655360
+RCC_IRQn655360
+READ_BIT131072(REG,BIT)0
+READ_CAN_INV_ADDR131072()0
+READ_REG131072(REG)0
+RTC655360
+RTC_ALRMAR_DT655360
+RTC_ALRMAR_DT_0655360
+RTC_ALRMAR_DT_1655360
+RTC_ALRMAR_DU655360
+RTC_ALRMAR_DU_0655360
+RTC_ALRMAR_DU_1655360
+RTC_ALRMAR_DU_2655360
+RTC_ALRMAR_DU_3655360
+RTC_ALRMAR_HT655360
+RTC_ALRMAR_HT_0655360
+RTC_ALRMAR_HT_1655360
+RTC_ALRMAR_HU655360
+RTC_ALRMAR_HU_0655360
+RTC_ALRMAR_HU_1655360
+RTC_ALRMAR_HU_2655360
+RTC_ALRMAR_HU_3655360
+RTC_ALRMAR_MNT655360
+RTC_ALRMAR_MNT_0655360
+RTC_ALRMAR_MNT_1655360
+RTC_ALRMAR_MNT_2655360
+RTC_ALRMAR_MNU655360
+RTC_ALRMAR_MNU_0655360
+RTC_ALRMAR_MNU_1655360
+RTC_ALRMAR_MNU_2655360
+RTC_ALRMAR_MNU_3655360
+RTC_ALRMAR_MSK1655360
+RTC_ALRMAR_MSK2655360
+RTC_ALRMAR_MSK3655360
+RTC_ALRMAR_MSK4655360
+RTC_ALRMAR_PM655360
+RTC_ALRMAR_ST655360
+RTC_ALRMAR_ST_0655360
+RTC_ALRMAR_ST_1655360
+RTC_ALRMAR_ST_2655360
+RTC_ALRMAR_SU655360
+RTC_ALRMAR_SU_0655360
+RTC_ALRMAR_SU_1655360
+RTC_ALRMAR_SU_2655360
+RTC_ALRMAR_SU_3655360
+RTC_ALRMAR_WDSEL655360
+RTC_ALRMASSR_MASKSS655360
+RTC_ALRMASSR_MASKSS_0655360
+RTC_ALRMASSR_MASKSS_1655360
+RTC_ALRMASSR_MASKSS_2655360
+RTC_ALRMASSR_MASKSS_3655360
+RTC_ALRMASSR_SS655360
+RTC_BASE655360
+RTC_BKP0R655360
+RTC_BKP1R655360
+RTC_BKP2R655360
+RTC_BKP3R655360
+RTC_BKP4R655360
+RTC_BKP_NUMBER655360
+RTC_CALR_CALM655360
+RTC_CALR_CALM_0655360
+RTC_CALR_CALM_1655360
+RTC_CALR_CALM_2655360
+RTC_CALR_CALM_3655360
+RTC_CALR_CALM_4655360
+RTC_CALR_CALM_5655360
+RTC_CALR_CALM_6655360
+RTC_CALR_CALM_7655360
+RTC_CALR_CALM_8655360
+RTC_CALR_CALP655360
+RTC_CALR_CALW16655360
+RTC_CALR_CALW8655360
+RTC_CR_ADD1H655360
+RTC_CR_ALRAE655360
+RTC_CR_ALRAIE655360
+RTC_CR_BCK655360
+RTC_CR_BYPSHAD655360
+RTC_CR_COE655360
+RTC_CR_COSEL655360
+RTC_CR_FMT655360
+RTC_CR_OSEL655360
+RTC_CR_OSEL_0655360
+RTC_CR_OSEL_1655360
+RTC_CR_POL655360
+RTC_CR_REFCKON655360
+RTC_CR_SUB1H655360
+RTC_CR_TSE655360
+RTC_CR_TSEDGE655360
+RTC_CR_TSIE655360
+RTC_DR_DT655360
+RTC_DR_DT_0655360
+RTC_DR_DT_1655360
+RTC_DR_DU655360
+RTC_DR_DU_0655360
+RTC_DR_DU_1655360
+RTC_DR_DU_2655360
+RTC_DR_DU_3655360
+RTC_DR_MT655360
+RTC_DR_MU655360
+RTC_DR_MU_0655360
+RTC_DR_MU_1655360
+RTC_DR_MU_2655360
+RTC_DR_MU_3655360
+RTC_DR_WDU655360
+RTC_DR_WDU_0655360
+RTC_DR_WDU_1655360
+RTC_DR_WDU_2655360
+RTC_DR_YT655360
+RTC_DR_YT_0655360
+RTC_DR_YT_1655360
+RTC_DR_YT_2655360
+RTC_DR_YT_3655360
+RTC_DR_YU655360
+RTC_DR_YU_0655360
+RTC_DR_YU_1655360
+RTC_DR_YU_2655360
+RTC_DR_YU_3655360
+RTC_ISR_ALRAF655360
+RTC_ISR_ALRAWF655360
+RTC_ISR_INIT655360
+RTC_ISR_INITF655360
+RTC_ISR_INITS655360
+RTC_ISR_RECALPF655360
+RTC_ISR_RSF655360
+RTC_ISR_SHPF655360
+RTC_ISR_TAMP1F655360
+RTC_ISR_TAMP2F655360
+RTC_ISR_TSF655360
+RTC_ISR_TSOVF655360
+RTC_PRER_PREDIV_A655360
+RTC_PRER_PREDIV_S655360
+RTC_SHIFTR_ADD1S655360
+RTC_SHIFTR_SUBFS655360
+RTC_SSR_SS655360
+RTC_TAFCR_ALARMOUTTYPE655360
+RTC_TAFCR_TAMP1E655360
+RTC_TAFCR_TAMP1TRG655360
+RTC_TAFCR_TAMP2E655360
+RTC_TAFCR_TAMP2TRG655360
+RTC_TAFCR_TAMPFLT655360
+RTC_TAFCR_TAMPFLT_0655360
+RTC_TAFCR_TAMPFLT_1655360
+RTC_TAFCR_TAMPFREQ655360
+RTC_TAFCR_TAMPFREQ_0655360
+RTC_TAFCR_TAMPFREQ_1655360
+RTC_TAFCR_TAMPFREQ_2655360
+RTC_TAFCR_TAMPIE655360
+RTC_TAFCR_TAMPPRCH655360
+RTC_TAFCR_TAMPPRCH_0655360
+RTC_TAFCR_TAMPPRCH_1655360
+RTC_TAFCR_TAMPPUDIS655360
+RTC_TAFCR_TAMPTS655360
+RTC_TR_HT655360
+RTC_TR_HT_0655360
+RTC_TR_HT_1655360
+RTC_TR_HU655360
+RTC_TR_HU_0655360
+RTC_TR_HU_1655360
+RTC_TR_HU_2655360
+RTC_TR_HU_3655360
+RTC_TR_MNT655360
+RTC_TR_MNT_0655360
+RTC_TR_MNT_1655360
+RTC_TR_MNT_2655360
+RTC_TR_MNU655360
+RTC_TR_MNU_0655360
+RTC_TR_MNU_1655360
+RTC_TR_MNU_2655360
+RTC_TR_MNU_3655360
+RTC_TR_PM655360
+RTC_TR_ST655360
+RTC_TR_ST_0655360
+RTC_TR_ST_1655360
+RTC_TR_ST_2655360
+RTC_TR_SU655360
+RTC_TR_SU_0655360
+RTC_TR_SU_1655360
+RTC_TR_SU_2655360
+RTC_TR_SU_3655360
+RTC_TSDR_DT655360
+RTC_TSDR_DT_0655360
+RTC_TSDR_DT_1655360
+RTC_TSDR_DU655360
+RTC_TSDR_DU_0655360
+RTC_TSDR_DU_1655360
+RTC_TSDR_DU_2655360
+RTC_TSDR_DU_3655360
+RTC_TSDR_MT655360
+RTC_TSDR_MU655360
+RTC_TSDR_MU_0655360
+RTC_TSDR_MU_1655360
+RTC_TSDR_MU_2655360
+RTC_TSDR_MU_3655360
+RTC_TSDR_WDU655360
+RTC_TSDR_WDU_0655360
+RTC_TSDR_WDU_1655360
+RTC_TSDR_WDU_2655360
+RTC_TSSSR_SS655360
+RTC_TSTR_HT655360
+RTC_TSTR_HT_0655360
+RTC_TSTR_HT_1655360
+RTC_TSTR_HU655360
+RTC_TSTR_HU_0655360
+RTC_TSTR_HU_1655360
+RTC_TSTR_HU_2655360
+RTC_TSTR_HU_3655360
+RTC_TSTR_MNT655360
+RTC_TSTR_MNT_0655360
+RTC_TSTR_MNT_1655360
+RTC_TSTR_MNT_2655360
+RTC_TSTR_MNU655360
+RTC_TSTR_MNU_0655360
+RTC_TSTR_MNU_1655360
+RTC_TSTR_MNU_2655360
+RTC_TSTR_MNU_3655360
+RTC_TSTR_PM655360
+RTC_TSTR_ST655360
+RTC_TSTR_ST_0655360
+RTC_TSTR_ST_1655360
+RTC_TSTR_ST_2655360
+RTC_TSTR_SU655360
+RTC_TSTR_SU_0655360
+RTC_TSTR_SU_1655360
+RTC_TSTR_SU_2655360
+RTC_TSTR_SU_3655360
+RTC_WPR_KEY655360
+SCB655360
+SCB_AIRCR_ENDIANESS_Msk655360
+SCB_AIRCR_ENDIANESS_Pos655360
+SCB_AIRCR_SYSRESETREQ_Msk655360
+SCB_AIRCR_SYSRESETREQ_Pos655360
+SCB_AIRCR_VECTCLRACTIVE_Msk655360
+SCB_AIRCR_VECTCLRACTIVE_Pos655360
+SCB_AIRCR_VECTKEYSTAT_Msk655360
+SCB_AIRCR_VECTKEYSTAT_Pos655360
+SCB_AIRCR_VECTKEY_Msk655360
+SCB_AIRCR_VECTKEY_Pos655360
+SCB_BASE655360
+SCB_CCR_STKALIGN_Msk655360
+SCB_CCR_STKALIGN_Pos655360
+SCB_CCR_UNALIGN_TRP_Msk655360
+SCB_CCR_UNALIGN_TRP_Pos655360
+SCB_CPUID_ARCHITECTURE_Msk655360
+SCB_CPUID_ARCHITECTURE_Pos655360
+SCB_CPUID_IMPLEMENTER_Msk655360
+SCB_CPUID_IMPLEMENTER_Pos655360
+SCB_CPUID_PARTNO_Msk655360
+SCB_CPUID_PARTNO_Pos655360
+SCB_CPUID_REVISION_Msk655360
+SCB_CPUID_REVISION_Pos655360
+SCB_CPUID_VARIANT_Msk655360
+SCB_CPUID_VARIANT_Pos655360
+SCB_ICSR_ISRPENDING_Msk655360
+SCB_ICSR_ISRPENDING_Pos655360
+SCB_ICSR_ISRPREEMPT_Msk655360
+SCB_ICSR_ISRPREEMPT_Pos655360
+SCB_ICSR_NMIPENDSET_Msk655360
+SCB_ICSR_NMIPENDSET_Pos655360
+SCB_ICSR_PENDSTCLR_Msk655360
+SCB_ICSR_PENDSTCLR_Pos655360
+SCB_ICSR_PENDSTSET_Msk655360
+SCB_ICSR_PENDSTSET_Pos655360
+SCB_ICSR_PENDSVCLR_Msk655360
+SCB_ICSR_PENDSVCLR_Pos655360
+SCB_ICSR_PENDSVSET_Msk655360
+SCB_ICSR_PENDSVSET_Pos655360
+SCB_ICSR_VECTACTIVE_Msk655360
+SCB_ICSR_VECTACTIVE_Pos655360
+SCB_ICSR_VECTPENDING_Msk655360
+SCB_ICSR_VECTPENDING_Pos655360
+SCB_SCR_SEVONPEND_Msk655360
+SCB_SCR_SEVONPEND_Pos655360
+SCB_SCR_SLEEPDEEP_Msk655360
+SCB_SCR_SLEEPDEEP_Pos655360
+SCB_SCR_SLEEPONEXIT_Msk655360
+SCB_SCR_SLEEPONEXIT_Pos655360
+SCB_SHCSR_SVCALLPENDED_Msk655360
+SCB_SHCSR_SVCALLPENDED_Pos655360
+SCS_BASE655360
+SEND131072(str)0
+SET_BIT131072(REG,BIT)0
+SIG_ATOMIC_MAX655360
+SIG_ATOMIC_MIN655360
+SIG_ATOMIC_WIDTH655360
+SIZE_MAX655360
+SIZE_WIDTH655360
+SPI1655360
+SPI1_BASE655360
+SPI2655360
+SPI2_BASE655360
+SPI_CR1_BIDIMODE655360
+SPI_CR1_BIDIOE655360
+SPI_CR1_BR655360
+SPI_CR1_BR_0655360
+SPI_CR1_BR_1655360
+SPI_CR1_BR_2655360
+SPI_CR1_CPHA655360
+SPI_CR1_CPOL655360
+SPI_CR1_CRCEN655360
+SPI_CR1_CRCL655360
+SPI_CR1_CRCNEXT655360
+SPI_CR1_LSBFIRST655360
+SPI_CR1_MSTR655360
+SPI_CR1_RXONLY655360
+SPI_CR1_SPE655360
+SPI_CR1_SSI655360
+SPI_CR1_SSM655360
+SPI_CR2_DS655360
+SPI_CR2_DS_0655360
+SPI_CR2_DS_1655360
+SPI_CR2_DS_2655360
+SPI_CR2_DS_3655360
+SPI_CR2_ERRIE655360
+SPI_CR2_FRF655360
+SPI_CR2_FRXTH655360
+SPI_CR2_LDMARX655360
+SPI_CR2_LDMATX655360
+SPI_CR2_NSSP655360
+SPI_CR2_RXDMAEN655360
+SPI_CR2_RXNEIE655360
+SPI_CR2_SSOE655360
+SPI_CR2_TXDMAEN655360
+SPI_CR2_TXEIE655360
+SPI_CRCPR_CRCPOLY655360
+SPI_DR_DR655360
+SPI_I2SCFGR_CHLEN655360
+SPI_I2SCFGR_CKPOL655360
+SPI_I2SCFGR_DATLEN655360
+SPI_I2SCFGR_DATLEN_0655360
+SPI_I2SCFGR_DATLEN_1655360
+SPI_I2SCFGR_I2SCFG655360
+SPI_I2SCFGR_I2SCFG_0655360
+SPI_I2SCFGR_I2SCFG_1655360
+SPI_I2SCFGR_I2SE655360
+SPI_I2SCFGR_I2SMOD655360
+SPI_I2SCFGR_I2SSTD655360
+SPI_I2SCFGR_I2SSTD_0655360
+SPI_I2SCFGR_I2SSTD_1655360
+SPI_I2SCFGR_PCMSYNC655360
+SPI_I2SPR_I2SDIV655360
+SPI_I2SPR_MCKOE655360
+SPI_I2SPR_ODD655360
+SPI_RXCRCR_RXCRC655360
+SPI_SR_BSY655360
+SPI_SR_CHSIDE655360
+SPI_SR_CRCERR655360
+SPI_SR_FRE655360
+SPI_SR_FRLVL655360
+SPI_SR_FRLVL_0655360
+SPI_SR_FRLVL_1655360
+SPI_SR_FTLVL655360
+SPI_SR_FTLVL_0655360
+SPI_SR_FTLVL_1655360
+SPI_SR_MODF655360
+SPI_SR_OVR655360
+SPI_SR_RXNE655360
+SPI_SR_TXE655360
+SPI_SR_UDR655360
+SPI_TXCRCR_TXCRC655360
+SRAM_BASE655360
+STM32F0655360
+STM32F042x6655360
+STR131072(s)0
+STR_HELPER131072(s)0
+STR_TOO_LONG4anon_enum_00
+SYSCFG655360
+SYSCFG_BASE655360
+SYSCFG_CFGR1_ADC_DMA_RMP655360
+SYSCFG_CFGR1_DMA_RMP655360
+SYSCFG_CFGR1_I2C_FMP_I2C1655360
+SYSCFG_CFGR1_I2C_FMP_I2C2655360
+SYSCFG_CFGR1_I2C_FMP_PA10655360
+SYSCFG_CFGR1_I2C_FMP_PA9655360
+SYSCFG_CFGR1_I2C_FMP_PB6655360
+SYSCFG_CFGR1_I2C_FMP_PB7655360
+SYSCFG_CFGR1_I2C_FMP_PB8655360
+SYSCFG_CFGR1_I2C_FMP_PB9655360
+SYSCFG_CFGR1_MEM_MODE655360
+SYSCFG_CFGR1_MEM_MODE_0655360
+SYSCFG_CFGR1_MEM_MODE_1655360
+SYSCFG_CFGR1_PA11_PA12_RMP655360
+SYSCFG_CFGR1_TIM16_DMA_RMP655360
+SYSCFG_CFGR1_TIM17_DMA_RMP655360
+SYSCFG_CFGR1_USART1RX_DMA_RMP655360
+SYSCFG_CFGR1_USART1TX_DMA_RMP655360
+SYSCFG_CFGR2_LOCKUP_LOCK655360
+SYSCFG_CFGR2_PVD_LOCK655360
+SYSCFG_CFGR2_SRAM_PARITY_LOCK655360
+SYSCFG_CFGR2_SRAM_PE655360
+SYSCFG_CFGR2_SRAM_PEF655360
+SYSCFG_EXTICR1_EXTI0655360
+SYSCFG_EXTICR1_EXTI0_PA655360
+SYSCFG_EXTICR1_EXTI0_PB655360
+SYSCFG_EXTICR1_EXTI0_PC655360
+SYSCFG_EXTICR1_EXTI0_PD655360
+SYSCFG_EXTICR1_EXTI0_PE655360
+SYSCFG_EXTICR1_EXTI0_PF655360
+SYSCFG_EXTICR1_EXTI1655360
+SYSCFG_EXTICR1_EXTI1_PA655360
+SYSCFG_EXTICR1_EXTI1_PB655360
+SYSCFG_EXTICR1_EXTI1_PC655360
+SYSCFG_EXTICR1_EXTI1_PD655360
+SYSCFG_EXTICR1_EXTI1_PE655360
+SYSCFG_EXTICR1_EXTI1_PF655360
+SYSCFG_EXTICR1_EXTI2655360
+SYSCFG_EXTICR1_EXTI2_PA655360
+SYSCFG_EXTICR1_EXTI2_PB655360
+SYSCFG_EXTICR1_EXTI2_PC655360
+SYSCFG_EXTICR1_EXTI2_PD655360
+SYSCFG_EXTICR1_EXTI2_PE655360
+SYSCFG_EXTICR1_EXTI2_PF655360
+SYSCFG_EXTICR1_EXTI3655360
+SYSCFG_EXTICR1_EXTI3_PA655360
+SYSCFG_EXTICR1_EXTI3_PB655360
+SYSCFG_EXTICR1_EXTI3_PC655360
+SYSCFG_EXTICR1_EXTI3_PD655360
+SYSCFG_EXTICR1_EXTI3_PE655360
+SYSCFG_EXTICR1_EXTI3_PF655360
+SYSCFG_EXTICR2_EXTI4655360
+SYSCFG_EXTICR2_EXTI4_PA655360
+SYSCFG_EXTICR2_EXTI4_PB655360
+SYSCFG_EXTICR2_EXTI4_PC655360
+SYSCFG_EXTICR2_EXTI4_PD655360
+SYSCFG_EXTICR2_EXTI4_PE655360
+SYSCFG_EXTICR2_EXTI4_PF655360
+SYSCFG_EXTICR2_EXTI5655360
+SYSCFG_EXTICR2_EXTI5_PA655360
+SYSCFG_EXTICR2_EXTI5_PB655360
+SYSCFG_EXTICR2_EXTI5_PC655360
+SYSCFG_EXTICR2_EXTI5_PD655360
+SYSCFG_EXTICR2_EXTI5_PE655360
+SYSCFG_EXTICR2_EXTI5_PF655360
+SYSCFG_EXTICR2_EXTI6655360
+SYSCFG_EXTICR2_EXTI6_PA655360
+SYSCFG_EXTICR2_EXTI6_PB655360
+SYSCFG_EXTICR2_EXTI6_PC655360
+SYSCFG_EXTICR2_EXTI6_PD655360
+SYSCFG_EXTICR2_EXTI6_PE655360
+SYSCFG_EXTICR2_EXTI6_PF655360
+SYSCFG_EXTICR2_EXTI7655360
+SYSCFG_EXTICR2_EXTI7_PA655360
+SYSCFG_EXTICR2_EXTI7_PB655360
+SYSCFG_EXTICR2_EXTI7_PC655360
+SYSCFG_EXTICR2_EXTI7_PD655360
+SYSCFG_EXTICR2_EXTI7_PE655360
+SYSCFG_EXTICR2_EXTI7_PF655360
+SYSCFG_EXTICR3_EXTI10655360
+SYSCFG_EXTICR3_EXTI10_PA655360
+SYSCFG_EXTICR3_EXTI10_PB655360
+SYSCFG_EXTICR3_EXTI10_PC655360
+SYSCFG_EXTICR3_EXTI10_PD655360
+SYSCFG_EXTICR3_EXTI10_PE655360
+SYSCFG_EXTICR3_EXTI10_PF655360
+SYSCFG_EXTICR3_EXTI11655360
+SYSCFG_EXTICR3_EXTI11_PA655360
+SYSCFG_EXTICR3_EXTI11_PB655360
+SYSCFG_EXTICR3_EXTI11_PC655360
+SYSCFG_EXTICR3_EXTI11_PD655360
+SYSCFG_EXTICR3_EXTI11_PE655360
+SYSCFG_EXTICR3_EXTI8655360
+SYSCFG_EXTICR3_EXTI8_PA655360
+SYSCFG_EXTICR3_EXTI8_PB655360
+SYSCFG_EXTICR3_EXTI8_PC655360
+SYSCFG_EXTICR3_EXTI8_PD655360
+SYSCFG_EXTICR3_EXTI8_PE655360
+SYSCFG_EXTICR3_EXTI9655360
+SYSCFG_EXTICR3_EXTI9_PA655360
+SYSCFG_EXTICR3_EXTI9_PB655360
+SYSCFG_EXTICR3_EXTI9_PC655360
+SYSCFG_EXTICR3_EXTI9_PD655360
+SYSCFG_EXTICR3_EXTI9_PE655360
+SYSCFG_EXTICR3_EXTI9_PF655360
+SYSCFG_EXTICR4_EXTI12655360
+SYSCFG_EXTICR4_EXTI12_PA655360
+SYSCFG_EXTICR4_EXTI12_PB655360
+SYSCFG_EXTICR4_EXTI12_PC655360
+SYSCFG_EXTICR4_EXTI12_PD655360
+SYSCFG_EXTICR4_EXTI12_PE655360
+SYSCFG_EXTICR4_EXTI13655360
+SYSCFG_EXTICR4_EXTI13_PA655360
+SYSCFG_EXTICR4_EXTI13_PB655360
+SYSCFG_EXTICR4_EXTI13_PC655360
+SYSCFG_EXTICR4_EXTI13_PD655360
+SYSCFG_EXTICR4_EXTI13_PE655360
+SYSCFG_EXTICR4_EXTI14655360
+SYSCFG_EXTICR4_EXTI14_PA655360
+SYSCFG_EXTICR4_EXTI14_PB655360
+SYSCFG_EXTICR4_EXTI14_PC655360
+SYSCFG_EXTICR4_EXTI14_PD655360
+SYSCFG_EXTICR4_EXTI14_PE655360
+SYSCFG_EXTICR4_EXTI15655360
+SYSCFG_EXTICR4_EXTI15_PA655360
+SYSCFG_EXTICR4_EXTI15_PB655360
+SYSCFG_EXTICR4_EXTI15_PC655360
+SYSCFG_EXTICR4_EXTI15_PD655360
+SYSCFG_EXTICR4_EXTI15_PE655360
+StartHSE16()0inline void
+StartHSI4816()0inline void
+SysTick655360
+SysTick_BASE655360
+SysTick_CALIB_NOREF_Msk655360
+SysTick_CALIB_NOREF_Pos655360
+SysTick_CALIB_SKEW_Msk655360
+SysTick_CALIB_SKEW_Pos655360
+SysTick_CALIB_TENMS_Msk655360
+SysTick_CALIB_TENMS_Pos655360
+SysTick_CTRL_CLKSOURCE_Msk655360
+SysTick_CTRL_CLKSOURCE_Pos655360
+SysTick_CTRL_COUNTFLAG_Msk655360
+SysTick_CTRL_COUNTFLAG_Pos655360
+SysTick_CTRL_ENABLE_Msk655360
+SysTick_CTRL_ENABLE_Pos655360
+SysTick_CTRL_TICKINT_Msk655360
+SysTick_CTRL_TICKINT_Pos655360
+SysTick_LOAD_RELOAD_Msk655360
+SysTick_LOAD_RELOAD_Pos655360
+SysTick_VAL_CURRENT_Msk655360
+SysTick_VAL_CURRENT_Pos655360
+TEMP110_CAL_ADDR655360
+TEMP30_CAL_ADDR655360
+TIM1655360
+TIM14655360
+TIM14_BASE655360
+TIM14_OR_TI1_RMP655360
+TIM14_OR_TI1_RMP_0655360
+TIM14_OR_TI1_RMP_1655360
+TIM16655360
+TIM16_BASE655360
+TIM17655360
+TIM17_BASE655360
+TIM1_BASE655360
+TIM2655360
+TIM2_BASE655360
+TIM3655360
+TIM3_BASE655360
+TIMEOUT_MS655360
+TIM_ARR_ARR655360
+TIM_BDTR_AOE655360
+TIM_BDTR_BKE655360
+TIM_BDTR_BKP655360
+TIM_BDTR_DTG655360
+TIM_BDTR_DTG_0655360
+TIM_BDTR_DTG_1655360
+TIM_BDTR_DTG_2655360
+TIM_BDTR_DTG_3655360
+TIM_BDTR_DTG_4655360
+TIM_BDTR_DTG_5655360
+TIM_BDTR_DTG_6655360
+TIM_BDTR_DTG_7655360
+TIM_BDTR_LOCK655360
+TIM_BDTR_LOCK_0655360
+TIM_BDTR_LOCK_1655360
+TIM_BDTR_MOE655360
+TIM_BDTR_OSSI655360
+TIM_BDTR_OSSR655360
+TIM_CCER_CC1E655360
+TIM_CCER_CC1NE655360
+TIM_CCER_CC1NP655360
+TIM_CCER_CC1P655360
+TIM_CCER_CC2E655360
+TIM_CCER_CC2NE655360
+TIM_CCER_CC2NP655360
+TIM_CCER_CC2P655360
+TIM_CCER_CC3E655360
+TIM_CCER_CC3NE655360
+TIM_CCER_CC3NP655360
+TIM_CCER_CC3P655360
+TIM_CCER_CC4E655360
+TIM_CCER_CC4NP655360
+TIM_CCER_CC4P655360
+TIM_CCMR1_CC1S655360
+TIM_CCMR1_CC1S_0655360
+TIM_CCMR1_CC1S_1655360
+TIM_CCMR1_CC2S655360
+TIM_CCMR1_CC2S_0655360
+TIM_CCMR1_CC2S_1655360
+TIM_CCMR1_IC1F655360
+TIM_CCMR1_IC1F_0655360
+TIM_CCMR1_IC1F_1655360
+TIM_CCMR1_IC1F_2655360
+TIM_CCMR1_IC1F_3655360
+TIM_CCMR1_IC1PSC655360
+TIM_CCMR1_IC1PSC_0655360
+TIM_CCMR1_IC1PSC_1655360
+TIM_CCMR1_IC2F655360
+TIM_CCMR1_IC2F_0655360
+TIM_CCMR1_IC2F_1655360
+TIM_CCMR1_IC2F_2655360
+TIM_CCMR1_IC2F_3655360
+TIM_CCMR1_IC2PSC655360
+TIM_CCMR1_IC2PSC_0655360
+TIM_CCMR1_IC2PSC_1655360
+TIM_CCMR1_OC1CE655360
+TIM_CCMR1_OC1FE655360
+TIM_CCMR1_OC1M655360
+TIM_CCMR1_OC1M_0655360
+TIM_CCMR1_OC1M_1655360
+TIM_CCMR1_OC1M_2655360
+TIM_CCMR1_OC1PE655360
+TIM_CCMR1_OC2CE655360
+TIM_CCMR1_OC2FE655360
+TIM_CCMR1_OC2M655360
+TIM_CCMR1_OC2M_0655360
+TIM_CCMR1_OC2M_1655360
+TIM_CCMR1_OC2M_2655360
+TIM_CCMR1_OC2PE655360
+TIM_CCMR2_CC3S655360
+TIM_CCMR2_CC3S_0655360
+TIM_CCMR2_CC3S_1655360
+TIM_CCMR2_CC4S655360
+TIM_CCMR2_CC4S_0655360
+TIM_CCMR2_CC4S_1655360
+TIM_CCMR2_IC3F655360
+TIM_CCMR2_IC3F_0655360
+TIM_CCMR2_IC3F_1655360
+TIM_CCMR2_IC3F_2655360
+TIM_CCMR2_IC3F_3655360
+TIM_CCMR2_IC3PSC655360
+TIM_CCMR2_IC3PSC_0655360
+TIM_CCMR2_IC3PSC_1655360
+TIM_CCMR2_IC4F655360
+TIM_CCMR2_IC4F_0655360
+TIM_CCMR2_IC4F_1655360
+TIM_CCMR2_IC4F_2655360
+TIM_CCMR2_IC4F_3655360
+TIM_CCMR2_IC4PSC655360
+TIM_CCMR2_IC4PSC_0655360
+TIM_CCMR2_IC4PSC_1655360
+TIM_CCMR2_OC3CE655360
+TIM_CCMR2_OC3FE655360
+TIM_CCMR2_OC3M655360
+TIM_CCMR2_OC3M_0655360
+TIM_CCMR2_OC3M_1655360
+TIM_CCMR2_OC3M_2655360
+TIM_CCMR2_OC3PE655360
+TIM_CCMR2_OC4CE655360
+TIM_CCMR2_OC4FE655360
+TIM_CCMR2_OC4M655360
+TIM_CCMR2_OC4M_0655360
+TIM_CCMR2_OC4M_1655360
+TIM_CCMR2_OC4M_2655360
+TIM_CCMR2_OC4PE655360
+TIM_CCR1_CCR1655360
+TIM_CCR2_CCR2655360
+TIM_CCR3_CCR3655360
+TIM_CCR4_CCR4655360
+TIM_CNT_CNT655360
+TIM_CR1_ARPE655360
+TIM_CR1_CEN655360
+TIM_CR1_CKD655360
+TIM_CR1_CKD_0655360
+TIM_CR1_CKD_1655360
+TIM_CR1_CMS655360
+TIM_CR1_CMS_0655360
+TIM_CR1_CMS_1655360
+TIM_CR1_DIR655360
+TIM_CR1_OPM655360
+TIM_CR1_UDIS655360
+TIM_CR1_URS655360
+TIM_CR2_CCDS655360
+TIM_CR2_CCPC655360
+TIM_CR2_CCUS655360
+TIM_CR2_MMS655360
+TIM_CR2_MMS_0655360
+TIM_CR2_MMS_1655360
+TIM_CR2_MMS_2655360
+TIM_CR2_OIS1655360
+TIM_CR2_OIS1N655360
+TIM_CR2_OIS2655360
+TIM_CR2_OIS2N655360
+TIM_CR2_OIS3655360
+TIM_CR2_OIS3N655360
+TIM_CR2_OIS4655360
+TIM_CR2_TI1S655360
+TIM_DCR_DBA655360
+TIM_DCR_DBA_0655360
+TIM_DCR_DBA_1655360
+TIM_DCR_DBA_2655360
+TIM_DCR_DBA_3655360
+TIM_DCR_DBA_4655360
+TIM_DCR_DBL655360
+TIM_DCR_DBL_0655360
+TIM_DCR_DBL_1655360
+TIM_DCR_DBL_2655360
+TIM_DCR_DBL_3655360
+TIM_DCR_DBL_4655360
+TIM_DIER_BIE655360
+TIM_DIER_CC1DE655360
+TIM_DIER_CC1IE655360
+TIM_DIER_CC2DE655360
+TIM_DIER_CC2IE655360
+TIM_DIER_CC3DE655360
+TIM_DIER_CC3IE655360
+TIM_DIER_CC4DE655360
+TIM_DIER_CC4IE655360
+TIM_DIER_COMDE655360
+TIM_DIER_COMIE655360
+TIM_DIER_TDE655360
+TIM_DIER_TIE655360
+TIM_DIER_UDE655360
+TIM_DIER_UIE655360
+TIM_DMAR_DMAB655360
+TIM_EGR_BG655360
+TIM_EGR_CC1G655360
+TIM_EGR_CC2G655360
+TIM_EGR_CC3G655360
+TIM_EGR_CC4G655360
+TIM_EGR_COMG655360
+TIM_EGR_TG655360
+TIM_EGR_UG655360
+TIM_PSC_PSC655360
+TIM_RCR_REP655360
+TIM_SMCR_ECE655360
+TIM_SMCR_ETF655360
+TIM_SMCR_ETF_0655360
+TIM_SMCR_ETF_1655360
+TIM_SMCR_ETF_2655360
+TIM_SMCR_ETF_3655360
+TIM_SMCR_ETP655360
+TIM_SMCR_ETPS655360
+TIM_SMCR_ETPS_0655360
+TIM_SMCR_ETPS_1655360
+TIM_SMCR_MSM655360
+TIM_SMCR_OCCS655360
+TIM_SMCR_SMS655360
+TIM_SMCR_SMS_0655360
+TIM_SMCR_SMS_1655360
+TIM_SMCR_SMS_2655360
+TIM_SMCR_TS655360
+TIM_SMCR_TS_0655360
+TIM_SMCR_TS_1655360
+TIM_SMCR_TS_2655360
+TIM_SR_BIF655360
+TIM_SR_CC1IF655360
+TIM_SR_CC1OF655360
+TIM_SR_CC2IF655360
+TIM_SR_CC2OF655360
+TIM_SR_CC3IF655360
+TIM_SR_CC3OF655360
+TIM_SR_CC4IF655360
+TIM_SR_CC4OF655360
+TIM_SR_COMIF655360
+TIM_SR_TIF655360
+TIM_SR_UIF655360
+TRUE_INLINE655360
+TSC655360
+TSC_BASE655360
+TSC_CR_AM655360
+TSC_CR_CTPH655360
+TSC_CR_CTPH_0655360
+TSC_CR_CTPH_1655360
+TSC_CR_CTPH_2655360
+TSC_CR_CTPH_3655360
+TSC_CR_CTPL655360
+TSC_CR_CTPL_0655360
+TSC_CR_CTPL_1655360
+TSC_CR_CTPL_2655360
+TSC_CR_CTPL_3655360
+TSC_CR_IODEF655360
+TSC_CR_MCV655360
+TSC_CR_MCV_0655360
+TSC_CR_MCV_1655360
+TSC_CR_MCV_2655360
+TSC_CR_PGPSC655360
+TSC_CR_PGPSC_0655360
+TSC_CR_PGPSC_1655360
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+TSC_CR_SSD655360
+TSC_CR_SSD_0655360
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+TSC_CR_SSD_2655360
+TSC_CR_SSD_3655360
+TSC_CR_SSD_4655360
+TSC_CR_SSD_5655360
+TSC_CR_SSD_6655360
+TSC_CR_SSE655360
+TSC_CR_SSPSC655360
+TSC_CR_START655360
+TSC_CR_SYNCPOL655360
+TSC_CR_TSCE655360
+TSC_ICR_EOAIC655360
+TSC_ICR_MCEIC655360
+TSC_IER_EOAIE655360
+TSC_IER_MCEIE655360
+TSC_IOASCR_G1_IO1655360
+TSC_IOASCR_G1_IO2655360
+TSC_IOASCR_G1_IO3655360
+TSC_IOASCR_G1_IO4655360
+TSC_IOASCR_G2_IO1655360
+TSC_IOASCR_G2_IO2655360
+TSC_IOASCR_G2_IO3655360
+TSC_IOASCR_G2_IO4655360
+TSC_IOASCR_G3_IO1655360
+TSC_IOASCR_G3_IO2655360
+TSC_IOASCR_G3_IO3655360
+TSC_IOASCR_G3_IO4655360
+TSC_IOASCR_G4_IO1655360
+TSC_IOASCR_G4_IO2655360
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+TSC_IOASCR_G4_IO4655360
+TSC_IOASCR_G5_IO1655360
+TSC_IOASCR_G5_IO2655360
+TSC_IOASCR_G5_IO3655360
+TSC_IOASCR_G5_IO4655360
+TSC_IOASCR_G6_IO1655360
+TSC_IOASCR_G6_IO2655360
+TSC_IOASCR_G6_IO3655360
+TSC_IOASCR_G6_IO4655360
+TSC_IOASCR_G7_IO1655360
+TSC_IOASCR_G7_IO2655360
+TSC_IOASCR_G7_IO3655360
+TSC_IOASCR_G7_IO4655360
+TSC_IOASCR_G8_IO1655360
+TSC_IOASCR_G8_IO2655360
+TSC_IOASCR_G8_IO3655360
+TSC_IOASCR_G8_IO4655360
+TSC_IOCCR_G1_IO1655360
+TSC_IOCCR_G1_IO2655360
+TSC_IOCCR_G1_IO3655360
+TSC_IOCCR_G1_IO4655360
+TSC_IOCCR_G2_IO1655360
+TSC_IOCCR_G2_IO2655360
+TSC_IOCCR_G2_IO3655360
+TSC_IOCCR_G2_IO4655360
+TSC_IOCCR_G3_IO1655360
+TSC_IOCCR_G3_IO2655360
+TSC_IOCCR_G3_IO3655360
+TSC_IOCCR_G3_IO4655360
+TSC_IOCCR_G4_IO1655360
+TSC_IOCCR_G4_IO2655360
+TSC_IOCCR_G4_IO3655360
+TSC_IOCCR_G4_IO4655360
+TSC_IOCCR_G5_IO1655360
+TSC_IOCCR_G5_IO2655360
+TSC_IOCCR_G5_IO3655360
+TSC_IOCCR_G5_IO4655360
+TSC_IOCCR_G6_IO1655360
+TSC_IOCCR_G6_IO2655360
+TSC_IOCCR_G6_IO3655360
+TSC_IOCCR_G6_IO4655360
+TSC_IOCCR_G7_IO1655360
+TSC_IOCCR_G7_IO2655360
+TSC_IOCCR_G7_IO3655360
+TSC_IOCCR_G7_IO4655360
+TSC_IOCCR_G8_IO1655360
+TSC_IOCCR_G8_IO2655360
+TSC_IOCCR_G8_IO3655360
+TSC_IOCCR_G8_IO4655360
+TSC_IOGCSR_G1E655360
+TSC_IOGCSR_G1S655360
+TSC_IOGCSR_G2E655360
+TSC_IOGCSR_G2S655360
+TSC_IOGCSR_G3E655360
+TSC_IOGCSR_G3S655360
+TSC_IOGCSR_G4E655360
+TSC_IOGCSR_G4S655360
+TSC_IOGCSR_G5E655360
+TSC_IOGCSR_G5S655360
+TSC_IOGCSR_G6E655360
+TSC_IOGCSR_G6S655360
+TSC_IOGCSR_G7E655360
+TSC_IOGCSR_G7S655360
+TSC_IOGCSR_G8E655360
+TSC_IOGCSR_G8S655360
+TSC_IOGXCR_CNT655360
+TSC_IOHCR_G1_IO1655360
+TSC_IOHCR_G1_IO2655360
+TSC_IOHCR_G1_IO3655360
+TSC_IOHCR_G1_IO4655360
+TSC_IOHCR_G2_IO1655360
+TSC_IOHCR_G2_IO2655360
+TSC_IOHCR_G2_IO3655360
+TSC_IOHCR_G2_IO4655360
+TSC_IOHCR_G3_IO1655360
+TSC_IOHCR_G3_IO2655360
+TSC_IOHCR_G3_IO3655360
+TSC_IOHCR_G3_IO4655360
+TSC_IOHCR_G4_IO1655360
+TSC_IOHCR_G4_IO2655360
+TSC_IOHCR_G4_IO3655360
+TSC_IOHCR_G4_IO4655360
+TSC_IOHCR_G5_IO1655360
+TSC_IOHCR_G5_IO2655360
+TSC_IOHCR_G5_IO3655360
+TSC_IOHCR_G5_IO4655360
+TSC_IOHCR_G6_IO1655360
+TSC_IOHCR_G6_IO2655360
+TSC_IOHCR_G6_IO3655360
+TSC_IOHCR_G6_IO4655360
+TSC_IOHCR_G7_IO1655360
+TSC_IOHCR_G7_IO2655360
+TSC_IOHCR_G7_IO3655360
+TSC_IOHCR_G7_IO4655360
+TSC_IOHCR_G8_IO1655360
+TSC_IOHCR_G8_IO2655360
+TSC_IOHCR_G8_IO3655360
+TSC_IOHCR_G8_IO4655360
+TSC_IOSCR_G1_IO1655360
+TSC_IOSCR_G1_IO2655360
+TSC_IOSCR_G1_IO3655360
+TSC_IOSCR_G1_IO4655360
+TSC_IOSCR_G2_IO1655360
+TSC_IOSCR_G2_IO2655360
+TSC_IOSCR_G2_IO3655360
+TSC_IOSCR_G2_IO4655360
+TSC_IOSCR_G3_IO1655360
+TSC_IOSCR_G3_IO2655360
+TSC_IOSCR_G3_IO3655360
+TSC_IOSCR_G3_IO4655360
+TSC_IOSCR_G4_IO1655360
+TSC_IOSCR_G4_IO2655360
+TSC_IOSCR_G4_IO3655360
+TSC_IOSCR_G4_IO4655360
+TSC_IOSCR_G5_IO1655360
+TSC_IOSCR_G5_IO2655360
+TSC_IOSCR_G5_IO3655360
+TSC_IOSCR_G5_IO4655360
+TSC_IOSCR_G6_IO1655360
+TSC_IOSCR_G6_IO2655360
+TSC_IOSCR_G6_IO3655360
+TSC_IOSCR_G6_IO4655360
+TSC_IOSCR_G7_IO1655360
+TSC_IOSCR_G7_IO2655360
+TSC_IOSCR_G7_IO3655360
+TSC_IOSCR_G7_IO4655360
+TSC_IOSCR_G8_IO1655360
+TSC_IOSCR_G8_IO2655360
+TSC_IOSCR_G8_IO3655360
+TSC_IOSCR_G8_IO4655360
+TSC_ISR_EOAF655360
+TSC_ISR_MCEF655360
+TXstatus40960anon_enum_0
+Tms163840volatile uint32_t
+Tms327680volatile uint32_t
+UARTBUFSZ655360
+UINT16_C131072(c)0
+UINT16_MAX655360
+UINT16_WIDTH655360
+UINT32_C131072(c)0
+UINT32_MAX655360
+UINT32_WIDTH655360
+UINT64_C131072(c)0
+UINT64_MAX655360
+UINT64_WIDTH655360
+UINT8_C131072(c)0
+UINT8_MAX655360
+UINT8_WIDTH655360
+UINTMAX_C131072(c)0
+UINTMAX_MAX655360
+UINTMAX_WIDTH655360
+UINTPTR_MAX655360
+UINTPTR_WIDTH655360
+UINT_FAST16_MAX655360
+UINT_FAST16_WIDTH655360
+UINT_FAST32_MAX655360
+UINT_FAST32_WIDTH655360
+UINT_FAST64_MAX655360
+UINT_FAST64_WIDTH655360
+UINT_FAST8_MAX655360
+UINT_FAST8_WIDTH655360
+UINT_LEAST16_MAX655360
+UINT_LEAST16_WIDTH655360
+UINT_LEAST32_MAX655360
+UINT_LEAST32_WIDTH655360
+UINT_LEAST64_MAX655360
+UINT_LEAST64_WIDTH655360
+UINT_LEAST8_MAX655360
+UINT_LEAST8_WIDTH655360
+USART1655360
+USART1_BASE655360
+USART2655360
+USART2_BASE655360
+USARTNUM655360
+USARTX655360
+USART_BRR_DIV_FRACTION655360
+USART_BRR_DIV_MANTISSA655360
+USART_CR1_CMIE655360
+USART_CR1_DEAT655360
+USART_CR1_DEAT_0655360
+USART_CR1_DEAT_1655360
+USART_CR1_DEAT_2655360
+USART_CR1_DEAT_3655360
+USART_CR1_DEAT_4655360
+USART_CR1_DEDT655360
+USART_CR1_DEDT_0655360
+USART_CR1_DEDT_1655360
+USART_CR1_DEDT_2655360
+USART_CR1_DEDT_3655360
+USART_CR1_DEDT_4655360
+USART_CR1_EOBIE655360
+USART_CR1_IDLEIE655360
+USART_CR1_M655360
+USART_CR1_M0655360
+USART_CR1_M1655360
+USART_CR1_MME655360
+USART_CR1_OVER8655360
+USART_CR1_PCE655360
+USART_CR1_PEIE655360
+USART_CR1_PS655360
+USART_CR1_RE655360
+USART_CR1_RTOIE655360
+USART_CR1_RXNEIE655360
+USART_CR1_TCIE655360
+USART_CR1_TE655360
+USART_CR1_TXEIE655360
+USART_CR1_UE655360
+USART_CR1_UESM655360
+USART_CR1_WAKE655360
+USART_CR2_ABREN655360
+USART_CR2_ABRMODE655360
+USART_CR2_ABRMODE_0655360
+USART_CR2_ABRMODE_1655360
+USART_CR2_ADD655360
+USART_CR2_ADDM7655360
+USART_CR2_ADD_SHIFT655360
+USART_CR2_ADD_VAL131072(x)0
+USART_CR2_CLKEN655360
+USART_CR2_CPHA655360
+USART_CR2_CPOL655360
+USART_CR2_DATAINV655360
+USART_CR2_LBCL655360
+USART_CR2_LBDIE655360
+USART_CR2_LBDL655360
+USART_CR2_LINEN655360
+USART_CR2_MSBFIRST655360
+USART_CR2_RTOEN655360
+USART_CR2_RXINV655360
+USART_CR2_STOP655360
+USART_CR2_STOP_0655360
+USART_CR2_STOP_1655360
+USART_CR2_SWAP655360
+USART_CR2_TXINV655360
+USART_CR3_CTSE655360
+USART_CR3_CTSIE655360
+USART_CR3_DDRE655360
+USART_CR3_DEM655360
+USART_CR3_DEP655360
+USART_CR3_DMAR655360
+USART_CR3_DMAT655360
+USART_CR3_EIE655360
+USART_CR3_HDSEL655360
+USART_CR3_IREN655360
+USART_CR3_IRLP655360
+USART_CR3_NACK655360
+USART_CR3_ONEBIT655360
+USART_CR3_OVRDIS655360
+USART_CR3_RTSE655360
+USART_CR3_SCARCNT655360
+USART_CR3_SCARCNT_0655360
+USART_CR3_SCARCNT_1655360
+USART_CR3_SCARCNT_2655360
+USART_CR3_SCEN655360
+USART_CR3_WUFIE655360
+USART_CR3_WUS655360
+USART_CR3_WUS_0655360
+USART_CR3_WUS_1655360
+USART_GTPR_GT655360
+USART_GTPR_PSC655360
+USART_ICR_CMCF655360
+USART_ICR_CTSCF655360
+USART_ICR_EOBCF655360
+USART_ICR_FECF655360
+USART_ICR_IDLECF655360
+USART_ICR_LBDCF655360
+USART_ICR_NCF655360
+USART_ICR_ORECF655360
+USART_ICR_PECF655360
+USART_ICR_RTOCF655360
+USART_ICR_TCCF655360
+USART_ICR_WUCF655360
+USART_ISR_ABRE655360
+USART_ISR_ABRF655360
+USART_ISR_BUSY655360
+USART_ISR_CMF655360
+USART_ISR_CTS655360
+USART_ISR_CTSIF655360
+USART_ISR_EOBF655360
+USART_ISR_FE655360
+USART_ISR_IDLE655360
+USART_ISR_LBDF655360
+USART_ISR_NE655360
+USART_ISR_ORE655360
+USART_ISR_PE655360
+USART_ISR_REACK655360
+USART_ISR_RTOF655360
+USART_ISR_RWU655360
+USART_ISR_RXNE655360
+USART_ISR_SBKF655360
+USART_ISR_TC655360
+USART_ISR_TEACK655360
+USART_ISR_TXE655360
+USART_ISR_WUF655360
+USART_RDR_RDR655360
+USART_RQR_ABRRQ655360
+USART_RQR_MMRQ655360
+USART_RQR_RXFRQ655360
+USART_RQR_SBKRQ655360
+USART_RQR_TXFRQ655360
+USART_RTOR_BLEN655360
+USART_RTOR_RTO655360
+USART_TDR_TDR655360
+USB655360
+USB_BASE655360
+USB_BCDR655360
+USB_BCDR_BCDEN655360
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+bufovr327680int
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+dlen163840int
+dma1_channel2_3_isr16()0void
+getCANaddr16()0uint8_t
+getCANaddr1024()0uint8_t
+gpio_setup16(void)0void
+gpio_setup1024(void)0void
+iwdg_setup16()0void
+linerdy163840volatile int
+linerdy327680volatile int
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+newline16()0void
+newline1024()0void
+nop131072()0
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+pin_write131072(gpioport,gpios)0
+printu16(uint32_t val)0void
+printu1024(uint32_t val)0void
+rbuf163840char
+rbufno163840int
+readCANaddr16()0void
+readCANaddr1024()0void
+recvdata163840char *
+strdupa131072(s)0
+strndupa131072(s,n)0
+sys_tick_handler16(void)0void
+sysreset16(void)0inline void
+tbuf163840char
+txrdy163840int
+txrdy327680int
+unix655360
+usart1_isr16()0void
+usart_getline16(char **line)0int
+usart_getline1024(char **line)0int
+usart_putchar16(const char ch)0void
+usart_putchar1024(const char ch)0void
+usart_send16(const char *str, int len)0TXstatus
+usart_send1024(const char *str, int len)0TXstatus
+usart_send_blocking16(const char *str, int len)0TXstatus
+usart_send_blocking1024(const char *str, int len)0TXstatus
+usart_setup16()0void
+usart_setup1024()0void
+usartovr131072()0
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diff --git a/F0-nolib/canbus/src/hardware.c b/F0-nolib/canbus/src/hardware.c
new file mode 100644
index 0000000..60cb1b5
--- /dev/null
+++ b/F0-nolib/canbus/src/hardware.c
@@ -0,0 +1,43 @@
+/*
+ * geany_encoding=koi8-r
+ * hardware.c - hardware-dependent macros & functions
+ *
+ * Copyright 2018 Edward V. Emelianov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ *
+ */
+
+#include "hardware.h"
+#include "usart.h"
+
+void gpio_setup(void){
+ // here we turn on clocking for all periph.
+ RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN | RCC_AHBENR_DMAEN;
+ // Set LEDS (PC13/14) as output
+ GPIOC->MODER = (GPIOC->MODER & ~(GPIO_MODER_MODER13 | GPIO_MODER_MODER14)
+ ) |
+ GPIO_MODER_MODER13_O | GPIO_MODER_MODER14_O;
+ // PB14(0), PB15(1), PA8(2) - CAN address, pullup inputs
+ GPIOA->PUPDR = (GPIOA->PUPDR & ~(GPIO_PUPDR_PUPDR8)
+ ) |
+ GPIO_PUPDR_PUPDR8_0;
+ GPIOB->PUPDR = (GPIOB->PUPDR & ~(GPIO_PUPDR_PUPDR14 | GPIO_PUPDR_PUPDR15)
+ ) |
+ GPIO_PUPDR_PUPDR14_0 | GPIO_PUPDR_PUPDR15_0;
+ pin_set(LED0_port, LED0_pin); // clear LEDs
+ pin_set(LED1_port, LED1_pin);
+}
diff --git a/F0-nolib/canbus/src/hardware.h b/F0-nolib/canbus/src/hardware.h
new file mode 100644
index 0000000..322653b
--- /dev/null
+++ b/F0-nolib/canbus/src/hardware.h
@@ -0,0 +1,52 @@
+/*
+ * geany_encoding=koi8-r
+ * hardware.h
+ *
+ * Copyright 2018 Edward V. Emelianov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ *
+ */
+#pragma once
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include "stm32f0.h"
+
+#define CONCAT(a,b) a ## b
+#define STR_HELPER(s) #s
+#define STR(s) STR_HELPER(s)
+
+#define FORMUSART(X) CONCAT(USART, X)
+#define USARTX FORMUSART(USARTNUM)
+
+// LEDS: 0 - PC13, 1 - PC14
+// LED0
+#define LED0_port GPIOC
+#define LED0_pin (1<<13)
+// LED1
+#define LED1_port GPIOC
+#define LED1_pin (1<<14)
+
+#define LED_blink(x) pin_toggle(x ## _port, x ## _pin)
+
+
+// CAN address - PB14(0), PB15(1), PA8(2)
+#define READ_CAN_INV_ADDR() (((GPIOA->IDR & (1<<8))>>6)|((GPIOB->IDR & (3<<14))>>14))
+
+void gpio_setup(void);
+
+#endif // __HARDWARE_H__
diff --git a/F0-nolib/canbus/src/ld/stm32f042k.ld b/F0-nolib/canbus/src/ld/stm32f042k.ld
new file mode 100644
index 0000000..e747253
--- /dev/null
+++ b/F0-nolib/canbus/src/ld/stm32f042k.ld
@@ -0,0 +1,12 @@
+/* Linker script for STM32F042x6, 32K flash, 6K RAM. */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 6K
+}
+
+/* Include the common ld script. */
+INCLUDE stm32f0.ld
+
diff --git a/F0-nolib/canbus/src/main.c b/F0-nolib/canbus/src/main.c
new file mode 100644
index 0000000..11a0d59
--- /dev/null
+++ b/F0-nolib/canbus/src/main.c
@@ -0,0 +1,123 @@
+/*
+ * main.c
+ *
+ * Copyright 2017 Edward V. Emelianoff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include "hardware.h"
+#include "usart.h"
+#include "can.h"
+
+volatile uint32_t Tms = 0;
+
+/* Called when systick fires */
+void sys_tick_handler(void){
+ ++Tms;
+}
+
+void iwdg_setup(){
+ /* Enable the peripheral clock RTC */
+ /* (1) Enable the LSI (40kHz) */
+ /* (2) Wait while it is not ready */
+ RCC->CSR |= RCC_CSR_LSION; /* (1) */
+ while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY); /* (2) */
+ /* Configure IWDG */
+ /* (1) Activate IWDG (not needed if done in option bytes) */
+ /* (2) Enable write access to IWDG registers */
+ /* (3) Set prescaler by 64 (1.6ms for each tick) */
+ /* (4) Set reload value to have a rollover each 2s */
+ /* (5) Check if flags are reset */
+ /* (6) Refresh counter */
+ IWDG->KR = IWDG_START; /* (1) */
+ IWDG->KR = IWDG_WRITE_ACCESS; /* (2) */
+ IWDG->PR = IWDG_PR_PR_1; /* (3) */
+ IWDG->RLR = 1250; /* (4) */
+ while(IWDG->SR); /* (5) */
+ IWDG->KR = IWDG_REFRESH; /* (6) */
+}
+
+int main(void){
+ uint32_t lastT = 0;
+ int L;
+ char *txt;
+ sysreset();
+ SysTick_Config(6000, 1);
+ gpio_setup();
+ usart_setup();
+ iwdg_setup();
+ readCANaddr();
+ CAN_setup();
+
+ SEND("Greetings! My address is ");
+ printu(getCANaddr());
+ newline();
+ if(RCC->CSR & RCC_CSR_IWDGRSTF){ // watchdog reset occured
+ SEND("WDGRESET=1\n");
+ }
+ if(RCC->CSR & RCC_CSR_SFTRSTF){ // software reset occured
+ SEND("SOFTRESET=1\n");
+ }
+ RCC->CSR |= RCC_CSR_RMVF; // remove reset flags
+
+ while (1){
+ IWDG->KR = IWDG_REFRESH; // refresh watchdog
+ if(lastT > Tms || Tms - lastT > 499){
+ LED_blink(LED0);
+ lastT = Tms;
+ }
+ can_proc();
+ if(usartrx()){ // usart1 received data, store in in buffer
+ L = usart_getline(&txt);
+ char _1st = txt[0];
+ if(L == 2 && txt[1] == '\n'){
+ L = 0;
+ switch(_1st){
+ case 'C':
+ can_send_dummy();
+ break;
+ case 'G':
+ SEND("Can address: ");
+ printu(getCANaddr());
+ newline();
+ break;
+ case 'R':
+ NVIC_SystemReset();
+ break;
+ case 'W':
+ SEND("Wait for reboot\n");
+ while(1){nop();};
+ break;
+ default: // help
+ SEND(
+ "'C' - send dummy byte over CAN\n"
+ "'G' - get CAN address\n"
+ "'R' - software reset\n"
+ "'W' - test watchdog\n"
+ );
+ break;
+ }
+ }
+ }
+ if(L){ // text waits for sending
+ while(LINE_BUSY == usart_send(txt, L));
+ L = 0;
+ }
+ }
+ return 0;
+}
+
diff --git a/F0-nolib/canbus/src/usart.c b/F0-nolib/canbus/src/usart.c
new file mode 100644
index 0000000..47c5e44
--- /dev/null
+++ b/F0-nolib/canbus/src/usart.c
@@ -0,0 +1,238 @@
+/*us
+ * usart.c
+ *
+ * Copyright 2017 Edward V. Emelianoff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#include "stm32f0.h"
+#include "hardware.h"
+#include "usart.h"
+#include
+
+extern volatile uint32_t Tms;
+static int datalen[2] = {0,0}; // received data line length (including '\n')
+
+volatile int linerdy = 0, // received data ready
+ dlen = 0, // length of data (including '\n') in current buffer
+ bufovr = 0, // input buffer overfull
+ txrdy = 1 // transmission done
+;
+
+
+int rbufno = 0; // current rbuf number
+static char rbuf[UARTBUFSZ][2], tbuf[UARTBUFSZ]; // receive & transmit buffers
+static char *recvdata = NULL;
+
+/**
+ * return length of received data (without trailing zero
+ */
+int usart_getline(char **line){
+ if(bufovr){
+ bufovr = 0;
+ linerdy = 0;
+ return 0;
+ }
+ *line = recvdata;
+ linerdy = 0;
+ return dlen;
+}
+
+TXstatus usart_send(const char *str, int len){
+ if(!txrdy) return LINE_BUSY;
+ if(len > UARTBUFSZ) return STR_TOO_LONG;
+ txrdy = 0;
+ memcpy(tbuf, str, len);
+#if USARTNUM == 2
+ DMA1_Channel4->CCR &= ~DMA_CCR_EN;
+ DMA1_Channel4->CNDTR = len;
+ DMA1_Channel4->CCR |= DMA_CCR_EN; // start transmission
+#elif USARTNUM == 1
+ DMA1_Channel2->CCR &= ~DMA_CCR_EN;
+ DMA1_Channel2->CNDTR = len;
+ DMA1_Channel2->CCR |= DMA_CCR_EN;
+#else
+#error "Not implemented"
+#endif
+ return ALL_OK;
+}
+
+TXstatus usart_send_blocking(const char *str, int len){
+ if(!txrdy) return LINE_BUSY;
+ int i;
+ bufovr = 0;
+ for(i = 0; i < len; ++i){
+ USARTX -> TDR = *str++;
+ while(!(USARTX->ISR & USART_ISR_TXE));
+ }
+ return ALL_OK;
+}
+
+void usart_putchar(const char ch){
+ while(!txrdy);
+ USARTX -> TDR = ch;
+ while(!(USARTX->ISR & USART_ISR_TXE));
+}
+
+void newline(){
+ while(!txrdy);
+ USARTX -> TDR = '\n';
+ while(!(USARTX->ISR & USART_ISR_TXE));
+}
+
+
+void usart_setup(){
+// Nucleo's USART2 connected to VCP proxy of st-link
+#if USARTNUM == 2
+ // setup pins: PA2 (Tx - AF1), PA15 (Rx - AF1)
+ // AF mode (AF1)
+ GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER2|GPIO_MODER_MODER15))\
+ | (GPIO_MODER_MODER2_AF | GPIO_MODER_MODER15_AF);
+ GPIOA->AFR[0] = (GPIOA->AFR[0] &~GPIO_AFRH_AFRH2) | 1 << (2 * 4); // PA2
+ GPIOA->AFR[1] = (GPIOA->AFR[1] &~GPIO_AFRH_AFRH7) | 1 << (7 * 4); // PA15
+ // DMA: Tx - Ch4
+ DMA1_Channel4->CPAR = (uint32_t) &USART2->TDR; // periph
+ DMA1_Channel4->CMAR = (uint32_t) tbuf; // mem
+ DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
+ // Tx CNDTR set @ each transmission due to data size
+ NVIC_SetPriority(DMA1_Channel4_5_IRQn, 3);
+ NVIC_EnableIRQ(DMA1_Channel4_5_IRQn);
+ NVIC_SetPriority(USART2_IRQn, 0);
+ // setup usart2
+ RCC->APB1ENR |= RCC_APB1ENR_USART2EN; // clock
+ // oversampling by16, 115200bps (fck=48mHz)
+ //USART2_BRR = 0x1a1; // 48000000 / 115200
+ USART2->BRR = 480000 / 1152;
+ USART2->CR3 = USART_CR3_DMAT; // enable DMA Tx
+ USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
+ while(!(USART2->ISR & USART_ISR_TC)); // polling idle frame Transmission
+ USART2->ICR |= USART_ICR_TCCF; // clear TC flag
+ USART2->CR1 |= USART_CR1_RXNEIE;
+ NVIC_EnableIRQ(USART2_IRQn);
+// USART1 of main board
+#elif USARTNUM == 1
+ // PA9 - Tx, PA10 - Rx (AF1)
+ GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER9 | GPIO_MODER_MODER10))\
+ | (GPIO_MODER_MODER9_AF | GPIO_MODER_MODER10_AF);
+ GPIOA->AFR[1] = (GPIOA->AFR[1] & ~(GPIO_AFRH_AFRH1 | GPIO_AFRH_AFRH2)) |
+ 1 << (1 * 4) | 1 << (2 * 4); // PA9, PA10
+ // USART1 Tx DMA - Channel2 (default value in SYSCFG_CFGR1)
+ DMA1_Channel2->CPAR = (uint32_t) &USART1->TDR; // periph
+ DMA1_Channel2->CMAR = (uint32_t) tbuf; // mem
+ DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
+ // Tx CNDTR set @ each transmission due to data size
+ NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3);
+ NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
+ NVIC_SetPriority(USART1_IRQn, 0);
+ // setup usart1
+ RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
+ USART1->BRR = 480000 / 1152;
+ USART1->CR3 = USART_CR3_DMAT; // enable DMA Tx
+ USART1->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
+ while(!(USART1->ISR & USART_ISR_TC)); // polling idle frame Transmission
+ USART1->ICR |= USART_ICR_TCCF; // clear TC flag
+ USART1->CR1 |= USART_CR1_RXNEIE;
+ NVIC_EnableIRQ(USART1_IRQn);
+#else
+#error "Not implemented"
+#endif
+}
+
+#if USARTNUM == 2
+void usart2_isr(){
+// USART1
+#elif USARTNUM == 1
+void usart1_isr(){
+#else
+#error "Not implemented"
+#endif
+ #ifdef CHECK_TMOUT
+ static uint32_t tmout = 0;
+ #endif
+ if(USARTX->ISR & USART_ISR_RXNE){ // RX not emty - receive next char
+ #ifdef CHECK_TMOUT
+ if(tmout && Tms >= tmout){ // set overflow flag
+ bufovr = 1;
+ datalen[rbufno] = 0;
+ }
+ tmout = Tms + TIMEOUT_MS;
+ if(!tmout) tmout = 1; // prevent 0
+ #endif
+ // read RDR clears flag
+ uint8_t rb = USARTX->RDR;
+ if(datalen[rbufno] < UARTBUFSZ){ // put next char into buf
+ rbuf[rbufno][datalen[rbufno]++] = rb;
+ if(rb == '\n'){ // got newline - line ready
+ linerdy = 1;
+ dlen = datalen[rbufno];
+ recvdata = rbuf[rbufno];
+ // prepare other buffer
+ rbufno = !rbufno;
+ datalen[rbufno] = 0;
+ #ifdef CHECK_TMOUT
+ // clear timeout at line end
+ tmout = 0;
+ #endif
+ }
+ }else{ // buffer overrun
+ bufovr = 1;
+ datalen[rbufno] = 0;
+ #ifdef CHECK_TMOUT
+ tmout = 0;
+ #endif
+ }
+ }
+}
+
+// print 32bit unsigned int
+void printu(uint32_t val){
+ char bufa[11], bufb[10];
+ int l = 0, bpos = 0;
+ if(!val){
+ bufa[0] = '0';
+ l = 1;
+ }else{
+ while(val){
+ bufb[l++] = val % 10 + '0';
+ val /= 10;
+ }
+ int i;
+ bpos += l;
+ for(i = 0; i < l; ++i){
+ bufa[--bpos] = bufb[i];
+ }
+ }
+ while(LINE_BUSY == usart_send_blocking(bufa, l+bpos));
+}
+
+#if USARTNUM == 2
+void dma1_channel4_5_isr(){
+ if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx
+ DMA1->IFCR |= DMA_IFCR_CTCIF4; // clear TC flag
+ txrdy = 1;
+ }
+}
+// USART1
+#elif USARTNUM == 1
+void dma1_channel2_3_isr(){
+ if(DMA1->ISR & DMA_ISR_TCIF2){ // Tx
+ DMA1->IFCR |= DMA_IFCR_CTCIF2; // clear TC flag
+ txrdy = 1;
+ }
+}
+#else
+#error "Not implemented"
+#endif
diff --git a/F0-nolib/canbus/src/usart.h b/F0-nolib/canbus/src/usart.h
new file mode 100644
index 0000000..f1d1d50
--- /dev/null
+++ b/F0-nolib/canbus/src/usart.h
@@ -0,0 +1,60 @@
+/*
+ * usart.h
+ *
+ * Copyright 2017 Edward V. Emelianoff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#pragma once
+#ifndef __USART_H__
+#define __USART_H__
+
+// input and output buffers size
+#define UARTBUFSZ (64)
+// timeout between data bytes
+#ifndef TIMEOUT_MS
+#define TIMEOUT_MS (1500)
+#endif
+
+// macro for static strings
+#define SEND(str) do{}while(LINE_BUSY == usart_send_blocking(str, sizeof(str)-1))
+
+#ifdef EBUG
+#define MSG(str) do{SEND(__FILE__ " (L" STR(__LINE__) "): " str);}while(0)
+#else
+#define MSG(str)
+#endif
+
+typedef enum{
+ ALL_OK,
+ LINE_BUSY,
+ STR_TOO_LONG
+} TXstatus;
+
+#define usartrx() (linerdy)
+#define usartovr() (bufovr)
+
+extern volatile int linerdy, bufovr, txrdy;
+
+void usart_setup();
+int usart_getline(char **line);
+TXstatus usart_send(const char *str, int len);
+TXstatus usart_send_blocking(const char *str, int len);
+void newline();
+void usart_putchar(const char ch);
+void printu(uint32_t val);
+
+#endif // __USART_H__
diff --git a/F0-nolib/inc/F0/stm32f0.h b/F0-nolib/inc/F0/stm32f0.h
index 7abda18..b220ed9 100644
--- a/F0-nolib/inc/F0/stm32f0.h
+++ b/F0-nolib/inc/F0/stm32f0.h
@@ -200,8 +200,8 @@ TRUE_INLINE void StartHSI48(){
/************************* ADC *************************/
/* inner termometer calibration values
- * Temp = (Vsense - V30)/Avg_Slope + 30
- * Avg_Slope = (V110 - V30) / (110 - 30)
+ * Temp = (V30 - Vsense)/Avg_Slope + 30
+ * Avg_Slope = (V30 - V110) / (110 - 30)
*/
#define TEMP110_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7C2))
#define TEMP30_CAL_ADDR ((uint16_t*) ((uint32_t) 0x1FFFF7B8))
@@ -216,6 +216,12 @@ TRUE_INLINE void StartHSI48(){
// set address/character match value
#define USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT)
+/************************* IWDG *************************/
+#define IWDG_REFRESH (uint32_t)(0x0000AAAA)
+#define IWDG_WRITE_ACCESS (uint32_t)(0x00005555)
+#define IWDG_START (uint32_t)(0x0000CCCC)
+
+
//#define do{}while(0)
diff --git a/README b/README
index 2d2bb57..033f72b 100644
--- a/README
+++ b/README
@@ -8,3 +8,6 @@ F1 - for STM32F103
WARNING!!!
arm-none-eabi-gcc from gentoo have a bug with division on F0.
Use toolchain from https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads instead!
+
+CMSIS-headers:
+https://github.com/modm-io/cmsis-header-stm32
\ No newline at end of file