Modify usbcan for using ringbuffer, refresh kicad schematic & PCB

2026-02-28 11:54:30 +03:00 · 2022-10-28 17:12:24 +03:00
parent 1dc60d18b5
commit 9467ea072a
41 changed files with 36617 additions and 0 deletions
--- a/F0:F030,F042,F072/usbcan_ringbuffer/hardware.c
+++ b/F0:F030,F042,F072/usbcan_ringbuffer/hardware.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the usbcanrb project.
+ * Copyright 2022 Edward V. Emelianov <edward.emelianoff@gmail.com>.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "hardware.h"
+
+uint8_t ledsON = 0;
+
+void gpio_setup(void){
+    RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
+    // Set LEDS (PB0/1) as output
+    pin_set(LED0_port, LED0_pin); // clear LEDs
+    pin_set(LED1_port, LED1_pin);
+    GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER0  | GPIO_MODER_MODER1)
+                    ) |
+                    GPIO_MODER_MODER0_O | GPIO_MODER_MODER1_O;
+}
+
+void iwdg_setup(){
+    uint32_t tmout = 16000000;
+    /* Enable the peripheral clock RTC */
+    /* (1) Enable the LSI (40kHz) */
+    /* (2) Wait while it is not ready */
+    RCC->CSR |= RCC_CSR_LSION; /* (1) */
+    while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY){if(--tmout == 0) break;} /* (2) */
+    /* Configure IWDG */
+    /* (1) Activate IWDG (not needed if done in option bytes) */
+    /* (2) Enable write access to IWDG registers */
+    /* (3) Set prescaler by 64 (1.6ms for each tick) */
+    /* (4) Set reload value to have a rollover each 2s */
+    /* (5) Check if flags are reset */
+    /* (6) Refresh counter */
+    IWDG->KR = IWDG_START; /* (1) */
+    IWDG->KR = IWDG_WRITE_ACCESS; /* (2) */
+    IWDG->PR = IWDG_PR_PR_1; /* (3) */
+    IWDG->RLR = 1250; /* (4) */
+    tmout = 16000000;
+    while(IWDG->SR){if(--tmout == 0) break;} /* (5) */
+    IWDG->KR = IWDG_REFRESH; /* (6) */
+}
+
+// pause in milliseconds for some purposes
+void pause_ms(uint32_t pause){
+    uint32_t Tnxt = Tms + pause;
+    while(Tms < Tnxt) nop();
+}
+
+void Jump2Boot(){
+    void (*SysMemBootJump)(void);
+    volatile uint32_t addr = 0x1FFFC800;
+    // reset systick
+    SysTick->CTRL = 0;
+    // reset clocks
+
+    RCC->APB1RSTR = RCC_APB1RSTR_CECRST    | RCC_APB1RSTR_DACRST    | RCC_APB1RSTR_PWRRST    | RCC_APB1RSTR_CRSRST  |
+                    RCC_APB1RSTR_CANRST    | RCC_APB1RSTR_USBRST    | RCC_APB1RSTR_I2C2RST   | RCC_APB1RSTR_I2C1RST |
+                    RCC_APB1RSTR_USART4RST | RCC_APB1RSTR_USART3RST | RCC_APB1RSTR_USART2RST | RCC_APB1RSTR_SPI2RST |
+                    RCC_APB1RSTR_WWDGRST   | RCC_APB1RSTR_TIM14RST  |
+#ifdef STM32F072xB
+            RCC_APB1RSTR_TIM7RST   | RCC_APB1RSTR_TIM6RST |
+#endif
+                    RCC_APB1RSTR_TIM3RST   | RCC_APB1RSTR_TIM2RST;
+    RCC->APB2RSTR = RCC_APB2RSTR_DBGMCURST | RCC_APB2RSTR_TIM17RST | RCC_APB2RSTR_TIM16RST |
+#ifdef STM32F072xB
+            RCC_APB2RSTR_TIM15RST |
+#endif
+                    RCC_APB2RSTR_USART1RST | RCC_APB2RSTR_SPI1RST  | RCC_APB2RSTR_TIM1RST  | RCC_APB2RSTR_ADCRST   | RCC_APB2RSTR_SYSCFGRST;
+    RCC->AHBRSTR = 0;
+    RCC->APB1RSTR = 0;
+    RCC->APB2RSTR = 0;
+    // remap memory to 0 (only for STM32F0)
+    SYSCFG->CFGR1 = 0x01; __DSB(); __ISB();
+    SysMemBootJump = (void (*)(void)) (*((uint32_t *)(addr + 4)));
+    // set main stack pointer
+    __set_MSP(*((uint32_t *)addr));
+    // jump to bootloader
+    SysMemBootJump();
+}