mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-02-28 03:44:30 +03:00
start working with DMA
This commit is contained in:
@@ -32,6 +32,7 @@ static uint8_t i2caddr = I2C_ADDREND; // current address in scan mode
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static volatile int I2Cbusy = 0, goterr = 0; // busy==1 when DMA active, goterr==1 if 't was error @ last sent
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static uint8_t I2Cbuf[I2C_BUFSIZE];
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static uint16_t i2cbuflen = 0; // buffer for DMA tx/rx and its len
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static volatile uint16_t dma_remain = 0; // remain bytes of DMA read/write
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static uint8_t bigendian = 0; // ==1 for big-endian 16-bit data
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static uint8_t dma16bit = 0; // 16-bit reading - possible need conversion from bigendian
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@@ -117,49 +118,49 @@ void i2c_setup(i2c_speed_t speed){
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// setup DMA for rx (tx==0) or tx (tx==1)
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// DMA channels: 7 - I2C1_Rx, 6 - I2C1_Tx
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static void i2cDMAsetup(int tx, uint16_t len){
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i2cbuflen = len;
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if(len > 255) len = 255;
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if(tx){
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DMA1_Channel6->CCR = DMATXCCR;
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DMA1_Channel6->CPAR = (uint32_t) &I2C1->TXDR;
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DMA1_Channel6->CMAR = (uint32_t) I2Cbuf;
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DMA1_Channel6->CNDTR = i2cbuflen = len;
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DMA1_Channel6->CNDTR = len;
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}else{
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DMA1_Channel7->CCR = DMARXCCR;
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DMA1_Channel7->CPAR = (uint32_t) &I2C1->RXDR;
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DMA1_Channel7->CMAR = (uint32_t) I2Cbuf;
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DMA1_Channel7->CNDTR = i2cbuflen = len;
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DMA1_Channel7->CNDTR = len;
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}
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}
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// return 1 if line busy (also show error message and clear busy flag)
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static uint8_t i2c_chkbusy(){
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// wait until bit set or clear; return 1 if OK, 0 in case of timeout
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static uint8_t waitISRbit(uint32_t bit, uint8_t isset){
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uint32_t waitwhile = (isset) ? 0 : bit; // wait until !=
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const char *errmsg = NULL;
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cntr = Tms;
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while(I2C1->ISR & I2C_ISR_BUSY){
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if(bit != I2C_ISR_RXNE){ U("ISR wait "); U(uhex2str(bit)); USND(isset ? "set" : "reset"); }
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while((I2C1->ISR & bit) == waitwhile){
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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errmsg = "NAK";
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goto goterr;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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U("i2c_chkbusy: Line busy;");
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U("I2c->ISR = "); USND(uhex2str(I2C1->ISR));
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I2C1->ICR = I2C_ICR_BERRCF;
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return 1; // line busy
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}
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}
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return 0;
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}
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static uint8_t tc_tmout(){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_TC)){
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IWDG->KR = IWDG_REFRESH;
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if(Tms - cntr > I2C_TIMEOUT){
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USND("i2c: TC timeout");
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return 1;
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errmsg = "timeout";
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goto goterr;
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}
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}
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return 1;
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goterr:
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U("wait ISR bit: "); USND(errmsg);
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U("I2c->ISR = "); USND(uhex2str(I2C1->ISR));
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I2C1->ICR = 0xff;
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return 0;
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}
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// start writing
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static uint8_t i2c_startw(uint8_t addr, uint16_t nbytes, uint8_t stop){
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if(i2c_chkbusy()) return 0;
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if(!waitISRbit(I2C_ISR_BUSY, 0)) return 0;
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I2C1->CR2 = nbytes << 16 | addr;
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if(stop){
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I2C1->CR2 |= I2C_CR2_AUTOEND; // autoend
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@@ -201,9 +202,9 @@ static uint8_t write_i2cs(uint8_t addr, uint8_t *data, uint16_t nbytes, uint8_t
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}
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cntr = Tms;
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if(stop){
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if(i2c_chkbusy()) return 0;
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if(!waitISRbit(I2C_ISR_BUSY, 0)) return 0;
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}else{ // repeated start
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if(tc_tmout()) return 0;
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if(!waitISRbit(I2C_ISR_TC, 1)) return 0;
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}
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return 1;
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}
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@@ -247,12 +248,14 @@ uint8_t write_i2c_dma16(uint8_t addr, uint16_t *data, uint16_t nwords){
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return 1;
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}
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// start reading
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static uint8_t i2c_startr(uint8_t addr, uint16_t nbytes){
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// read N bytes
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I2C1->CR2 = (nbytes<<16) | addr | I2C_CR2_RD_WRN;
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I2C1->CR2 |= I2C_CR2_START;
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I2C1->CR2 |= I2C_CR2_AUTOEND;
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// start reading of `nbytes` from `addr`; if `start`==`, set START
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static uint8_t i2c_startr(uint8_t addr, uint16_t nbytes, uint8_t start){
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uint32_t cr2 = addr | I2C_CR2_RD_WRN;
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if(nbytes > 255){
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nbytes = 255; cr2 |= I2C_CR2_RELOAD;
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}else cr2 |= I2C_CR2_AUTOEND;
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cr2 |= (nbytes << 16);
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I2C1->CR2 = (start) ? cr2 | I2C_CR2_START : cr2;
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return 1;
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}
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@@ -263,26 +266,33 @@ static uint8_t i2c_startr(uint8_t addr, uint16_t nbytes){
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* @return 1 if all OK, 0 if NACK or no device found
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*/
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static uint8_t *read_i2cb(uint8_t addr, uint16_t nbytes, uint8_t busychk){
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if(busychk && i2c_chkbusy()) return NULL;
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if(!i2c_startr(addr, nbytes)) return NULL;
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uint8_t i;
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for(i = 0; i < nbytes; ++i){
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cntr = Tms;
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while(!(I2C1->ISR & I2C_ISR_RXNE)){ // wait for data
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IWDG->KR = IWDG_REFRESH;
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if(I2C1->ISR & I2C_ISR_NACKF){
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I2C1->ICR |= I2C_ICR_NACKCF;
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USND("read_i2cb: NAK");
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return NULL;
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if(busychk && !waitISRbit(I2C_ISR_BUSY, 0)) return NULL;
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uint8_t start = 1;
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uint8_t *bptr = I2Cbuf;
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while(nbytes){
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U("Read "); U(u2str(nbytes)); USND(" bytes");
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if(!i2c_startr(addr, nbytes, start)) return NULL;
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if(nbytes < 256){
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for(int i = 0; i < nbytes; ++i){
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if(!waitISRbit(I2C_ISR_RXNE, 1)) goto tmout;
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*bptr++ = I2C1->RXDR;
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}
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if(Tms - cntr > I2C_TIMEOUT){
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USND("read_i2cb: Timeout");
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return NULL;
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while(waitISRbit(I2C_ISR_RXNE, 1)){
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U("OOOps! We have another byte: "); USND(uhex2str(I2C1->RXDR));
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}
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break;
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}else while(!(I2C1->ISR & I2C_ISR_TCR)){ // until first part read
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if(!waitISRbit(I2C_ISR_RXNE, 1)) goto tmout;
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*bptr++ = I2C1->RXDR;
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}
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I2Cbuf[i] = I2C1->RXDR;
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USND("next");
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nbytes -= 255;
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start = 0;
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}
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return I2Cbuf;
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tmout:
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USND("read I2C: Timeout");
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return NULL;
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}
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uint8_t *read_i2c(uint8_t addr, uint16_t nbytes){
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@@ -290,30 +300,29 @@ uint8_t *read_i2c(uint8_t addr, uint16_t nbytes){
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return read_i2cb(addr, nbytes, 1);
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}
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static uint8_t dmard(uint8_t addr, uint16_t nbytes){
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static uint8_t dmard(uint8_t addr, uint16_t nbytes, uint8_t stop){
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if(nbytes < 1 || nbytes > I2C_BUFSIZE) return 0;
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if(isI2Cbusy()) return 0;
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i2cDMAsetup(0, nbytes);
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goterr = 0;
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i2c_got_DMA = 0;
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if(!i2c_startr(addr, nbytes, stop)) return 0;
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dma_remain = nbytes > 255 ? nbytes - 255 : 0; // remainder after first read finish
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(void) I2C1->RXDR; // avoid wrong first byte
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DMA1_Channel7->CCR = DMARXCCR | DMA_CCR_EN; // init DMA before START sequence
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if(i2c_chkbusy() || !i2c_startr(addr, nbytes)){
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DMA1_Channel7->CCR = 0;
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return 0;
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}
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I2Cbusy = 1;
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return 1;
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}
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uint8_t read_i2c_dma(uint8_t addr, uint16_t nbytes){
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uint8_t got = dmard(addr, nbytes);
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uint8_t got = dmard(addr, nbytes, 1);
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if(got) dma16bit = 0;
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return got;
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}
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uint8_t read_i2c_dma16(uint8_t addr, uint16_t nwords){
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if(nwords > I2C_BUFSIZE/2) return 0; // what if `nwords` is very large? we should check it
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uint8_t got = dmard(addr, nwords<<1);
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uint8_t got = dmard(addr, nwords<<1, 1);
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if(got) dma16bit = 1;
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return got;
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}
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@@ -325,17 +334,26 @@ static void swapbytes(uint16_t *data, uint16_t datalen){
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}
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// read register reg
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uint8_t *read_i2c_reg(uint8_t addr, uint8_t reg, uint16_t nbytes){
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uint8_t *read_i2c_reg(uint8_t addr, uint8_t reg, uint16_t nbytes, uint8_t isdma){
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if(isI2Cbusy()) return NULL;
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if(!write_i2cs(addr, ®, 1, 0)) return NULL;
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if(isdma){
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if(dmard(addr, nbytes, 0)){ dma16bit = 0; return I2Cbuf;} // for DMA we just return something non-null to check OK
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return NULL;
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}
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return read_i2cb(addr, nbytes, 0);
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}
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// read 16bit register reg
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uint16_t *read_i2c_reg16(uint8_t addr, uint16_t reg16, uint16_t nwords){
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uint16_t *read_i2c_reg16(uint8_t addr, uint16_t reg16, uint16_t nwords, uint8_t isdma){
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if(isI2Cbusy() || nwords < 1 || nwords > I2C_BUFSIZE/2) return 0;
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if(bigendian) reg16 = __REV16(reg16);
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if(!write_i2cs(addr, (uint8_t*)®16, 2, 0)) return NULL;
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if(isdma){
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if(dmard(addr, nwords<<1, 0)){ dma16bit = 1; return (uint16_t*)I2Cbuf; }
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return NULL;
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}
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if(!read_i2cb(addr, nwords*2, 0)) return NULL;
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uint16_t *buf = (uint16_t*)I2Cbuf;
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if(bigendian) swapbytes(buf, nwords);
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@@ -403,8 +421,25 @@ void endianness(uint8_t isbig){
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static void I2C_isr(int rx){
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uint32_t isr = DMA1->ISR;
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DMA_Channel_TypeDef *ch = (rx) ? DMA1_Channel7 : DMA1_Channel6;
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if(isr & (DMA_ISR_TEIF6 | DMA_ISR_TEIF6)) goterr = 1;
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else if(rx) i2c_got_DMA = 1; // last transfer was Rx
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ch->CCR &= ~DMA_CCR_EN; // clear enable for further settings
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if(isr & (DMA_ISR_TEIF6 | DMA_ISR_TEIF7)){
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goterr = 1; goto ret;
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}
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if(dma_remain){ // receive/send next portion
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uint16_t len = (dma_remain > 255) ? 255 : dma_remain;
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ch->CNDTR = len;
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if(rx){
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if(!i2c_startr(0, dma_remain, 0)){
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goterr = 1; goto ret;
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}
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ch->CMAR += 255;
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}
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dma_remain -= len;
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ch->CCR |= DMA_CCR_EN;
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DMA1->IFCR = DMA_IFCR_CTCIF6 | DMA_IFCR_CTCIF7;
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return;
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}else if(rx) i2c_got_DMA = 1; // last transfer was Rx and all data read
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ret:
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ch->CCR = 0;
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I2Cbusy = 0;
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DMA1->IFCR = 0x0ff00000; // clear all flags for channel6/7
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