eddy/stm32samples
1
0
Fork 0
mirror of https://github.com/eddyem/stm32samples.git synced 2025-12-06 10:45:11 +03:00
Code Issues Packages Projects Releases Wiki Activity

make pdnuart blocking

Browse Source
This commit is contained in:
Edward Emelianov 2023-02-26 00:47:09 +03:00
parent 8b6a3e7c20
commit 8e4df528d9
16 changed files with 880 additions and 228 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
F3:F303/Multistepper/commonproto.c
View File

@ -22,6 +22,7 @@
#include "flash.h"
#include "hardware.h"
#include "hdr.h"
#include "pdnuart.h"
#include "proto.h"
#include "steppers.h"
#include "usb.h"
@ -271,6 +272,15 @@ errcodes cu_motreinit(uint8_t _U_ par, int32_t _U_ *val){
return ERR_OK;
}
errcodes cu_pdn(uint8_t par, int32_t *val){
uint8_t n = PARBASE(par);
if(ISSETTER(par)){
if(!pdnuart_writereg(0, n, *val)) return ERR_CANTRUN;
}
if(!pdnuart_readreg(0, n, (uint32_t*)val)) return ERR_CANTRUN;
return ERR_OK;
}
errcodes cu_ping(uint8_t _U_ par, int32_t _U_ *val){
return ERR_OK;
}
@ -438,5 +448,6 @@ const char* cancmds[CCMD_AMOUNT] = {
[CCMD_UDATA] = "udata",
[CCMD_USARTSTATUS] = "usartstatus",
[CCMD_VDRIVE] = "vdrive",
[CCMD_VFIVE] = "vfive"
[CCMD_VFIVE] = "vfive",
[CCMD_PDN] = "pdn"
};

5
F3:F303/Multistepper/commonproto.h
View File

@ -93,6 +93,7 @@ enum{
,CCMD_USARTSTATUS
,CCMD_VDRIVE
,CCMD_VFIVE
,CCMD_PDN
// should be the last:
,CCMD_AMOUNT // amount of common commands
};
@ -101,8 +102,6 @@ extern const fpointer cancmdlist[CCMD_AMOUNT];
extern const char* cancmds[CCMD_AMOUNT];
// all common functions
errcodes cu_ping(uint8_t par, int32_t *val);
// not realized yet
errcodes cu_abspos(uint8_t par, int32_t *val);
errcodes cu_accel(uint8_t par, int32_t *val);
errcodes cu_adc(uint8_t par, int32_t *val);
@ -126,6 +125,8 @@ errcodes cu_minspeed(uint8_t par, int32_t *val);
errcodes cu_motflags(uint8_t par, int32_t *val);
errcodes cu_motmul(uint8_t par, int32_t *val);
errcodes cu_motreinit(uint8_t par, int32_t *val);
errcodes cu_pdn(uint8_t par, int32_t *val);
errcodes cu_ping(uint8_t par, int32_t *val);
errcodes cu_relpos(uint8_t par, int32_t *val);
errcodes cu_relslow(uint8_t par, int32_t *val);
errcodes cu_saveconf(uint8_t par, int32_t *val);

4
F3:F303/Multistepper/hardware.c
View File

@ -123,8 +123,8 @@ TRUE_INLINE void gpio_setup(){
| MODER_I(7) | MODER_AF(8) | MODER_I(9) | MODER_AF(10) | MODER_I(11) | MODER_O(12) | MODER_AF(13)
| MODER_AF(14) | MODER_AF(15);
GPIOB->OSPEEDR = OSPEED_HI(0) | OSPEED_HI(5) | OSPEED_HI(8) | OSPEED_MED(13) | OSPEED_MED(14) | OSPEED_MED(15);
GPIOB->OTYPER = 0;
// USART2_Tx (PB3) and USART3_Tx (PB10) are also pullup
// USART2_Tx (PB3) and USART3_Tx (PB10) are pullup opendrain
GPIOB->OTYPER = OTYPER_OD(3) | OTYPER_OD(10);
GPIOB->PUPDR = PUPD_PU(3) | PUPD_PU(7) | PUPD_PU(9) | PUPD_PU(7) | PUPD_PU(11);
GPIOC->ODR = 0;

4
F3:F303/Multistepper/hashgen/hashgen.c
View File

@ -189,7 +189,7 @@ static const char *ffooter =
}\n\n"
;
static const char *fns =
"int fn_%s(_U_ uint32_t hash, _U_ char *args) WAL; // \"%s\" (%u)\n\n"
"int fn_%s(uint32_t _U_ hash, char _U_ *args) WAL; // \"%s\" (%u)\n\n"
;
static const char *headercontent =
"#ifndef _U_\n\
@ -215,7 +215,7 @@ static const char *srchdr =
#include \"%s\"\n\n\
#ifndef WAL\n\
#define WAL __attribute__ ((weak, alias (\"__f1\")))\n\
#endif\n\nstatic int __f1(_U_ uint32_t h, _U_ char *a){return 1;}\n\n"
#endif\n\nstatic int __f1(uint32_t _U_ h, char _U_ *a){return 1;}\n\n"
;
static void build(strhash *H, int hno, int hlen){

117
F3:F303/Multistepper/hashgen/hdr.c
View File

@ -8,117 +8,119 @@
#define WAL __attribute__ ((weak, alias ("__f1")))
#endif
static int __f1(_U_ uint32_t h, _U_ char *a){return 1;}
static int __f1(uint32_t _U_ h, char _U_ *a){return 1;}
int fn_abspos(_U_ uint32_t hash, _U_ char *args) WAL; // "abspos" (3056382221)
int fn_abspos(uint32_t _U_ hash, char _U_ *args) WAL; // "abspos" (3056382221)
int fn_accel(_U_ uint32_t hash, _U_ char *args) WAL; // "accel" (1490521981)
int fn_accel(uint32_t _U_ hash, char _U_ *args) WAL; // "accel" (1490521981)
int fn_adc(_U_ uint32_t hash, _U_ char *args) WAL; // "adc" (2963026093)
int fn_adc(uint32_t _U_ hash, char _U_ *args) WAL; // "adc" (2963026093)
int fn_button(_U_ uint32_t hash, _U_ char *args) WAL; // "button" (1093508897)
int fn_button(uint32_t _U_ hash, char _U_ *args) WAL; // "button" (1093508897)
int fn_canerrcodes(_U_ uint32_t hash, _U_ char *args) WAL; // "canerrcodes" (1736697870)
int fn_canerrcodes(uint32_t _U_ hash, char _U_ *args) WAL; // "canerrcodes" (1736697870)
int fn_canfilter(_U_ uint32_t hash, _U_ char *args) WAL; // "canfilter" (3964416573)
int fn_canfilter(uint32_t _U_ hash, char _U_ *args) WAL; // "canfilter" (3964416573)
int fn_canflood(_U_ uint32_t hash, _U_ char *args) WAL; // "canflood" (1235816779)
int fn_canflood(uint32_t _U_ hash, char _U_ *args) WAL; // "canflood" (1235816779)
int fn_canfloodt(_U_ uint32_t hash, _U_ char *args) WAL; // "canfloodT" (506574623)
int fn_canfloodt(uint32_t _U_ hash, char _U_ *args) WAL; // "canfloodT" (506574623)
int fn_canid(_U_ uint32_t hash, _U_ char *args) WAL; // "canid" (2040257924)
int fn_canid(uint32_t _U_ hash, char _U_ *args) WAL; // "canid" (2040257924)
int fn_canignore(_U_ uint32_t hash, _U_ char *args) WAL; // "canignore" (3209755195)
int fn_canignore(uint32_t _U_ hash, char _U_ *args) WAL; // "canignore" (3209755195)
int fn_canincrflood(_U_ uint32_t hash, _U_ char *args) WAL; // "canincrflood" (3987155959)
int fn_canincrflood(uint32_t _U_ hash, char _U_ *args) WAL; // "canincrflood" (3987155959)
int fn_canpause(_U_ uint32_t hash, _U_ char *args) WAL; // "canpause" (3981532373)
int fn_canpause(uint32_t _U_ hash, char _U_ *args) WAL; // "canpause" (3981532373)
int fn_canreinit(_U_ uint32_t hash, _U_ char *args) WAL; // "canreinit" (2030075842)
int fn_canreinit(uint32_t _U_ hash, char _U_ *args) WAL; // "canreinit" (2030075842)
int fn_canresume(_U_ uint32_t hash, _U_ char *args) WAL; // "canresume" (2051659720)
int fn_canresume(uint32_t _U_ hash, char _U_ *args) WAL; // "canresume" (2051659720)
int fn_cansend(_U_ uint32_t hash, _U_ char *args) WAL; // "cansend" (237136225)
int fn_cansend(uint32_t _U_ hash, char _U_ *args) WAL; // "cansend" (237136225)
int fn_canspeed(_U_ uint32_t hash, _U_ char *args) WAL; // "canspeed" (549265992)
int fn_canspeed(uint32_t _U_ hash, char _U_ *args) WAL; // "canspeed" (549265992)
int fn_canstat(_U_ uint32_t hash, _U_ char *args) WAL; // "canstat" (237384179)
int fn_canstat(uint32_t _U_ hash, char _U_ *args) WAL; // "canstat" (237384179)
int fn_diagn(_U_ uint32_t hash, _U_ char *args) WAL; // "diagn" (2334137736)
int fn_diagn(uint32_t _U_ hash, char _U_ *args) WAL; // "diagn" (2334137736)
int fn_dumpcmd(_U_ uint32_t hash, _U_ char *args) WAL; // "dumpcmd" (1223955823)
int fn_dumpcmd(uint32_t _U_ hash, char _U_ *args) WAL; // "dumpcmd" (1223955823)
int fn_dumpconf(_U_ uint32_t hash, _U_ char *args) WAL; // "dumpconf" (3271513185)
int fn_dumpconf(uint32_t _U_ hash, char _U_ *args) WAL; // "dumpconf" (3271513185)
int fn_dumperr(_U_ uint32_t hash, _U_ char *args) WAL; // "dumperr" (1223989764)
int fn_dumperr(uint32_t _U_ hash, char _U_ *args) WAL; // "dumperr" (1223989764)
int fn_dumpmotflags(_U_ uint32_t hash, _U_ char *args) WAL; // "dumpmotflags" (36159640)
int fn_dumpmotflags(uint32_t _U_ hash, char _U_ *args) WAL; // "dumpmotflags" (36159640)
int fn_dumpstates(_U_ uint32_t hash, _U_ char *args) WAL; // "dumpstates" (4235564367)
int fn_dumpstates(uint32_t _U_ hash, char _U_ *args) WAL; // "dumpstates" (4235564367)
int fn_emstop(_U_ uint32_t hash, _U_ char *args) WAL; // "emstop" (2965919005)
int fn_emstop(uint32_t _U_ hash, char _U_ *args) WAL; // "emstop" (2965919005)
int fn_eraseflash(_U_ uint32_t hash, _U_ char *args) WAL; // "eraseflash" (3177247267)
int fn_eraseflash(uint32_t _U_ hash, char _U_ *args) WAL; // "eraseflash" (3177247267)
int fn_esw(_U_ uint32_t hash, _U_ char *args) WAL; // "esw" (2963094612)
int fn_esw(uint32_t _U_ hash, char _U_ *args) WAL; // "esw" (2963094612)
int fn_eswreact(_U_ uint32_t hash, _U_ char *args) WAL; // "eswreact" (1614224995)
int fn_eswreact(uint32_t _U_ hash, char _U_ *args) WAL; // "eswreact" (1614224995)
int fn_goto(_U_ uint32_t hash, _U_ char *args) WAL; // "goto" (4286309438)
int fn_goto(uint32_t _U_ hash, char _U_ *args) WAL; // "goto" (4286309438)
int fn_gotoz(_U_ uint32_t hash, _U_ char *args) WAL; // "gotoz" (3178103736)
int fn_gotoz(uint32_t _U_ hash, char _U_ *args) WAL; // "gotoz" (3178103736)
int fn_gpio(_U_ uint32_t hash, _U_ char *args) WAL; // "gpio" (4286324660)
int fn_gpio(uint32_t _U_ hash, char _U_ *args) WAL; // "gpio" (4286324660)
int fn_gpioconf(_U_ uint32_t hash, _U_ char *args) WAL; // "gpioconf" (1309721562)
int fn_gpioconf(uint32_t _U_ hash, char _U_ *args) WAL; // "gpioconf" (1309721562)
int fn_maxspeed(_U_ uint32_t hash, _U_ char *args) WAL; // "maxspeed" (1498078812)
int fn_maxspeed(uint32_t _U_ hash, char _U_ *args) WAL; // "maxspeed" (1498078812)
int fn_maxsteps(_U_ uint32_t hash, _U_ char *args) WAL; // "maxsteps" (1506667002)
int fn_maxsteps(uint32_t _U_ hash, char _U_ *args) WAL; // "maxsteps" (1506667002)
int fn_mcut(_U_ uint32_t hash, _U_ char *args) WAL; // "mcut" (4022718)
int fn_mcut(uint32_t _U_ hash, char _U_ *args) WAL; // "mcut" (4022718)
int fn_mcuvdd(_U_ uint32_t hash, _U_ char *args) WAL; // "mcuvdd" (2517587080)
int fn_mcuvdd(uint32_t _U_ hash, char _U_ *args) WAL; // "mcuvdd" (2517587080)
int fn_microsteps(_U_ uint32_t hash, _U_ char *args) WAL; // "microsteps" (3974395854)
int fn_microsteps(uint32_t _U_ hash, char _U_ *args) WAL; // "microsteps" (3974395854)
int fn_minspeed(_U_ uint32_t hash, _U_ char *args) WAL; // "minspeed" (3234848090)
int fn_minspeed(uint32_t _U_ hash, char _U_ *args) WAL; // "minspeed" (3234848090)
int fn_motflags(_U_ uint32_t hash, _U_ char *args) WAL; // "motflags" (2153634658)
int fn_motflags(uint32_t _U_ hash, char _U_ *args) WAL; // "motflags" (2153634658)
int fn_motmul(_U_ uint32_t hash, _U_ char *args) WAL; // "motmul" (1543400099)
int fn_motmul(uint32_t _U_ hash, char _U_ *args) WAL; // "motmul" (1543400099)
int fn_motreinit(_U_ uint32_t hash, _U_ char *args) WAL; // "motreinit" (199682784)
int fn_motreinit(uint32_t _U_ hash, char _U_ *args) WAL; // "motreinit" (199682784)
int fn_ping(_U_ uint32_t hash, _U_ char *args) WAL; // "ping" (10561715)
int fn_pdn(uint32_t _U_ hash, char _U_ *args) WAL; // "pdn" (2963275719)
int fn_relpos(_U_ uint32_t hash, _U_ char *args) WAL; // "relpos" (1278646042)
int fn_ping(uint32_t _U_ hash, char _U_ *args) WAL; // "ping" (10561715)
int fn_relslow(_U_ uint32_t hash, _U_ char *args) WAL; // "relslow" (1742971917)
int fn_relpos(uint32_t _U_ hash, char _U_ *args) WAL; // "relpos" (1278646042)
int fn_reset(_U_ uint32_t hash, _U_ char *args) WAL; // "reset" (1907803304)
int fn_relslow(uint32_t _U_ hash, char _U_ *args) WAL; // "relslow" (1742971917)
int fn_saveconf(_U_ uint32_t hash, _U_ char *args) WAL; // "saveconf" (141102426)
int fn_reset(uint32_t _U_ hash, char _U_ *args) WAL; // "reset" (1907803304)
int fn_screen(_U_ uint32_t hash, _U_ char *args) WAL; // "screen" (2100809349)
int fn_saveconf(uint32_t _U_ hash, char _U_ *args) WAL; // "saveconf" (141102426)
int fn_speedlimit(_U_ uint32_t hash, _U_ char *args) WAL; // "speedlimit" (1654184245)
int fn_screen(uint32_t _U_ hash, char _U_ *args) WAL; // "screen" (2100809349)
int fn_state(_U_ uint32_t hash, _U_ char *args) WAL; // "state" (2216628902)
int fn_speedlimit(uint32_t _U_ hash, char _U_ *args) WAL; // "speedlimit" (1654184245)
int fn_stop(_U_ uint32_t hash, _U_ char *args) WAL; // "stop" (17184971)
int fn_state(uint32_t _U_ hash, char _U_ *args) WAL; // "state" (2216628902)
int fn_time(_U_ uint32_t hash, _U_ char *args) WAL; // "time" (19148340)
int fn_stop(uint32_t _U_ hash, char _U_ *args) WAL; // "stop" (17184971)
int fn_tmcbus(_U_ uint32_t hash, _U_ char *args) WAL; // "tmcbus" (1906135955)
int fn_time(uint32_t _U_ hash, char _U_ *args) WAL; // "time" (19148340)
int fn_udata(_U_ uint32_t hash, _U_ char *args) WAL; // "udata" (2736127636)
int fn_tmcbus(uint32_t _U_ hash, char _U_ *args) WAL; // "tmcbus" (1906135955)
int fn_usartstatus(_U_ uint32_t hash, _U_ char *args) WAL; // "usartstatus" (4007098968)
int fn_udata(uint32_t _U_ hash, char _U_ *args) WAL; // "udata" (2736127636)
int fn_vdrive(_U_ uint32_t hash, _U_ char *args) WAL; // "vdrive" (2172773525)
int fn_usartstatus(uint32_t _U_ hash, char _U_ *args) WAL; // "usartstatus" (4007098968)
int fn_vfive(_U_ uint32_t hash, _U_ char *args) WAL; // "vfive" (3017477285)
int fn_vdrive(uint32_t _U_ hash, char _U_ *args) WAL; // "vdrive" (2172773525)
int fn_vfive(uint32_t _U_ hash, char _U_ *args) WAL; // "vfive" (3017477285)
static uint32_t hashf(const char *str){
uint32_t hash = 5381;
@ -261,6 +263,9 @@ int parsecmd(const char *str){
case CMD_MOTREINIT:
return fn_motreinit(h, args);
break;
case CMD_PDN:
return fn_pdn(h, args);
break;
case CMD_PING:
return fn_ping(h, args);
break;

1
F3:F303/Multistepper/hashgen/hdr.h
View File

@ -53,6 +53,7 @@ int parsecmd(const char *cmdwargs);
#define CMD_MOTFLAGS (2153634658)
#define CMD_MOTMUL (1543400099)
#define CMD_MOTREINIT (199682784)
#define CMD_PDN (2963275719)
#define CMD_PING (10561715)
#define CMD_RELPOS (1278646042)
#define CMD_RELSLOW (1742971917)

1
F3:F303/Multistepper/hashgen/helpcmds.in
View File

@ -38,6 +38,7 @@
"motflagsN - motorN flags\n"
"motmul* - GS external multiplexer status (<0 - disable, 0..7 - enable and set address)\n"
"motreinit - re-init motors after configuration changed\n"
"pdnN - GS read/write TMC2209 registers over uart @ motor0\n"
"ping - echo given command back\n"
"relposN - GS relative move (get remaining)\n"
"relslowN - GS like 'relpos' but with slowest speed\n"

1
F3:F303/Multistepper/hashgen/testdic
View File

@ -38,6 +38,7 @@ minspeed
motflags
motmul
motreinit
pdn
ping
relpos
relslow

2
F3:F303/Multistepper/main.c
View File

@ -49,6 +49,7 @@ int main(void){
USB_setup();
CAN_setup(the_conf.CANspeed);
adc_setup();
pdnuart_setup();
USBPU_ON();
uint32_t ctr = 0;
CAN_message *can_mesg;
@ -87,6 +88,5 @@ int main(void){
if(ans) USB_sendstr(ans);
}
process_keys();
pdnuart_poll();
}
}

BIN
F3:F303/Multistepper/multistepper.bin
View File

Binary file not shown.

1
F3:F303/Multistepper/multistepper.files
View File

@ -25,6 +25,7 @@ steppers.c
steppers.h
strfunc.c
strfunc.h
tmc2209.h
usb.c
usb.h
usb_lib.c

181
F3:F303/Multistepper/pdnuart.c
View File

@ -24,101 +24,70 @@
extern volatile uint32_t Tms;
#define MAXBUFLEN (8)
// Rx timeout, ms
#define PDNUART_TIMEOUT (20)
// timeout, milliseconds
#define PDNU_TMOUT (5)
// buffers format: 0 - sync+reserved, 1 - address (0..3 - slave, 0xff - master)
// 2 - register<<1 | RW, 3 - CRC (r) or [ 3..6 - MSB data, 7 - CRC ]
// buf[0] - USART2, buf[1] - USART3
static uint8_t inbuf[2][MAXBUFLEN], outbuf[2][MAXBUFLEN];
static uint8_t Taccess[2] = {0}; // last access time
static int curslaveaddr[2] = {-1, -1}; // current slave address for each USART (0..3)
static uint8_t notfound = 0; // not found mask (LSB - 0, MSB - 7)
static uint8_t readrq[2] = {0}; // ==1 for read request (after send wait to read)
// UART states
typedef enum{
PDU_IDLE,
PDU_TX,
PDU_TXREADY,
PDU_RX,
PDU_RXREADY
} pdnuart_state;
static pdnuart_state state[2] = {PDU_IDLE, PDU_IDLE};
//static uint8_t notfound = 0; // not found mask (LSB - 0, MSB - 7)
// datalen == 3 for read request or 7 for writing
static void calcCRC(int no, int datalen){
static void calcCRC(uint8_t *outbuf, int datalen){
uint8_t crc = 0;
for(int i = 0; i < datalen; ++i){
uint8_t currentByte = outbuf[no][i];
uint8_t currentByte = outbuf[i];
for(int j = 0; j < 8; ++j){
if((crc >> 7) ^ (currentByte & 0x01)) crc = (crc << 1) ^ 0x07;
else crc <<= 1;
currentByte = currentByte >> 1;
}
}
outbuf[no][datalen] = crc;
outbuf[datalen] = crc;
}
static volatile DMA_Channel_TypeDef *TxDMA[2] = {DMA1_Channel7, DMA1_Channel2};
static volatile DMA_Channel_TypeDef *RxDMA[2] = {DMA1_Channel6, DMA1_Channel3};
static volatile USART_TypeDef *USART[2] = {USART2, USART3};
static void setup_usart(int no){
USART[no]->ICR = 0xffffffff; // clear all flags
TxDMA[no]->CCR = 0;
TxDMA[no]->CPAR = (uint32_t) &USART[no]->TDR; // periph
TxDMA[no]->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
RxDMA[no]->CCR = 0;
RxDMA[no]->CPAR = (uint32_t) &USART[no]->RDR; // periph
RxDMA[no]->CCR |= DMA_CCR_MINC | DMA_CCR_TCIE; // 8bit, mem++, per->mem, transcompl irq
USART[no]->BRR = 72000000 / 256000; // 256 kbaud
USART[no]->CR3 = USART_CR3_DMAT | USART_CR3_DMAR; // enable DMA Tx/Rx
USART[no]->CR3 = USART_CR3_HDSEL; // enable DMA Tx/Rx, single wire
USART[no]->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
uint32_t tmout = 16000000;
while(!(USART[no]->ISR & USART_ISR_TC)){if(--tmout == 0) break;} // polling idle frame Transmission
USART[no]->ICR = 0xffffffff; // clear all flags again
}
// USART2 (ch0..3): DMA1ch6 (Rx), DMA1_ch7 (Tx)
// USART3 (ch4..7): DMA1ch3 (Rx), DMA1_ch2 (Tx)
// USART2 (ch0..3), USART3 (ch4..7)
// pins are setting up in `hardware.c`
void pdnuart_setup(){
RCC->APB1ENR |= RCC_APB1ENR_USART2EN | RCC_APB1ENR_USART3EN;
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
setup_usart(0);
setup_usart(1);
NVIC_EnableIRQ(DMA1_Channel2_IRQn);
NVIC_EnableIRQ(DMA1_Channel3_IRQn);
NVIC_EnableIRQ(DMA1_Channel6_IRQn);
NVIC_EnableIRQ(DMA1_Channel7_IRQn);
}
static int rwreg(uint8_t motorno, uint8_t reg, uint32_t data, int w){
if(motorno >= MOTORSNO || reg & 0x80) return FALSE;
int no = motorno >> 2;
if(state[no] != PDU_IDLE) return FALSE;
outbuf[no][0] = 0xa0;
outbuf[no][1] = curslaveaddr[no] = motorno - (no << 2);
outbuf[no][2] = reg << 1;
uint8_t outbuf[MAXBUFLEN];
outbuf[0] = 0xa0;
outbuf[1] = motorno - (no << 2);
outbuf[2] = reg << 1;
int nbytes = 3;
if(w){
outbuf[no][2] |= 1;
outbuf[2] |= 1;
for(int i = 6; i > 2; --i){
outbuf[no][i] = data & 0xff;
outbuf[i] = data & 0xff;
data >>= 8;
}
nbytes = 7;
readrq[no] = 0;
}else{
readrq[no] = 1;
}
calcCRC(no, nbytes);
TxDMA[no]->CMAR = (uint32_t) outbuf[no];
TxDMA[no]->CNDTR = nbytes + 1;
TxDMA[no]->CCR |= DMA_CCR_EN; // start transmission
state[no] = PDU_TX;
Taccess[no] = Tms;
calcCRC(outbuf, nbytes);
++nbytes;
for(int i = 0; i < nbytes; ++i){
USART[no]->TDR = outbuf[i]; // transmit
while(!(USART[no]->ISR & USART_ISR_TXE));
}
return TRUE;
}
@ -128,17 +97,27 @@ int pdnuart_writereg(uint8_t motorno, uint8_t reg, uint32_t data){
}
// return FALSE if failed
int pdnuart_readreg(uint8_t motorno, uint8_t reg){
return rwreg(motorno, reg, 0, 0);
}
static void disableDMA(int no){
TxDMA[no]->CCR &= ~DMA_CCR_EN;
RxDMA[no]->CCR &= ~DMA_CCR_EN;
readrq[no] = 0;
state[no] = PDU_IDLE;
int pdnuart_readreg(uint8_t motorno, uint8_t reg, uint32_t *data){
if(!rwreg(motorno, reg, 0, 0)) return FALSE;
uint32_t Tstart = Tms;
uint8_t buf[8];
int no = motorno >> 2;
for(int i = 0; i < 8; ++i){
while(!(USART[no]->ISR & USART_ISR_RXNE))
if(Tms - Tstart > PDNU_TMOUT) return FALSE;
buf[i] = USART[no]->RDR;
USB_sendstr("byte: "); printuhex(buf[i]); newline();
}
uint32_t o = 0;
for(int i = 3; i < 7; ++i){
o |= buf[i];
o <<= 8;
}
*data = o;
return TRUE;
}
/*
static void parseRx(int no){
USB_sendstr("Got from ");
USB_putbyte('#'); printu(curslaveaddr[no] + no*4); USB_sendstr(": ");
@ -147,84 +126,4 @@ static void parseRx(int no){
}
newline();
}
void pdnuart_poll(){
for(int i = 0; i < 2; ++i){
int showno = 0;
uint32_t time = Tms - Taccess[i];
switch(state[i]){
case PDU_TX:
if(time > PDNUART_TIMEOUT){
USB_sendstr("PDN/UART timeout: Tx problem ");
showno = 1;
disableDMA(i);
}
break;
case PDU_TXREADY:
USB_sendstr("Tx ready ");
showno = 1;
break;
case PDU_RX:
if(time > PDNUART_TIMEOUT){
USB_sendstr("PDN/UART timeout: no answer ");
notfound |= 1 << (curslaveaddr[i] + 4*i);
showno = 1;
disableDMA(i);
}
break;
case PDU_RXREADY:
parseRx(i);
state[i] = PDU_IDLE; // DMA already turned off
break;
default: // IDLE
return;
}
if(showno){
USB_putbyte('#'); printu(curslaveaddr[i] + 4*i); newline();
}
}
}
// USART2 Tx complete -> prepare Rx
void dma1_channel7_isr(){
DMA1_Channel7->CCR &= ~DMA_CCR_EN;
DMA1->IFCR |= DMA_IFCR_CTCIF7;
if(!readrq[0]){ // there was a setter
state[0] = PDU_TXREADY;
return;
}
DMA1_Channel6->CMAR = (uint32_t) inbuf[0];
DMA1_Channel6->CCR |= DMA_CCR_EN;
DMA1_Channel6->CNDTR = MAXBUFLEN;
state[0] = PDU_RX;
Taccess[0] = Tms;
}
// USART3 Tx complete -> prepare Rx
void dma1_channel2_isr(){
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
DMA1->IFCR |= DMA_IFCR_CTCIF2;
if(!readrq[1]){ // there was a setter
state[1] = PDU_TXREADY;
return;
}
DMA1_Channel3->CMAR = (uint32_t) inbuf[1];
DMA1_Channel3->CCR |= DMA_CCR_EN;
DMA1_Channel3->CNDTR = MAXBUFLEN;
state[1] = PDU_RX;
Taccess[1] = Tms;
}
// USART2 Rx complete -> set flag
void dma1_channel6_isr(){
DMA1_Channel6->CCR &= ~DMA_CCR_EN;
DMA1->IFCR |= DMA_IFCR_CTCIF6;
state[0] = PDU_RXREADY;
}
// USART3 Rx complete -> set flag
void dma1_channel3_isr(){
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
DMA1->IFCR |= DMA_IFCR_CTCIF3;
state[1] = PDU_RXREADY;
}
*/

3
F3:F303/Multistepper/pdnuart.h
View File

@ -20,7 +20,6 @@
#include <stdint.h>
void pdnuart_poll();
void pdnuart_setup();
int pdnuart_writereg(uint8_t motorno, uint8_t reg, uint32_t data);
int pdnuart_readreg(uint8_t motorno, uint8_t reg);
int pdnuart_readreg(uint8_t motorno, uint8_t reg, uint32_t *data);

42
F3:F303/Multistepper/proto.c
View File

@ -483,6 +483,7 @@ int fn_canid(uint32_t _U_ hash, char *args){ // "canid" (2040257924)
return RET_GOOD;
}
static int canusb_function(uint32_t hash, char *args){
errcodes e = ERR_BADCMD;
uint32_t N;
@ -512,23 +513,6 @@ static int canusb_function(uint32_t hash, char *args){
USB_sendstr("par="); printuhex(par);
USB_sendstr(", val="); printi(val); newline();
switch(hash){
case CMD_PING:
e = cu_ping(par, &val);
break;
case CMD_MCUT:
f = getMCUtemp();
USB_sendstr("T=");
USB_sendstr(float2str(f, 1));
newline();
return RET_GOOD;
break;
case CMD_MCUVDD:
f = getVdd();
USB_sendstr("VDD=");
USB_sendstr(float2str(f, 1));
newline();
return RET_GOOD;
break;
case CMD_ADC:
par = PARBASE(par);
if(par >= NUMBER_OF_ADC_CHANNELS){
@ -608,6 +592,20 @@ static int canusb_function(uint32_t hash, char *args){
case CMD_MAXSTEPS:
e = cu_maxsteps(par, &val);
break;
case CMD_MCUT:
f = getMCUtemp();
USB_sendstr("T=");
USB_sendstr(float2str(f, 1));
newline();
return RET_GOOD;
break;
case CMD_MCUVDD:
f = getVdd();
USB_sendstr("VDD=");
USB_sendstr(float2str(f, 1));
newline();
return RET_GOOD;
break;
case CMD_MICROSTEPS:
e = cu_microsteps(par, &val);
break;
@ -623,6 +621,12 @@ static int canusb_function(uint32_t hash, char *args){
case CMD_MOTREINIT:
e = cu_motreinit(par, &val);
break;
case CMD_PDN:
e = cu_pdn(par, &val);
break;
case CMD_PING:
e = cu_ping(par, &val);
break;
case CMD_RELPOS:
e = cu_relpos(par, &val);
break;
@ -680,8 +684,6 @@ static int canusb_function(uint32_t hash, char *args){
#define AL __attribute__ ((alias ("canusb_function")))
// COMMON with CAN
int fn_ping(uint32_t _U_ hash, char _U_ *args) AL; // "ping" (10561715)
// not realized yet
int fn_abspos(uint32_t _U_ hash, char _U_ *args) AL; //* "abspos" (3056382221)
int fn_accel(uint32_t _U_ hash, char _U_ *args) AL; //* "accel" (1490521981)
int fn_adc(uint32_t _U_ hash, char _U_ *args) AL; // "adc" (2963026093)
@ -704,6 +706,8 @@ int fn_minspeed(uint32_t _U_ hash, char _U_ *args) AL; //* "minspeed" (32348480
int fn_motflags(uint32_t _U_ hash, char _U_ *args) AL; //* "motflags" (2153634658)
int fn_motmul(uint32_t _U_ hash, char _U_ *args) AL; //* "motmul" (1543400099)
int fn_motreinit(uint32_t _U_ hash, char _U_ *args) AL; //* "motreinit" (199682784)
int fn_pdn(uint32_t _U_ hash, char _U_ *args) AL; // "pdn" (2963275719)
int fn_ping(uint32_t _U_ hash, char _U_ *args) AL; // "ping" (10561715)
int fn_relpos(uint32_t _U_ hash, char _U_ *args) AL; //* "relpos" (1278646042)
int fn_relslow(uint32_t _U_ hash, char _U_ *args) AL; //* "relslow" (1742971917)
int fn_saveconf(uint32_t _U_ hash, char _U_ *args) AL; //* "saveconf" (141102426)

729
F3:F303/Multistepper/tmc2209.h Normal file
View File

@ -0,0 +1,729 @@
/*
* tmc2209.h - register and message (datagram) descriptors for Trinamic TMC2209 stepper driver
*
* v0.0.4 / 2021-12-12 / (c) Io Engineering / Terje
*/
/*
Copyright (c) 2020-2021, Terje Io
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
* Neither the name of the copyright holder nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _TRINAMIC2209_H_
#define _TRINAMIC2209_H_
#include <stdint.h>
#include <stdbool.h>
//#include "common.h"
#pragma pack(push, 1)
typedef enum {
TMC2209_Microsteps_1 = 1,
TMC2209_Microsteps_2 = 2,
TMC2209_Microsteps_4 = 4,
TMC2209_Microsteps_8 = 8,
TMC2209_Microsteps_16 = 16,
TMC2209_Microsteps_32 = 32,
TMC2209_Microsteps_64 = 64,
TMC2209_Microsteps_128 = 128,
TMC2209_Microsteps_256 = 256
} tmc2209_microsteps_t;
// default values
// General
#define TMC2209_F_CLK 12000000UL // factory tuned to 12MHz - see datasheet for calibration procedure if required
#define TMC2209_MODE 0 // 0 = TMCMode_StealthChop, 1 = TMCMode_CoolStep, 3 = TMCMode_StallGuard
#define TMC2209_MICROSTEPS TMC2209_Microsteps_4
#define TMC2209_R_SENSE 110 // mOhm
#define TMC2209_CURRENT 500 // mA RMS
#define TMC2209_HOLD_CURRENT_PCT 50
// CHOPCONF
#define TMC2209_INTPOL 1 // 0 = off, 1 = on
#define TMC2209_TOFF 3 // 1 - 15
#define TMC2209_TBL 0 // 0 = 16, 1 = 24, 2 = 36, 3 = 54 clocks
#define TMC2209_HSTRT 6 // hstrt: 0 - 7
#define TMC2209_HEND -3 // hend: -3 - 12
#define TMC2209_IHOLDDELAY 10 // 0 - 15
// TPOWERDOWN
#define TMC2209_TPOWERDOWN 20 // 0 - ((2^8)-1) * 2^18 tCLK
// TPWMTHRS
#define TMC2209_TPWM_THRS TMC_THRESHOLD_MIN // tpwmthrs: 0 - 2^20 - 1 (20 bits)
// PWMCONF - StealthChop defaults
#define TMC2209_PWM_FREQ 1 // 0 = 1/1024, 1 = 2/683, 2 = 2/512, 3 = 2/410 fCLK
#define TMC2209_PWM_AUTOGRAD 1 // boolean (0 or 1)
#define TMC2209_PWM_GRAD 14 // 0 - 255
#define TMC2209_PWM_LIM 12 // 0 - 15
#define TMC2209_PWM_REG 8 // 1 - 15
#define TMC2209_PWM_OFS 36 // 0 - 255
// TCOOLTHRS
#define TMC2209_COOLSTEP_THRS TMC_THRESHOLD_MIN // tpwmthrs: 0 - 2^20 - 1 (20 bits)
// COOLCONF - CoolStep defaults
#define TMC2209_SEMIN 5 // 0 = coolStep off, 1 - 15 = coolStep on
#define TMC2209_SEUP 0 // 0 - 3 (1 - 8)
#define TMC2209_SEMAX 2 // 0 - 15
#define TMC2209_SEDN 1 // 0 - 3
#define TMC2209_SEIMIN 0 // boolean (0 or 1)
// end of default values
#if TMC2209_MODE == 0 // StealthChop
#define TMC2209_PWM_AUTOSCALE 1
#define TMC2209_SPREADCYCLE 0
#elif TMC2209_MODE == 1 // CoolStep
#define TMC2209_PWM_AUTOSCALE 0
#define TMC2209_SPREADCYCLE 1
#else //StallGuard
#define TMC2209_PWM_AUTOSCALE 0
#define TMC2209_SPREADCYCLE 0
#endif
typedef uint8_t tmc2209_regaddr_t;
enum tmc2209_regaddr_t {
TMC2209Reg_GCONF = 0x00,
TMC2209Reg_GSTAT = 0x01,
TMC2209Reg_IFCNT = 0x02,
TMC2209Reg_SLAVECONF = 0x03,
TMC2209Reg_OTP_PROG = 0x04,
TMC2209Reg_OTP_READ = 0x05,
TMC2209Reg_IOIN = 0x06,
TMC2209Reg_FACTORY_CONF = 0x07,
TMC2209Reg_IHOLD_IRUN = 0x10,
TMC2209Reg_TPOWERDOWN = 0x11,
TMC2209Reg_TSTEP = 0x12,
TMC2209Reg_TPWMTHRS = 0x13,
TMC2209Reg_VACTUAL = 0x22,
TMC2209Reg_TCOOLTHRS = 0x14,
TMC2209Reg_SGTHRS = 0x40,
TMC2209Reg_SG_RESULT = 0x41,
TMC2209Reg_COOLCONF = 0x42,
TMC2209Reg_MSCNT = 0x6A,
TMC2209Reg_MSCURACT = 0x6B,
TMC2209Reg_CHOPCONF = 0x6C,
TMC2209Reg_DRV_STATUS = 0x6F,
TMC2209Reg_PWMCONF = 0x70,
TMC2209Reg_PWM_SCALE = 0x71,
TMC2209Reg_PWM_AUTO = 0x72,
TMC2209Reg_LAST_ADDR = TMC2209Reg_PWM_AUTO
};
typedef union {
uint8_t value;
struct {
uint8_t
reset_flag :1,
driver_error :1,
sg2 :1,
standstill :1,
unused :4;
};
} TMC2209_status_t;
// --- register definitions ---
// GCONF : RW
typedef union {
uint32_t value;
struct {
uint32_t
I_scale_analog :1,
internal_Rsense :1,
en_spreadcycle :1,
shaft :1,
index_otpw :1,
index_step :1,
pdn_disable :1,
mstep_reg_select :1,
multistep_filt :1,
test_mode :1,
reserved :22;
};
} TMC2209_gconf_reg_t;
// GSTAT : R+C
typedef union {
uint32_t value;
struct {
uint32_t
reset :1,
drv_err :1,
uv_cp :1,
reserved :29;
};
} TMC2209_gstat_reg_t;
// IFCNT : R
typedef union {
uint32_t value;
struct {
uint32_t
count :8,
reserved :24;
};
} TMC2209_ifcnt_reg_t;
// SLAVECONF : W
typedef union {
uint32_t value;
struct {
uint32_t
reserved0 :8,
conf :4,
reserved1 :20;
};
} TMC2209_slaveconf_reg_t;
// OTP_PROG : W
typedef union {
uint32_t value;
struct {
uint32_t
otpbit :2,
otpbyte :2,
otpmagic :28;
};
} TMC2209_otp_prog_reg_t;
// OTP_READ : R
typedef union {
uint32_t value;
struct {
uint32_t
otp0_0_4 :5,
otp0_5 :1,
otp0_6 :1,
otp0_7 :1,
otp1_0_3 :4,
otp1_4 :1,
otp1_5_7 :3,
otp2_0 :1,
otp2_1 :1,
otp2_2 :1,
otp2_3_4 :2,
otp2_5_6 :2,
otp2_7 :1,
reserved :8;
};
} TMC2209_otp_read_reg_t;
// IOIN : R
typedef union {
uint32_t value;
struct {
uint32_t
enn :1,
unused0 :1,
ms1 :1,
ms2 :1,
diag :1,
unused1 :1,
pdn_uart :1,
step :1,
spread_en :1,
dir :1,
reserved :14,
version :8;
};
} TMC2209_ioin_reg_t;
// FACTORY_CONF : RW
typedef union {
uint32_t value;
struct {
uint32_t
fclktrim :4,
reserved1 :3,
ottrim :2,
reserved :23;
};
} TMC2209_factory_conf_reg_t;
// IHOLD_IRUN : R
typedef union {
uint32_t value;
struct {
uint32_t
ihold :5,
reserved1 :3,
irun :5,
reserved2 :3,
iholddelay :4,
reserved3 :12;
};
} TMC2209_ihold_irun_reg_t;
// TPOWERDOWN : W
typedef union {
uint32_t value;
struct {
uint32_t
tpowerdown :8,
reserved :24;
};
} TMC2209_tpowerdown_reg_t;
// TSTEP : R
typedef union {
uint32_t value;
struct {
uint32_t
tstep :20,
reserved :12;
};
} TMC2209_tstep_reg_t;
// TPWMTHRS : W
typedef union {
uint32_t value;
struct {
uint32_t
tpwmthrs :20,
reserved :12;
};
} TMC2209_tpwmthrs_reg_t;
// TCOOLTHRS : W
typedef union {
uint32_t value;
struct {
uint32_t
tcoolthrs :20,
reserved :12;
};
} TMC2209_tcoolthrs_reg_t;
// VACTUAL : W
typedef union {
uint32_t value;
struct {
uint32_t
actual :24,
reserved :8;
};
} TMC2209_vactual_reg_t;
// SGTHRS : W
typedef union {
uint32_t value;
struct {
uint32_t
threshold :8,
reserved :24;
};
} TMC2209_sgthrs_reg_t;
// SG_RESULT : R
typedef union {
uint32_t value;
struct {
uint32_t
result :10,
reserved :22;
};
} TMC2209_sg_result_reg_t;
// MSCNT : R
typedef union {
uint32_t value;
struct {
uint32_t
mscnt :10,
reserved :22;
};
} TMC2209_mscnt_reg_t;
// MSCURACT : R
typedef union {
uint32_t value;
struct {
uint32_t
cur_a :9,
reserved1 :7,
cur_b :9,
reserved2 :7;
};
} TMC2209_mscuract_reg_t;
// CHOPCONF : RW
typedef union {
uint32_t value;
struct {
uint32_t
toff :4,
hstrt :3,
hend :4,
reserved0 :4,
tbl :2,
vsense :1,
reserved1 :6,
mres :4,
intpol :1,
dedge :1,
diss2g :1,
diss2vs :1;
};
} TMC2209_chopconf_reg_t;
// DRV_STATUS : R
typedef union {
uint32_t value;
struct {
uint32_t
otpw :1,
ot :1,
s2ga :1,
s2gb :1,
s2vsa :1,
s2vsb :1,
ola :1,
olb :1,
t120 :1,
t143 :1,
t150 :1,
t157 :1,
reserved1 :4,
cs_actual :5,
reserved2 :3,
reserved3 :6,
stealth :1,
stst :1;
};
} TMC2209_drv_status_reg_t;
// COOLCONF : W
typedef union {
uint32_t value;
struct {
uint32_t
semin :4,
reserved1 :1,
seup :2,
reserved2 :1,
semax :4,
reserved3 :1,
sedn :2,
seimin :1,
reserved5 :16;
};
} TMC2209_coolconf_reg_t;
// PWMCONF : W
typedef union {
uint32_t value;
struct {
uint32_t
pwm_ofs :8,
pwm_grad :8,
pwm_freq :2,
pwm_autoscale :1,
pwm_autograd :1,
freewheel :2,
reserved :2,
pwm_reg :4,
pwm_lim :4;
};
} TMC2209_pwmconf_reg_t;
// PWM_SCALE : R
typedef union {
uint32_t value;
struct {
uint32_t
pwm_scale_sum :8,
reserved1 :8,
pwm_scale_auto :9,
reserved2 :7;
};
} TMC2209_pwm_scale_reg_t;
// PWM_AUTO : R
typedef union {
uint32_t value;
struct {
uint32_t
pwm_ofs_auto :8,
unused0 :8,
pwm_grad_auto :8,
unused1 :8;
};
} TMC2209_pwm_auto_ctrl_reg_t;
// --- end of register definitions ---
typedef union {
tmc2209_regaddr_t reg;
uint8_t value;
struct {
uint8_t
idx :7,
write :1;
};
} TMC2209_addr_t;
// --- datagrams ---
typedef struct {
TMC2209_addr_t addr;
TMC2209_gconf_reg_t reg;
} TMC2209_gconf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_gstat_reg_t reg;
} TMC2209_gstat_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_tpowerdown_reg_t reg;
} TMC2209_tpowerdown_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_ifcnt_reg_t reg;
} TMC2209_ifcnt_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_slaveconf_reg_t reg;
} TMC2209_slaveconf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_otp_prog_reg_t reg;
} TMC2209_otp_prog_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_otp_read_reg_t reg;
} TMC2209_otp_read_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_ioin_reg_t reg;
} TMC2209_ioin_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_factory_conf_reg_t reg;
} TMC2209_factory_conf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_ihold_irun_reg_t reg;
} TMC2209_ihold_irun_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_tstep_reg_t reg;
} TMC2209_tstep_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_tpwmthrs_reg_t reg;
} TMC2209_tpwmthrs_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_tcoolthrs_reg_t reg;
} TMC2209_tcoolthrs_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_vactual_reg_t reg;
} TMC2209_vactual_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_sgthrs_reg_t reg;
} TMC2209_sgthrs_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_sg_result_reg_t reg;
} TMC2209_sg_result_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_mscnt_reg_t reg;
} TMC2209_mscnt_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_mscuract_reg_t reg;
} TMC2209_mscuract_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_chopconf_reg_t reg;
} TMC2209_chopconf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_drv_status_reg_t reg;
} TMC2209_drv_status_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_coolconf_reg_t reg;
} TMC2209_coolconf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_pwmconf_reg_t reg;
} TMC2209_pwmconf_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_pwm_scale_reg_t reg;
} TMC2209_pwm_scale_dgr_t;
typedef struct {
TMC2209_addr_t addr;
TMC2209_pwm_auto_ctrl_reg_t reg;
} TMC2209_pwm_auto_ctrl_dgr_t;
// -- end of datagrams
typedef union {
uint32_t value;
uint8_t data[4];
TMC2209_gconf_reg_t gconf;
TMC2209_gstat_reg_t gstat;
TMC2209_ifcnt_reg_t ifcnt;
TMC2209_slaveconf_reg_t slaveconf;
TMC2209_otp_prog_reg_t otp_prog;
TMC2209_otp_read_reg_t otp_read;
TMC2209_ioin_reg_t ioin;
TMC2209_factory_conf_reg_t factory_conf;
TMC2209_ihold_irun_reg_t ihold_irun;
TMC2209_tpowerdown_reg_t tpowerdown;
TMC2209_tstep_reg_t tstep;
TMC2209_tpwmthrs_reg_t tpwmthrs;
TMC2209_tcoolthrs_reg_t tcoolthrs;
TMC2209_vactual_reg_t vactual;
TMC2209_sgthrs_reg_t sgthrs;
TMC2209_sg_result_reg_t sg_result;
TMC2209_coolconf_reg_t coolconf;
TMC2209_mscnt_reg_t mscnt;
TMC2209_mscuract_reg_t mscuract;
TMC2209_chopconf_reg_t chopconf;
TMC2209_drv_status_reg_t drv_status;
TMC2209_pwmconf_reg_t pwmconf;
TMC2209_pwm_scale_reg_t pwm_scale;
TMC2209_pwm_auto_ctrl_reg_t pwm_auto_ctrl;
} TMC2209_payload;
typedef struct {
TMC2209_addr_t addr;
TMC2209_payload payload;
} TMC2209_datagram_t;
typedef union {
uint8_t data[8];
struct {
uint8_t sync;
uint8_t slave;
TMC2209_addr_t addr;
TMC2209_payload payload;
uint8_t crc;
} msg;
} TMC2209_write_datagram_t;
typedef union {
uint8_t data[4];
struct {
uint8_t sync;
uint8_t slave;
TMC2209_addr_t addr;
uint8_t crc;
} msg;
} TMC2209_read_datagram_t;
typedef struct {
// driver registers
TMC2209_gconf_dgr_t gconf;
TMC2209_gstat_dgr_t gstat;
TMC2209_ifcnt_dgr_t ifcnt;
TMC2209_slaveconf_dgr_t slaveconf;
TMC2209_otp_prog_dgr_t otp_prog;
TMC2209_otp_read_dgr_t otp_read;
TMC2209_ioin_dgr_t ioin;
TMC2209_factory_conf_dgr_t factory_conf;
TMC2209_ihold_irun_dgr_t ihold_irun;
TMC2209_tpowerdown_dgr_t tpowerdown;
TMC2209_tstep_dgr_t tstep;
TMC2209_tpwmthrs_dgr_t tpwmthrs;
TMC2209_tcoolthrs_dgr_t tcoolthrs;
TMC2209_vactual_dgr_t vactual;
TMC2209_sgthrs_dgr_t sgthrs;
TMC2209_sg_result_dgr_t sg_result;
TMC2209_coolconf_dgr_t coolconf;
TMC2209_mscnt_dgr_t mscnt;
TMC2209_mscuract_dgr_t mscuract;
TMC2209_chopconf_dgr_t chopconf;
TMC2209_drv_status_dgr_t drv_status;
TMC2209_pwmconf_dgr_t pwmconf;
TMC2209_pwm_scale_dgr_t pwm_scale;
TMC2209_pwm_auto_ctrl_dgr_t pwm_auto;
TMC2209_status_t driver_status;
trinamic_config_t config;
} TMC2209_t;
#pragma pack(pop)
bool TMC2209_Init(TMC2209_t *driver);
void TMC2209_SetDefaults (TMC2209_t *driver);
void TMC2209_SetCurrent (TMC2209_t *driver, uint16_t mA, uint8_t hold_pct);
uint16_t TMC2209_GetCurrent (TMC2209_t *driver);
float TMC2209_GetTPWMTHRS (TMC2209_t *driver, float steps_mm);
void TMC2209_SetTPWMTHRS (TMC2209_t *driver, float mm_sec, float steps_mm);
bool TMC2209_MicrostepsIsValid (uint16_t usteps);
void TMC2209_SetMicrosteps(TMC2209_t *driver, tmc2209_microsteps_t usteps);
void TMC2209_SetTCOOLTHRS (TMC2209_t *driver, float mm_sec, float steps_mm);
void TMC2209_SetConstantOffTimeChopper(TMC2209_t *driver, uint8_t constant_off_time, uint8_t blank_time, uint8_t fast_decay_time, int8_t sine_wave_offset, bool use_current_comparator);
TMC2209_datagram_t *TMC2209_GetRegPtr (TMC2209_t *driver, tmc2209_regaddr_t reg);
bool TMC2209_WriteRegister (TMC2209_t *driver, TMC2209_datagram_t *reg);
bool TMC2209_ReadRegister (TMC2209_t *driver, TMC2209_datagram_t *reg);
#endif

4
F3:F303/Multistepper/version.inc
View File

@ -1,2 +1,2 @@
#define BUILD_NUMBER "82"
#define BUILD_DATE "2023-02-25"
#define BUILD_NUMBER "84"
#define BUILD_DATE "2023-02-26"