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restructuring
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229
F0:F030,F042,F072/3steppersLB/hardware.c
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229
F0:F030,F042,F072/3steppersLB/hardware.c
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/*
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* This file is part of the 3steppers project.
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* Copyright 2021 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hardware.h"
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#include "can.h"
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#include "steppers.h"
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#include "strfunct.h"
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// Buttons: PA10, PA13, PA14, PA15, pullup (0 active)
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volatile GPIO_TypeDef *BTNports[BTNSNO] = {GPIOA, GPIOA, GPIOA, GPIOA};
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const uint32_t BTNpins[BTNSNO] = {1<<10, 1<<13, 1<<14, 1<<15};
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// Limit switches: PC13, PC14, PC15, pulldown (0 active)
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volatile GPIO_TypeDef *ESWports[ESWNO] = {GPIOC, GPIOC, GPIOC};
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const uint32_t ESWpins[ESWNO] = {1<<13, 1<<14, 1<<15};
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// external GPIO
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volatile GPIO_TypeDef *EXTports[EXTNO] = {GPIOB, GPIOB, GPIOB};
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const uint32_t EXTpins[EXTNO] = {1<<13, 1<<14, 1<<15};
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// motors: DIR/EN
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volatile GPIO_TypeDef *ENports[MOTORSNO] = {GPIOB, GPIOB, GPIOB};
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const uint32_t ENpins[MOTORSNO] = {1<<0, 1<<2, 1<<11};
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volatile GPIO_TypeDef *DIRports[MOTORSNO] = {GPIOB, GPIOB, GPIOB};
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const uint32_t DIRpins[MOTORSNO] = {1<<1, 1<<10, 1<<12};
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// timers for motors
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volatile TIM_TypeDef *mottimers[MOTORSNO] = {TIM15, TIM14, TIM16};
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// timers for encoders
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volatile TIM_TypeDef *enctimers[MOTORSNO] = {TIM1, TIM2, TIM3};
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void gpio_setup(void){
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIOFEN;
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GPIOA->MODER = GPIO_MODER_MODER0_AF | GPIO_MODER_MODER1_AF | GPIO_MODER_MODER2_AF | GPIO_MODER_MODER3_AI |
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GPIO_MODER_MODER4_AF | GPIO_MODER_MODER5_AI | GPIO_MODER_MODER6_AF | GPIO_MODER_MODER7_AF |
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GPIO_MODER_MODER8_AF | GPIO_MODER_MODER9_AF;
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GPIOA->PUPDR = GPIO_PUPDR10_PU | GPIO_PUPDR13_PU | GPIO_PUPDR14_PU | GPIO_PUPDR15_PU;
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GPIOA->AFR[0] = (2 << (0*4)) | (2 << (1*4)) | (0 << (2*4)) | (4 << (4*4)) | (5 << (6*4)) | (5 << (7*4));
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GPIOA->AFR[1] = (2 << (0*4)) | (2 << (1*4));
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pin_set(GPIOB, (1<<0) | (1<<2) | (1<<11)); // turn off motors @ start
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GPIOB->MODER = GPIO_MODER_MODER0_O | GPIO_MODER_MODER1_O | GPIO_MODER_MODER2_O | GPIO_MODER_MODER3_O |
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GPIO_MODER_MODER4_AF | GPIO_MODER_MODER5_AF | GPIO_MODER_MODER6_AF | GPIO_MODER_MODER7_AF |
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GPIO_MODER_MODER10_O | GPIO_MODER_MODER11_O | GPIO_MODER_MODER12_O | GPIO_MODER_MODER13_O |
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GPIO_MODER_MODER14_O | GPIO_MODER_MODER15_O ;
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GPIOB->AFR[0] = (1 << (4*4)) | (1 << (5*4)) | (1 << (6*4)) | (1 << (7*4));
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GPIOC->PUPDR = GPIO_PUPDR13_PD | GPIO_PUPDR14_PD | GPIO_PUPDR15_PD;
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GPIOF->MODER = GPIO_MODER_MODER0_O;
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}
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void iwdg_setup(){
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uint32_t tmout = 16000000;
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/* Enable the peripheral clock RTC */
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/* (1) Enable the LSI (40kHz) */
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/* (2) Wait while it is not ready */
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RCC->CSR |= RCC_CSR_LSION; /* (1) */
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while((RCC->CSR & RCC_CSR_LSIRDY) != RCC_CSR_LSIRDY){if(--tmout == 0) break;} /* (2) */
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/* Configure IWDG */
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/* (1) Activate IWDG (not needed if done in option bytes) */
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/* (2) Enable write access to IWDG registers */
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/* (3) Set prescaler by 64 (1.6ms for each tick) */
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/* (4) Set reload value to have a rollover each 2s */
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/* (5) Check if flags are reset */
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/* (6) Refresh counter */
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IWDG->KR = IWDG_START; /* (1) */
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IWDG->KR = IWDG_WRITE_ACCESS; /* (2) */
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IWDG->PR = IWDG_PR_PR_1; /* (3) */
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IWDG->RLR = 1250; /* (4) */
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tmout = 16000000;
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while(IWDG->SR){if(--tmout == 0) break;} /* (5) */
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IWDG->KR = IWDG_REFRESH; /* (6) */
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}
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static IRQn_Type motirqs[MOTORSNO] = {TIM15_IRQn, TIM14_IRQn, TIM16_IRQn};
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// motor's PWM
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static void setup_mpwm(int i){
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volatile TIM_TypeDef *TIM = mottimers[i];
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TIM->CR1 = TIM_CR1_ARPE; // buffered ARR
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TIM->PSC = MOTORTIM_PSC; // 16MHz
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// PWM mode 1 (active -> inactive)
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TIM->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
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#if MOTORTIM_ARRMIN < 5
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#error "change the code!"
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#endif
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TIM->CCR1 = MOTORTIM_ARRMIN - 3; // ~10us for pulse duration
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TIM->ARR = 0xffff;
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// TIM->EGR = TIM_EGR_UG; // generate update to refresh ARR
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TIM->BDTR |= TIM_BDTR_MOE; // enable main output
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TIM->CCER = TIM_CCER_CC1E; // turn it on, active high
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TIM->DIER = TIM_DIER_CC1IE; // allow CC interrupt (we should count steps)
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NVIC_EnableIRQ(motirqs[i]);
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}
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static IRQn_Type encirqs[MOTORSNO] = {TIM1_BRK_UP_TRG_COM_IRQn, TIM2_IRQn, TIM3_IRQn};
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static void setup_enc(int i){
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volatile TIM_TypeDef *TIM = enctimers[i];
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/* (1) Configure TI1FP1 on TI1 (CC1S = 01)
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configure TI1FP2 on TI2 (CC2S = 01)
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filters sampling = fDTS/8, N=6 */
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/* (2) Configure TI1FP1 and TI1FP2 non inverted (CC1P = CC2P = 0, reset value) */
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/* (3) Configure both inputs are active on both rising and falling edges
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(SMS = 011), set external trigger filter to f_DTS/8, N=6 (ETF=1000) */
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/* (4) Enable the counter by writing CEN=1 in the TIMx_CR1 register,
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set tDTS=4*tCK_INT. */
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TIM->CCMR1 = TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0 | TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC2F_3; /* (1)*/
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//TIMx->CCER &= (uint16_t)(~(TIM_CCER_CC21 | TIM_CCER_CC2P); /* (2) */
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TIM->SMCR = TIM_SMCR_ETF_3 | TIM_SMCR_SMS_0 | TIM_SMCR_SMS_1; /* (3) */
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// enable update interrupt
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TIM->DIER = TIM_DIER_UIE;
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// generate interrupt each revolution
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TIM->ARR = the_conf.encrev[i];
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// enable timer
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TIM->CR1 = TIM_CR1_CKD_1 | TIM_CR1_CEN; /* (4) */
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NVIC_EnableIRQ(encirqs[i]);
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}
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// timers 14,15,16,17 - PWM@ch1, 1,2,3 - encoders @ ch1/2
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void timers_setup(){
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN | RCC_APB1ENR_TIM14EN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN | RCC_APB2ENR_TIM15EN | RCC_APB2ENR_TIM16EN | RCC_APB2ENR_TIM17EN; // enable clocking
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// setup PWM @ TIM17 - single PWM channel
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// PWM mode 1 (active -> inactive)
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TIM17->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
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TIM17->PSC = 5; // 8MHz for 31kHz PWM
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TIM17->ARR = 254; // ARR for 8-bit PWM
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TIM17->CCR1 = 0; // level=0
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TIM17->BDTR |= TIM_BDTR_MOE; // enable main output
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TIM17->CCER = TIM_CCER_CC1E; // enable PWM output
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TIM17->CR1 = TIM_CR1_CEN; // enable timer
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for(int i = 0; i < MOTORSNO; ++i)
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setup_mpwm(i);
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for(int i = 0; i < MOTORSNO; ++i){
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if(the_conf.motflags[i].haveencoder){ // motor have the encoder
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setup_enc(i);
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}
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}
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}
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// pause in milliseconds for some purposes
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void pause_ms(uint32_t pause){
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uint32_t Tnxt = Tms + pause;
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while(Tms < Tnxt) nop();
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}
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#ifndef STM32F072xB
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#warning "Only F072 can jump to bootloader"
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#endif
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void Jump2Boot(){ // for STM32F072
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void (*SysMemBootJump)(void);
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volatile uint32_t addr = 0x1FFFC800;
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// reset systick
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SysTick->CTRL = 0;
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// reset clocks
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RCC->APB1RSTR = RCC_APB1RSTR_CECRST | RCC_APB1RSTR_DACRST | RCC_APB1RSTR_PWRRST | RCC_APB1RSTR_CRSRST |
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RCC_APB1RSTR_CANRST | RCC_APB1RSTR_USBRST | RCC_APB1RSTR_I2C2RST | RCC_APB1RSTR_I2C1RST |
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RCC_APB1RSTR_USART4RST | RCC_APB1RSTR_USART3RST | RCC_APB1RSTR_USART2RST | RCC_APB1RSTR_SPI2RST |
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RCC_APB1RSTR_WWDGRST | RCC_APB1RSTR_TIM14RST | RCC_APB1RSTR_TIM7RST | RCC_APB1RSTR_TIM6RST |
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RCC_APB1RSTR_TIM3RST | RCC_APB1RSTR_TIM2RST;
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RCC->APB2RSTR = RCC_APB2RSTR_DBGMCURST | RCC_APB2RSTR_TIM17RST | RCC_APB2RSTR_TIM16RST | RCC_APB2RSTR_TIM15RST |
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RCC_APB2RSTR_USART1RST | RCC_APB2RSTR_SPI1RST | RCC_APB2RSTR_TIM1RST | RCC_APB2RSTR_ADCRST | RCC_APB2RSTR_SYSCFGRST;
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RCC->AHBRSTR = 0;
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RCC->APB1RSTR = 0;
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RCC->APB2RSTR = 0;
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// Enable the SYSCFG peripheral.
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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// remap memory to 0 (only for STM32F0)
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SYSCFG->CFGR1 = 0x01; __DSB(); __ISB();
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SysMemBootJump = (void (*)(void)) (*((uint32_t *)(addr + 4)));
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// set main stack pointer
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__set_MSP(*((uint32_t *)addr));
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// jump to bootloader
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SysMemBootJump();
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}
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// calculate MSB position of value `val`
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// 0 1 2 3 4 5 6 7 8 9 a b c d e f
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static const uint8_t bval[] = {0,0,1,1,2,2,2,2,3,3,3,3,3,3,3,3};
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uint8_t MSB(uint16_t val){
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register uint8_t r = 0;
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if(val & 0xff00){r += 8; val >>= 8;}
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if(val & 0x00f0){r += 4; val >>= 4;}
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return ((uint8_t)r + bval[val]);
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}
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// state 1 - pressed, 0 - released (pin active is zero)
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uint8_t ESW_state(uint8_t x){
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uint8_t val = ((ESWports[x]->IDR & ESWpins[x]) ? 0 : 1);
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if(the_conf.motflags[x].eswinv) val = !val;
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return val;
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}
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void tim14_isr(){
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//TIM14->CR1 &= ~TIM_CR1_CEN;
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addmicrostep(1);
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TIM14->SR = 0;
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}
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void tim15_isr(){
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//TIM15->CR1 &= ~TIM_CR1_CEN;
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addmicrostep(0);
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TIM15->SR = 0;
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}
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void tim16_isr(){
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//TIM16->CR1 &= ~TIM_CR1_CEN;
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addmicrostep(2);
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TIM16->SR = 0;
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}
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void tim1_brk_up_trg_com_isr(){
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encoders_UPD(0);
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}
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void tim2_isr(){
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encoders_UPD(1);
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}
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void tim3_isr(){
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encoders_UPD(2);
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}
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