fixed float printf for F303

This commit is contained in:
Edward Emelianov 2023-01-17 21:50:52 +03:00
parent a2971ab053
commit 5230ad14e3
12 changed files with 364 additions and 24 deletions

View File

@ -1,4 +1,4 @@
BINARY = usart1
BINARY = float
BOOTPORT ?= /dev/ttyUSB0
BOOTSPEED ?= 115200
# MCU FAMILY
@ -9,12 +9,10 @@ MCU ?= F303xb
ARMARCH = __ARM_ARCH_7M__
# change this linking script depending on particular MCU model,
LDSCRIPT ?= stm32f303xB.ld
# debug
#DEFS = -DEBUG
INDEPENDENT_HEADERS=
FP_FLAGS ?= -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -fsingle-precision-constant -mlittle-endian -DARM_MATH_CM4
FP_FLAGS ?= -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -mlittle-endian -DARM_MATH_CM4
ASM_FLAGS ?= -mthumb -mcpu=cortex-m4
ARCH_FLAGS = $(ASM_FLAGS) $(FP_FLAGS) -D $(ARMARCH)
@ -42,6 +40,8 @@ DFUUTIL := $(shell which dfu-util)
###############################################################################
# Source files
OBJDIR := mk
# target (debug/release)
TARGFILE := $(OBJDIR)/TARGET
SRC := $(wildcard *.c)
OBJS := $(addprefix $(OBJDIR)/, $(SRC:%.c=%.o))
STARTUP := $(OBJDIR)/startup.o
@ -59,16 +59,15 @@ LIB_DIR := $(INC_DIR)/ld
# C flags
CFLAGS += -g -gdwarf-2 # debuggin symbols in listing
CFLAGS += -O2 -D__thumb2__=1 -MD
CFLAGS += -Wall -Werror -Wextra -Wshadow
CFLAGS += -fshort-enums -ffunction-sections -fdata-sections -flto
#CFLAGS += -fno-common -ffunction-sections -fdata-sections -fno-stack-protector
CFLAGS += -Wall -Wextra -Wshadow
CFLAGS += -fshort-enums -ffunction-sections -fdata-sections
#CFLAGS += -fno-common -fno-stack-protector
CFLAGS += $(ARCH_FLAGS)
###############################################################################
# Linker flags
#LDFLAGS += -nostartfiles --static -nostdlib -specs=nosys.specs -specs=nano.specs
LDFLAGS += -nostartfiles --static -specs=nosys.specs -specs=nano.specs
LDFLAGS += $(ARCH_FLAGS)
LDFLAGS += -specs=nano.specs -flto
LDFLAGS += -L$(LIB_DIR)
#-L$(TOOLCHLIB)
LDFLAGS += -T$(LDSCRIPT)
@ -76,7 +75,7 @@ LDFLAGS += -Wl,-Map=$(MAP),--cref -Wl,--gc-sections -Wl,--print-memory-usage
###############################################################################
# Used libraries
#LDLIBS += -lc $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
LDLIBS += -lm -lc $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
DEFS += -DSTM32$(FAMILY) -DSTM32$(MCU)
@ -85,7 +84,29 @@ LIST := $(OBJDIR)/$(BINARY).list
BIN := $(BINARY).bin
HEX := $(BINARY).hex
all: bin list size
ifeq ($(shell test -e $(TARGFILE) && echo -n yes),yes)
TARGET := $(file < $(TARGFILE))
else
TARGET := RELEASE
endif
ifeq ($(TARGET), DEBUG)
.DEFAULT_GOAL := debug
endif
# release: add LTO
release: CFLAGS += -flto
release: LDFLAGS += -flto
release: $(TARGFILE) bin list size
#debug: add debug flags
debug: CFLAGS += -DEBUG -Werror -g3
debug: TARGET := DEBUG
debug: $(TARGFILE) bin list size
$(TARGFILE): $(OBJDIR)
@echo -e "\t\tTARGET: $(TARGET)"
@echo "$(TARGET)" > $(TARGFILE)
elf: $(ELF)
bin: $(BIN)
@ -127,8 +148,7 @@ size: $(ELF)
clean:
@echo " CLEAN"
$(RM) $(OBJS) $(DEPS) $(ELF) $(HEX) $(LIST) $(MAP)
@rmdir $(OBJDIR) 2>/dev/null || true
@rm -rf $(OBJDIR) 2>/dev/null || true
flash: $(BIN)
@ -143,4 +163,10 @@ dfuboot: $(BIN)
@echo " LOAD $(BIN) THROUGH DFU"
$(DFUUTIL) -a0 -D $(BIN) -s 0x08000000
.PHONY: clean flash boot
openocd:
openocd -f openocd.cfg
dbg:
arm-none-eabi-gdb $(ELF) -ex 'target remote localhost:3333' -ex 'monitor reset halt'
.PHONY: size clean flash boot dfuboot openocd dbg

BIN
F3:F303/floatPrintf/float.bin Executable file

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@ -15,8 +15,10 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <math.h>
#include <stm32f3.h>
#include <string.h>
#include "stm32f3.h"
#include "hardware.h"
#include "usart.h"
@ -27,12 +29,17 @@ void sys_tick_handler(void){
}
// be careful: if pow10 would be bigger you should change str[] size!
static const float pwr10[] = {1., 10., 100., 1000., 10000.};
static const float rounds[] = {0.5, 0.05, 0.005, 0.0005, 0.00005};
static const float pwr10[] = {1.f, 10.f, 100.f, 1000.f, 10000.f};
static const float rounds[] = {0.5f, 0.05f, 0.005f, 0.0005f, 0.00005f};
#define P10L (sizeof(pwr10)/sizeof(uint32_t) - 1)
static char * float2str(float x, uint8_t prec){
if(prec > P10L) prec = P10L;
static char str[16] = {0}; // -117.5494E-36\0 - 14 symbols max!
if(prec > P10L) prec = P10L;
if(isnan(x)){ memcpy(str, "NAN", 4); return str;}
else{
int i = isinf(x);
if(i){memcpy(str, "-INF", 5); if(i == 1) return str+1; else return str;}
}
char *s = str + 14; // go to end of buffer
uint8_t minus = 0;
if(x < 0){
@ -89,8 +96,9 @@ static char * float2str(float x, uint8_t prec){
return s+1;
}
static const float tests[] = {-1.23456789e-37, -3.14159265e-2, -1234.56789, -1.2345678, 0., 1e-40, 0.1234567, 123.456789, 2.473829e31};
#define TESTN 9
static const float tests[] = {-1.23456789e-37f, -3.14159265e-2f, -1234.56789f, -1.2345678f, 0.f, 1e-40f, 0.1234567f, 123.456789f, 2.473829e31f,
NAN, INFINITY, -INFINITY};
#define TESTN 12
int main(void){
sysreset();
@ -100,15 +108,14 @@ int main(void){
usart_setup();
usart_send("Start\n");
uint32_t ctr = Tms;
float x = 0.519, more = 5.123;
float more = 5.123f, ang = 0.f;
while(1){
if(Tms - ctr > 499){
ctr = Tms;
pin_toggle(GPIOB, 1 << 1 | 1 << 0); // toggle LED @ PB0
/**/
if((x += 0.519) > more){
more += 5.123;
}
more += 0.1234567f;
ang += 0.5f;
}
if(bufovr){
bufovr = 0;
@ -121,6 +128,16 @@ int main(void){
usart_send(float2str(tests[i], j));
usart_putchar('\n');
}
usart_send("\nValue of 'more': ");
usart_send(float2str(more, 4));
usart_send(", sqrt of 'more': ");
usart_send(float2str(sqrtf(more), 4));
usart_send("\nValue of 'ang': ");
usart_send(float2str(ang, 4));
usart_send(", tan of 'ang' degr: ");
usart_send(float2str(tan(ang/180.f*M_PI), 4));
usart_send("\ninf and nan: "); usart_send(float2str(ang/0.f, 4)); usart_putchar(' '); usart_send(float2str(sqrtf(-ang), 4));
usart_putchar('\n');
}else{
usart_send("Get by USART1: ");
usart_send(txt);

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@ -0,0 +1,119 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# script for stm32f3x family
#
# stm32 devices support both JTAG and SWD transports.
#
source [find interface/stlink-v2-1.cfg]
source [find target/swj-dp.tcl]
source [find mem_helper.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32f3x
}
set _ENDIAN little
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable.
adapter speed 1000
adapter srst delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
if { [using_jtag] } {
# See STM Document RM0316
# Section 29.6.3 - corresponds to Cortex-M4 r0p1
set _CPUTAPID 0x4ba00477
} {
set _CPUTAPID 0x2ba01477
}
}
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
reset_config srst_nogate
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
proc stm32f3x_default_reset_start {} {
# Reset clock is HSI (8 MHz)
adapter speed 1000
}
proc stm32f3x_default_examine_end {} {
# Enable debug during low power modes (uses more power)
mmw 0xe0042004 0x00000007 0 ;# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
# Stop watchdog counters during halt
mmw 0xe0042008 0x00001800 0 ;# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
}
proc stm32f3x_default_reset_init {} {
# Configure PLL to boost clock to HSI x 8 (64 MHz)
mww 0x40021004 0x00380400 ;# RCC_CFGR = PLLMUL[3:1] | PPRE1[2]
mmw 0x40021000 0x01000000 0 ;# RCC_CR |= PLLON
mww 0x40022000 0x00000012 ;# FLASH_ACR = PRFTBE | LATENCY[1]
sleep 10 ;# Wait for PLL to lock
mmw 0x40021004 0x00000002 0 ;# RCC_CFGR |= SW[1]
# Boost JTAG frequency
adapter speed 8000
}
# Default hooks
$_TARGETNAME configure -event examine-end { stm32f3x_default_examine_end }
$_TARGETNAME configure -event reset-start { stm32f3x_default_reset_start }
$_TARGETNAME configure -event reset-init { stm32f3x_default_reset_init }
tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname} {
targets $_targetname
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xe0042004 0x00000020 0
}
$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME"

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@ -0,0 +1 @@
-std=c17

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@ -0,0 +1,7 @@
// Add predefined macros for your project here. For example:
// #define THE_ANSWER 42
#define EBUG
#define STM32F3
#define STM32F303xb
#define __thumb2__ 1
#define __ARM_ARCH_7M__

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@ -0,0 +1 @@
[General]

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@ -0,0 +1,157 @@
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@ -0,0 +1 @@
-std=c++17

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@ -0,0 +1,5 @@
hardware.c
hardware.h
main.c
usart.c
usart.h

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@ -0,0 +1,6 @@
.
../inc
../inc/Fx
../inc/cm
../inc/ld
../inc/startup