mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-02-28 03:44:30 +03:00
add SSI->SPI on NUCLEO042
This commit is contained in:
137
F0:F030,F042,F072/NUCLEO_SPI/Makefile
Normal file
137
F0:F030,F042,F072/NUCLEO_SPI/Makefile
Normal file
@@ -0,0 +1,137 @@
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BINARY = usart
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BOOTPORT ?= /dev/ttyUSB0
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BOOTSPEED ?= 115200
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# MCU FAMILY
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FAMILY = F0
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||||
# MCU code
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MCU = F042x6
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DEFS += -DEBUG
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# change this linking script depending on particular MCU model,
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# for example, if you have STM32F103VBT6, you should write:
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LDSCRIPT = stm32f042k.ld
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INDEPENDENT_HEADERS=
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FP_FLAGS ?= -msoft-float
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ASM_FLAGS = -mthumb -mcpu=cortex-m0 -march=armv6-m -mtune=cortex-m0
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ARCH_FLAGS = $(ASM_FLAGS) $(FP_FLAGS)
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###############################################################################
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# Executables
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PREFIX ?= /opt/bin/arm-none-eabi
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RM := rm -f
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RMDIR := rmdir
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CC := $(PREFIX)-gcc
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LD := $(PREFIX)-gcc
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AR := $(PREFIX)-ar
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AS := $(PREFIX)-as
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OBJCOPY := $(PREFIX)-objcopy
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OBJDUMP := $(PREFIX)-objdump
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GDB := $(PREFIX)-gdb
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STFLASH := $(shell which st-flash)
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STBOOT := $(shell which stm32flash)
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###############################################################################
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# Source files
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OBJDIR = mk
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LDSCRIPT ?= $(BINARY).ld
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SRC := $(wildcard *.c)
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OBJS := $(addprefix $(OBJDIR)/, $(SRC:%.c=%.o))
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STARTUP = $(OBJDIR)/startup.o
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OBJS += $(STARTUP)
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DEPS := $(OBJS:.o=.d)
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INC_DIR ?= ../inc
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INCLUDE := -I$(INC_DIR)/F0 -I$(INC_DIR)/cm
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LIB_DIR := $(INC_DIR)/ld
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###############################################################################
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# C flags
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CFLAGS += -O2 -g -MD -D__thumb2__=1
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CFLAGS += -Wall -Werror -Wextra -Wshadow -Wimplicit-function-declaration
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CFLAGS += -Wredundant-decls $(INCLUDE)
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# -Wmissing-prototypes -Wstrict-prototypes
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CFLAGS += -fno-common -ffunction-sections -fdata-sections
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###############################################################################
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# Linker flags
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LDFLAGS += --static -nostartfiles
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#--specs=nano.specs
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LDFLAGS += -L$(LIB_DIR)
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LDFLAGS += -T$(LDSCRIPT)
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LDFLAGS += -Wl,-Map=$(OBJDIR)/$(BINARY).map
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LDFLAGS += -Wl,--gc-sections
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###############################################################################
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# Used libraries
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LDLIBS += -Wl,--start-group -lc -lgcc -Wl,--end-group
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LDLIBS += $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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DEFS += -DSTM32$(FAMILY) -DSTM32$(MCU)
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#.SUFFIXES: .elf .bin .hex .srec .list .map .images
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#.SECONDEXPANSION:
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#.SECONDARY:
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ELF := $(OBJDIR)/$(BINARY).elf
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LIST := $(OBJDIR)/$(BINARY).list
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BIN := $(BINARY).bin
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HEX := $(BINARY).hex
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all: bin list
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elf: $(ELF)
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bin: $(BIN)
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hex: $(HEX)
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list: $(LIST)
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ifneq ($(MAKECMDGOALS),clean)
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-include $(DEPS)
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endif
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$(OBJDIR):
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mkdir $(OBJDIR)
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$(STARTUP): $(INC_DIR)/startup/vector.c
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$(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $<
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$(OBJDIR)/%.o: %.c
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@echo " CC $<"
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$(CC) $(CFLAGS) $(DEFS) $(INCLUDE) $(ARCH_FLAGS) -o $@ -c $<
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#$(OBJDIR)/%.d: %.c $(OBJDIR)
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# $(CC) -MM -MG $< | sed -e 's,^\([^:]*\)\.o[ ]*:,$(@D)/\1.o $(@D)/\1.d:,' >$@
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$(BIN): $(ELF)
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@echo " OBJCOPY $(BIN)"
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$(OBJCOPY) -Obinary $(ELF) $(BIN)
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$(HEX): $(ELF)
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@echo " OBJCOPY $(HEX)"
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$(OBJCOPY) -Oihex $(ELF) $(HEX)
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$(LIST): $(ELF)
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@echo " OBJDUMP $(LIST)"
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$(OBJDUMP) -S $(ELF) > $(LIST)
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$(ELF): $(OBJDIR) $(OBJS)
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@echo " LD $(ELF)"
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$(LD) $(LDFLAGS) $(ARCH_FLAGS) $(OBJS) $(LDLIBS) -o $(ELF)
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clean:
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@echo " CLEAN"
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$(RM) $(OBJS) $(DEPS) $(ELF) $(HEX) $(LIST) $(OBJDIR)/*.map
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@rmdir $(OBJDIR) 2>/dev/null || true
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flash: $(BIN)
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@echo " FLASH $(BIN)"
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$(STFLASH) write $(BIN) 0x8000000
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boot: $(BIN)
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@echo " LOAD $(BIN) through bootloader"
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$(STBOOT) -b$(BOOTSPEED) $(BOOTPORT) -w $(BIN)
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.PHONY: clean flash boot
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9
F0:F030,F042,F072/NUCLEO_SPI/Readme
Normal file
9
F0:F030,F042,F072/NUCLEO_SPI/Readme
Normal file
@@ -0,0 +1,9 @@
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This is a simple USART over DMA application with software end of string control.
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Speed 115200. Received string echoes back.
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run
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DEFS=-DCHECK_TMOUT make
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to add timeout 1.5s for each letter
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DEFS="-DCHECK_TMOUT -DTIMEOUT_MS=xx" make
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to make another timeout
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101
F0:F030,F042,F072/NUCLEO_SPI/main.c
Normal file
101
F0:F030,F042,F072/NUCLEO_SPI/main.c
Normal file
@@ -0,0 +1,101 @@
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/*
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* main.c
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*
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* Copyright 2017 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
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*
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||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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||||
* MA 02110-1301, USA.
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||||
*/
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#include <stm32f0.h>
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#include "spi.h"
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#include "usart.h"
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volatile uint32_t Tms = 0;
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/* Called when systick fires */
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void sys_tick_handler(void){
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++Tms;
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}
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static void gpio_setup(void){
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// Set green led (PB3) as output - no, PB3 is SCK!
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//RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
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//GPIOB->MODER = GPIO_MODER_MODER3_O;
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}
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static void printuhex(uint8_t *arr, uint8_t l){
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if(l > 32 || l == 0) return;
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char buf[70] = "0x";
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int8_t i, j, bidx = 2;
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for(i = 0; i < l; ++i, ++arr){
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for(j = 1; j > -1; --j){
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uint8_t half = (*arr >> (4*j)) & 0x0f;
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if(half < 10) buf[bidx++] = half + '0';
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else buf[bidx++] = half - 10 + 'a';
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}
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}
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buf[bidx++] = '\n';
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SEND(buf, bidx);
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}
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static void print14bit(uint8_t *arr){
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uint8_t _16[2];
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_16[0] = (arr[0]>>4)&3; _16[1] = (arr[0]<<4) | (arr[1] >> 4);
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printuhex(_16, 2);
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//SEND("\n\n", 2);
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}
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int main(void){
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uint32_t /*lastT = 0,*/ dctr = 0;
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int16_t L = 0;
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uint8_t buf[SPIBUFSZ], len;
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char *txt;
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sysreset();
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SysTick_Config(6000, 1);
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gpio_setup();
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spi_setup();
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usart2_setup();
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while (1){
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/* if(Tms - lastT > 499){
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pin_toggle(GPIOB, 1<<3); // blink by onboard LED once per second
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lastT = Tms;
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}*/
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if(usart2rx()){ // usart1 received data, store in in buffer
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L = usart2_getline(&txt);
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// do something with received data
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}
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if(L){ // text waits for sending
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if(ALL_OK == usart2_send(txt, L)){
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L = 0;
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}
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}
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len = SPIBUFSZ;
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uint8_t a = SPI_getdata(buf, &len);
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if(a){
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//printuhex(buf, len);
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print14bit(buf);
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}
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if(Tms - dctr > 999){// once per 1 second
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dctr = Tms;
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//SEND("pre\n", 4);
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SPI_prep_receive();
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}
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}
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return 0;
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}
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||||
|
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119
F0:F030,F042,F072/NUCLEO_SPI/spi.c
Normal file
119
F0:F030,F042,F072/NUCLEO_SPI/spi.c
Normal file
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
* This file is part of the F0testbrd project.
|
||||
* Copyright 2021 Edward V. Emelianov <edward.emelianoff@gmail.com>.
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <string.h> // memcpy
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||||
#include "usart.h"
|
||||
#include "spi.h"
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||||
|
||||
|
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// buffers for DMA rx/tx
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static uint8_t inbuff[SPIBUFSZ], outbuff[SPIBUFSZ];
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||||
static uint8_t rxrdy = 0;
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|
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// SPI1 (AF0): PB3 - SCK, PB4 - MISO, PB5 - MOSI; RxDMA - ch2
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void spi_setup(){
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RCC->AHBENR |= RCC_AHBENR_GPIOBEN; // uncomment in common case
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||||
/* (1) Select AF mode on pins */
|
||||
/* (2) AF0 for SPI1 signals */
|
||||
GPIOB->MODER = (GPIOB->MODER & ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER4)) |
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||||
GPIO_MODER_MODER3_AF | GPIO_MODER_MODER4_AF; /* (1) */
|
||||
GPIOB->AFR[0] = (GPIOB->AFR[0] & ~(GPIO_AFRL_AFRL3 | GPIO_AFRL_AFRL4)); /* (2) */
|
||||
// enable clocking
|
||||
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
|
||||
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
|
||||
// Configure DMA SPI
|
||||
/* SPI_RX DMA config */
|
||||
/* (1) Peripheral address */
|
||||
/* (2) Memory address */
|
||||
/* (3) Data size */
|
||||
/* (4) Memory increment */
|
||||
/* Peripheral to memory */
|
||||
/* 8-bit transfer */
|
||||
/* Overflow IR */
|
||||
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
|
||||
DMA1_Channel2->CPAR = (uint32_t)&(SPI1->DR); /* (1) */
|
||||
DMA1_Channel2->CMAR = (uint32_t)inbuff; /* (2) */
|
||||
DMA1_Channel2->CNDTR = SPIBUFSZ; /* (3) */
|
||||
DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_EN; /* (4) */
|
||||
/* (5) Peripheral address */
|
||||
/* (6) Memory address */
|
||||
/* (7) Memory increment */
|
||||
/* Memory to peripheral*/
|
||||
/* 8-bit transfer */
|
||||
/* Transfer complete IT */
|
||||
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
|
||||
DMA1_Channel3->CPAR = (uint32_t)&(SPI1->DR); /* (5) */
|
||||
DMA1_Channel3->CMAR = (uint32_t)outbuff; /* (6) */
|
||||
DMA1_Channel3->CCR |= DMA_CCR_MINC | DMA_CCR_TCIE | DMA_CCR_DIR; /* (7) */
|
||||
NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
|
||||
NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
|
||||
/* Configure SPI */
|
||||
/* (1) Master selection, BR: Fpclk/256 CPOL and CPHA at zero (rising first edge) */
|
||||
/* (1a) software slave management (SSI inactive) */
|
||||
/* (2) TX and RX with DMA, 8-bit Rx fifo */
|
||||
/* (3) Enable SPI */
|
||||
SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_BR | SPI_CR1_SSM | SPI_CR1_SSI; /* (1) */
|
||||
SPI1->CR2 = SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN | SPI_CR2_FRXTH | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0; /* (2) */
|
||||
SPI1->CR1 |= SPI_CR1_SPE; /* (3) */
|
||||
SPI_prep_receive();
|
||||
}
|
||||
|
||||
// prepare to receive data
|
||||
void SPI_prep_receive(){
|
||||
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
|
||||
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
|
||||
rxrdy = 0;
|
||||
(void)SPI1->DR; // read DR and SR to clear OVR flag
|
||||
(void)SPI1->SR;
|
||||
DMA1_Channel2->CNDTR = SPIBUFSZ;
|
||||
DMA1_Channel3->CNDTR = SPIBUFSZ;
|
||||
DMA1_Channel2->CCR |= DMA_CCR_EN;
|
||||
DMA1_Channel3->CCR |= DMA_CCR_EN;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI_getdata - get data received by DMA & reload receiver
|
||||
* @param buf - buffer for data (with length maxlen) or NULL
|
||||
* @param maxlen - (I) - amount of received bytes (or 0 if buffer is empty),
|
||||
* (O) - amount of real bytes amount in buffer (could be > maxlen if maxlen < SPIBUFSZ)
|
||||
* @return 1 if got data
|
||||
*/
|
||||
uint8_t SPI_getdata(uint8_t *buf, uint8_t *maxlen){
|
||||
if(!rxrdy) return 0;
|
||||
//SEND("def\n", 4);
|
||||
uint8_t remain = DMA1_Channel2->CNDTR;
|
||||
if(remain) return 0;
|
||||
rxrdy = 0;
|
||||
if(maxlen){
|
||||
if(buf && *maxlen) memcpy(buf, inbuff, *maxlen);
|
||||
*maxlen = SPIBUFSZ; // bytes received
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
void dma1_channel2_3_isr(){
|
||||
if(DMA1->ISR & DMA_ISR_TCIF3){
|
||||
DMA1->IFCR |= DMA_IFCR_CTCIF3;
|
||||
DMA1_Channel3->CCR &= ~DMA_CCR_EN;
|
||||
rxrdy = 1;
|
||||
}
|
||||
if(DMA1->ISR & DMA_ISR_TEIF2){ // receiver overflow
|
||||
DMA1->IFCR |= DMA_IFCR_CTEIF2;
|
||||
DMA1_Channel2->CCR &= ~DMA_CCR_EN;
|
||||
}
|
||||
}
|
||||
41
F0:F030,F042,F072/NUCLEO_SPI/spi.h
Normal file
41
F0:F030,F042,F072/NUCLEO_SPI/spi.h
Normal file
@@ -0,0 +1,41 @@
|
||||
/*
|
||||
* This file is part of the F0testbrd project.
|
||||
* Copyright 2021 Edward V. Emelianov <edward.emelianoff@gmail.com>.
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef SPI_H__
|
||||
#define SPI_H__
|
||||
|
||||
#include <stm32f0.h>
|
||||
|
||||
// 5 bytes == 40 bits
|
||||
#define SPIBUFSZ (2)
|
||||
|
||||
typedef enum{
|
||||
SPI_NOTREADY,
|
||||
SPI_READY,
|
||||
SPI_BUSY
|
||||
} spiStatus;
|
||||
|
||||
extern spiStatus SPI_status[];
|
||||
extern volatile uint8_t SPIoverfl[];
|
||||
|
||||
void spi_setup();
|
||||
void SPI_prep_receive();
|
||||
uint8_t SPI_getdata(uint8_t *buf, uint8_t *maxlen);
|
||||
|
||||
#endif // SPI_H__
|
||||
BIN
F0:F030,F042,F072/NUCLEO_SPI/usart.bin
Executable file
BIN
F0:F030,F042,F072/NUCLEO_SPI/usart.bin
Executable file
Binary file not shown.
153
F0:F030,F042,F072/NUCLEO_SPI/usart.c
Normal file
153
F0:F030,F042,F072/NUCLEO_SPI/usart.c
Normal file
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
* usart.c
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#include <stm32f0.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "usart.h"
|
||||
|
||||
extern volatile uint32_t Tms;
|
||||
static int datalen[2] = {0,0}; // received data line length (including '\n')
|
||||
|
||||
int linerdy = 0, // received data ready
|
||||
dlen = 0, // length of data (including '\n') in current buffer
|
||||
bufovr = 0, // input buffer overfull
|
||||
txrdy = 1 // transmission done
|
||||
;
|
||||
|
||||
|
||||
int rbufno = 0; // current rbuf number
|
||||
static char rbuf[UARTBUFSZ][2], tbuf[UARTBUFSZ]; // receive & transmit buffers
|
||||
static char *recvdata = NULL;
|
||||
|
||||
/**
|
||||
* return length of received data (without trailing zero
|
||||
*/
|
||||
int usart2_getline(char **line){
|
||||
if(bufovr){
|
||||
bufovr = 0;
|
||||
linerdy = 0;
|
||||
return 0;
|
||||
}
|
||||
*line = recvdata;
|
||||
linerdy = 0;
|
||||
return dlen;
|
||||
}
|
||||
|
||||
TXstatus usart2_send(const char *str, int len){
|
||||
if(!txrdy) return LINE_BUSY;
|
||||
if(len > UARTBUFSZ) return STR_TOO_LONG;
|
||||
txrdy = 0;
|
||||
memcpy(tbuf, str, len);
|
||||
DMA1_Channel4->CCR &= ~DMA_CCR_EN;
|
||||
DMA1_Channel4->CNDTR = len;
|
||||
DMA1_Channel4->CCR |= DMA_CCR_EN; // start transmission
|
||||
return ALL_OK;
|
||||
}
|
||||
|
||||
TXstatus usart2_send_blocking(const char *str, int len){
|
||||
if(!txrdy) return LINE_BUSY;
|
||||
int i;
|
||||
bufovr = 0;
|
||||
for(i = 0; i < len; ++i){
|
||||
USART2->TDR = *str++;
|
||||
while(!(USART2->ISR & USART_ISR_TXE));
|
||||
}
|
||||
txrdy = 1;
|
||||
return ALL_OK;
|
||||
}
|
||||
|
||||
|
||||
// Nucleo's USART2 connected to VCP proxy of st-link
|
||||
void usart2_setup(){
|
||||
// setup pins: PA2 (Tx - AF1), PA15 (Rx - AF1)
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_DMAEN;
|
||||
// AF mode (AF1)
|
||||
GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODER2|GPIO_MODER_MODER15))\
|
||||
| (GPIO_MODER_MODER2_1 | GPIO_MODER_MODER15_1);
|
||||
GPIOA->AFR[0] = (GPIOA->AFR[0] &~GPIO_AFRH_AFRH2) | 1 << (2 * 4); // PA2
|
||||
GPIOA->AFR[1] = (GPIOA->AFR[1] &~GPIO_AFRH_AFRH7) | 1 << (7 * 4); // PA15
|
||||
// DMA: Tx - Ch4
|
||||
DMA1_Channel4->CPAR = (uint32_t) &USART2->TDR; // periph
|
||||
DMA1_Channel4->CMAR = (uint32_t) tbuf; // mem
|
||||
DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
|
||||
// Tx CNDTR set @ each transmission due to data size
|
||||
NVIC_SetPriority(DMA1_Channel4_5_IRQn, 3);
|
||||
NVIC_EnableIRQ(DMA1_Channel4_5_IRQn);
|
||||
NVIC_SetPriority(USART2_IRQn, 0);
|
||||
// setup usart2
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USART2EN; // clock
|
||||
// oversampling by16, 115200bps (fck=48mHz)
|
||||
//USART2_BRR = 0x1a1; // 48000000 / 115200
|
||||
USART2->BRR = 480000 / 1152;
|
||||
USART2->CR3 = USART_CR3_DMAT; // enable DMA Tx
|
||||
USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // 1start,8data,nstop; enable Rx,Tx,USART
|
||||
while(!(USART2->ISR & USART_ISR_TC)); // polling idle frame Transmission
|
||||
USART2->ICR |= USART_ICR_TCCF; // clear TC flag
|
||||
USART2->CR1 |= USART_CR1_RXNEIE;
|
||||
NVIC_EnableIRQ(USART2_IRQn);
|
||||
}
|
||||
|
||||
|
||||
void dma1_channel4_5_isr(){
|
||||
if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx
|
||||
DMA1->IFCR |= DMA_IFCR_CTCIF4; // clear TC flag
|
||||
txrdy = 1;
|
||||
}
|
||||
}
|
||||
|
||||
void usart2_isr(){
|
||||
#ifdef CHECK_TMOUT
|
||||
static uint32_t tmout = 0;
|
||||
#endif
|
||||
if(USART2->ISR & USART_ISR_RXNE){ // RX not emty - receive next char
|
||||
#ifdef CHECK_TMOUT
|
||||
if(tmout && Tms >= tmout){ // set overflow flag
|
||||
bufovr = 1;
|
||||
datalen[rbufno] = 0;
|
||||
}
|
||||
tmout = Tms + TIMEOUT_MS;
|
||||
if(!tmout) tmout = 1; // prevent 0
|
||||
#endif
|
||||
// read RDR clears flag
|
||||
uint8_t rb = USART2->RDR;
|
||||
if(datalen[rbufno] < UARTBUFSZ){ // put next char into buf
|
||||
rbuf[rbufno][datalen[rbufno]++] = rb;
|
||||
if(rb == '\n'){ // got newline - line ready
|
||||
linerdy = 1;
|
||||
dlen = datalen[rbufno];
|
||||
recvdata = rbuf[rbufno];
|
||||
// prepare other buffer
|
||||
rbufno = !rbufno;
|
||||
datalen[rbufno] = 0;
|
||||
#ifdef CHECK_TMOUT
|
||||
// clear timeout at line end
|
||||
tmout = 0;
|
||||
#endif
|
||||
}
|
||||
}else{ // buffer overrun
|
||||
bufovr = 1;
|
||||
datalen[rbufno] = 0;
|
||||
#ifdef CHECK_TMOUT
|
||||
tmout = 0;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
50
F0:F030,F042,F072/NUCLEO_SPI/usart.h
Normal file
50
F0:F030,F042,F072/NUCLEO_SPI/usart.h
Normal file
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* usart.h
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianoff <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#pragma once
|
||||
#ifndef __USART_H__
|
||||
#define __USART_H__
|
||||
|
||||
// input and output buffers size
|
||||
#define UARTBUFSZ (64)
|
||||
// timeout between data bytes
|
||||
#ifndef TIMEOUT_MS
|
||||
#define TIMEOUT_MS (1500)
|
||||
#endif
|
||||
|
||||
typedef enum{
|
||||
ALL_OK,
|
||||
LINE_BUSY,
|
||||
STR_TOO_LONG
|
||||
} TXstatus;
|
||||
|
||||
#define SEND(s, l) do{}while(ALL_OK != usart2_send(s, l))
|
||||
|
||||
#define usart2rx() (linerdy)
|
||||
#define usart2ovr() (bufovr)
|
||||
|
||||
extern int linerdy, bufovr, txrdy;
|
||||
|
||||
void usart2_setup();
|
||||
int usart2_getline(char **line);
|
||||
TXstatus usart2_send(const char *str, int len);
|
||||
TXstatus usart2_send_blocking(const char *str, int len);
|
||||
|
||||
#endif // __USART_H__
|
||||
Reference in New Issue
Block a user