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partial work for interrupt-driven
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@@ -123,8 +123,8 @@ TRUE_INLINE int StartHSE(){ // system bus 72MHz from PLL
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WAITWHILE(!(RCC->CR & RCC_CR_PLLRDY));
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// Select PLL as system clock source
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RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW) | RCC_CFGR_SW_PLL;
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// select system clock as I2C source
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RCC->CFGR3 |= RCC_CFGR3_I2C1SW_SYSCLK | RCC_CFGR3_I2C1SW_SYSCLK;
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// select system clock as I2C source (default: HSI)
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RCC->CFGR3 |= RCC_CFGR3_I2C1SW_SYSCLK | RCC_CFGR3_I2C2SW_SYSCLK;
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// Wait till PLL is used as system clock source
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WAITWHILE((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
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SysFreq = 72000000;
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