mirror of
https://github.com/eddyem/stm32samples.git
synced 2026-03-21 09:11:00 +03:00
add USART snippet (Rx by USART interrupts, Tx by DMA; double buffering for both Tx/Rx)
This commit is contained in:
@@ -1,5 +1,4 @@
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Toggle LEDs (PB8/PB9) on STM32F103 development board depending on buttons PC0,PC1:
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- no buttons pressed == 'SOS' in Morze @ LED D1
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- Button S2 pressed - D1 blinks with period of 5s
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- Button S1 pressed - D2 blinks with period of 1s
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Toggle LED PB9 on STM32F103 development board once per second
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Allow to turn on/off LED PB8 depending on user commands over USART (0/1) and check its state (s)
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Show information in USART console about S2/S3 buttons pressed
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USART: 115200 8n1
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@@ -22,6 +22,9 @@
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#include "stm32f1.h"
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#include "usart.h"
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// debounce pause (ms - 1)
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#define DEBOUNCE_PAUSE (9)
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static volatile uint32_t Tms = 0; // milliseconds from last reset
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// Called when systick fires
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@@ -40,6 +43,47 @@ static void gpio_setup(void){
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GPIOC->CRL = CRL(0, CNF_PUDINPUT|MODE_INPUT) | CRL(1, CNF_PUDINPUT|MODE_INPUT);
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}
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typedef enum{
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BTN_PRESSED
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,BTN_RELEASED
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,BTN_DEBOUNCE
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,BTN_RELAX
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} button_state;
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button_state check_state(uint8_t N){
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static uint32_t tlast[2] = {0,0};
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static button_state oldstate[2] = {BTN_RELEASED, BTN_RELEASED};
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button_state s = BTN_RELAX;
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uint8_t b = pin_read(GPIOC, N+1); // == 1 if button released
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if(b){
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switch(oldstate[N]){
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case BTN_PRESSED: // debounce pause for DEBOUNCE_PAUSE ms
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s = oldstate[N] = BTN_DEBOUNCE;
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tlast[N] = Tms;
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break;
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case BTN_DEBOUNCE: // check debounce pause
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if(Tms - tlast[N] > DEBOUNCE_PAUSE){
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s = oldstate[N] = BTN_RELEASED;
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}
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break;
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default: // BTN_RELEASED - do nothing -> return BTN_RELAX
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;
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}
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}else{
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switch(oldstate[N]){
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case BTN_RELEASED:
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s = BTN_PRESSED; // button was just pressed
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__attribute__((fallthrough)); // change oldstate too
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case BTN_DEBOUNCE: // change old state to BTN_PRESSED again
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oldstate[N] = BTN_PRESSED; // returned state still relax
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break;
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default: // BTN_PRESSED before - do nothing
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;
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}
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}
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return s;
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}
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int main(){
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int L;
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char *txt;
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@@ -98,6 +142,26 @@ int main(){
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transmit_tbuf();
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L = 0;
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}
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for(int i = 0; i < 2; ++i){
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const char *st = NULL;
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switch(check_state(i)){
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case BTN_PRESSED:
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st = "pressed";
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break;
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case BTN_RELEASED:
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st = "released";
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break;
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default:
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; // nothing
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}
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if(st){
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SEND("The button");
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usart_putchar('2' + i);
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SEND(" was ");
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SEND(st);
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newline();
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}
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}
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/*
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uint8_t
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Binary file not shown.
@@ -53,32 +53,15 @@ int usart_getline(char **line){
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// transmit current tbuf and swap buffers
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void transmit_tbuf(){
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uint32_t tmout = 16000000;
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while(!txrdy){if(--tmout == 0) break;}; // wait for previos buffer transmission
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while(!txrdy){if(--tmout == 0) return;}; // wait for previos buffer transmission
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register int l = odatalen[tbufno];
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if(!l) return;
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//txrdy = 0;
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txrdy = 0;
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odatalen[tbufno] = 0;
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char *buf = tbuf[tbufno];
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for(int i = 0; i < l; ++i){
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USART1->DR = *buf++;
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tmout = 16000000;
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while(!(USART1->SR & USART_SR_TXE)){if(--tmout == 0)break;};
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}
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/*
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#if USARTNUM == 2
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DMA1_Channel4->CCR &= ~DMA_CCR_EN;
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DMA1_Channel4->CMAR = (uint32_t) tbuf[tbufno]; // mem
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DMA1_Channel4->CNDTR = l;
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DMA1_Channel4->CCR |= DMA_CCR_EN; // start transmission
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#elif USARTNUM == 1
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DMA1_Channel2->CCR &= ~DMA_CCR_EN;
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DMA1_Channel2->CMAR = (uint32_t) tbuf[tbufno]; // mem
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DMA1_Channel2->CNDTR = l;
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DMA1_Channel2->CCR |= DMA_CCR_EN;
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#else
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#error "Not implemented"
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#endif
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*/
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DMA1_Channel4->CCR |= DMA_CCR_EN;
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tbufno = !tbufno;
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}
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@@ -113,16 +96,15 @@ void usart_setup(){
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uint32_t tmout = 16000000;
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// PA9 - Tx, PA10 - Rx
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_AFIOEN;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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GPIOA->CRH = CRH(9, CNF_AFPP|MODE_NORMAL) | CRH(10, CNF_FLINPUT|MODE_INPUT);
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/*
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// USART1 Tx DMA - Channel2 (default value in SYSCFG_CFGR1)
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DMA1_Channel2->CPAR = (uint32_t) &USART1->TDR; // periph
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DMA1_Channel2->CMAR = (uint32_t) tbuf; // mem
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DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
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// USART1 Tx DMA - Channel4 (Rx - channel 5)
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DMA1_Channel4->CPAR = (uint32_t) &USART1->DR; // periph
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DMA1_Channel4->CCR |= DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_TCIE; // 8bit, mem++, mem->per, transcompl irq
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// Tx CNDTR set @ each transmission due to data size
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NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3);
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NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);*/
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//USART1->CR3 = USART_CR3_DMAT; // enable DMA Tx
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NVIC_SetPriority(DMA1_Channel4_IRQn, 3);
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NVIC_EnableIRQ(DMA1_Channel4_IRQn);
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NVIC_SetPriority(USART1_IRQn, 0);
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// setup usart1
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USART1->BRR = 72000000 / 115200;
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@@ -130,6 +112,7 @@ void usart_setup(){
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while(!(USART1->SR & USART_SR_TC)){if(--tmout == 0) break;} // polling idle frame Transmission
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USART1->SR = 0; // clear flags
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USART1->CR1 |= USART_CR1_RXNEIE; // allow Rx IRQ
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USART1->CR3 = USART_CR3_DMAT; // enable DMA Tx
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NVIC_EnableIRQ(USART1_IRQn);
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}
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@@ -220,6 +203,14 @@ void hexdump(uint8_t *arr, uint16_t len){
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else if(l & 1) usart_putchar(' ');
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}
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}
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void dma1_channel4_isr(){
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if(DMA1->ISR & DMA_ISR_TCIF4){ // Tx
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DMA1->IFCR = DMA_IFCR_CTCIF4; // clear TC flag
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txrdy = 1;
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}
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}
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/*
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#if USARTNUM == 2
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void dma1_channel4_5_isr(){
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@@ -24,8 +24,8 @@
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#define __USART_H__
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// input and output buffers size
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#define UARTBUFSZI (32)
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#define UARTBUFSZO (512)
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#define UARTBUFSZI (16)
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#define UARTBUFSZO (32)
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// timeout between data bytes
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#ifndef TIMEOUT_MS
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#define TIMEOUT_MS (1500)
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