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https://github.com/eddyem/stm32samples.git
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add modbus RTU
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@@ -69,7 +69,9 @@ Xn - inputs, Yn - outputs, ADCn - ADC inputs
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| 67 | PA8 | Y2 | PPOUT | |
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| 68 | PA9 | RS TX | AFPP | |
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| 69 | PA10 | RS RX | FLIN | |
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| 76 | PA14/SWCLK | 485 DE * | (default) | (Not now) RS-485 Data Enable |
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| 76 | PA14/SWCLK | 485 DE | PPOUT | RS-485 Data Tx Enable |
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| 78 | PC10 | 485 TX | AFPP | RS-485 Tx |
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| 79 | PC11 | 485 RX | FLIN | RS-485 Rx |
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| 81 | PD0 | CAN RX | FLIN | |
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| 82 | PD1 | CAN TX | AFPP | |
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| 89 | PB3/JTDO | Y4 | PPOUT | |
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@@ -82,27 +84,32 @@ void gpio_setup(void){
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// PD0 & PD1 (CAN) setup in can.c; PA9 & PA10 (USART) in usart.c
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |
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RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN;
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// Turn off JTAG
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AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
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GPIOA->CRL = CRL(0, CNF_PPOUTPUT|MODE_NORMAL) | CRL(1, CNF_ANALOG) | CRL(2, CNF_PPOUTPUT|MODE_NORMAL) |
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CRL(3, CNF_ANALOG) | CRL(6, CNF_PPOUTPUT|MODE_NORMAL) | CRL(7, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOA->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOB->CRL = CRL(2, CNF_PUDINPUT) | CRL(3, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOB->CRH = CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) | CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) |
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CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOC-> CRL = CRL(0, CNF_ANALOG) | CRL(1, CNF_ANALOG) | CRL(4, CNF_ANALOG) | CRL(5, CNF_ANALOG);
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GPIOC->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL) | CRH(9, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOD->CRL = 0;
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GPIOD->CRH = CRH(10, CNF_PPOUTPUT|MODE_NORMAL) | CRH(12, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOE->CRL = CRL(7, CNF_PUDINPUT);
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GPIOE->CRH = CRH(8, CNF_PUDINPUT) | CRH(9, CNF_PUDINPUT) | CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) |
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CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) | CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PUDINPUT);
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// Turn off JTAG/SWD to use PA14
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AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_DISABLE;
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// be sure that all OK
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// __ISB();
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// __DSB();
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// pullups & initial values
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GPIOA->ODR = 0;
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GPIOB->ODR = (1<<2) | (1<<10) | (1<<11) | (1<<12) | (1<<13) | (1<<14);
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GPIOC->ODR = 0;
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GPIOD->ODR = (1<<10); // turn off LED
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GPIOE->ODR = (1<<7) | (1<<8) | (1<<9) | (1<<10) | (1<<11) | (1<<12) | (1<<13) | (1<<14) | (1<<15);
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// configuration
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GPIOA->CRL = CRL(0, CNF_PPOUTPUT|MODE_NORMAL) | CRL(1, CNF_ANALOG) | CRL(2, CNF_PPOUTPUT|MODE_NORMAL) |
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CRL(3, CNF_ANALOG) | CRL(6, CNF_PPOUTPUT|MODE_NORMAL) | CRL(7, CNF_PPOUTPUT|MODE_NORMAL);
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//GPIOA->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL) | CRH(14, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOA->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL) | CRH(14, CNF_ODOUTPUT|MODE_NORMAL);
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GPIOB->CRL = CRL(2, CNF_PUDINPUT) | CRL(3, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOB->CRH = CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) | CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) |
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CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOC->CRL = CRL(0, CNF_ANALOG) | CRL(1, CNF_ANALOG) | CRL(4, CNF_ANALOG) | CRL(5, CNF_ANALOG);
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GPIOC->CRH = CRH(8, CNF_PPOUTPUT|MODE_NORMAL) | CRH(9, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOD->CRL = 0;
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GPIOD->CRH = CRH(10, CNF_PPOUTPUT|MODE_NORMAL) | CRH(12, CNF_PPOUTPUT|MODE_NORMAL);
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GPIOE->CRL = CRL(7, CNF_PUDINPUT);
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GPIOE->CRH = CRH(8, CNF_PUDINPUT) | CRH(9, CNF_PUDINPUT) | CRH(10, CNF_PUDINPUT) | CRH(11, CNF_PUDINPUT) |
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CRH(12, CNF_PUDINPUT) | CRH(13, CNF_PUDINPUT) | CRH(14, CNF_PUDINPUT) | CRH(15, CNF_PUDINPUT);
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}
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