mirror of
https://github.com/eddyem/scorpio.git
synced 2026-02-01 04:45:11 +03:00
Temporary system with STM8
This commit is contained in:
parent
3c1b544489
commit
7aee7cc1f4
30
STM8/Makefile
Normal file
30
STM8/Makefile
Normal file
@ -0,0 +1,30 @@
|
|||||||
|
NAME=sco_platform
|
||||||
|
SDCC=sdcc
|
||||||
|
|
||||||
|
CCFLAGS=-DSTM8S105 -I../ -I/usr/share/sdcc/include -mstm8 --out-fmt-ihx
|
||||||
|
LDFLAGS= -mstm8 --out-fmt-ihx -lstm8
|
||||||
|
FLASHFLAGS=-cstlinkv2 -pstm8s105?4
|
||||||
|
|
||||||
|
SRC=$(wildcard *.c)
|
||||||
|
DEFS = -DEBUG
|
||||||
|
|
||||||
|
OBJ=$(SRC:%.c=%.rel)
|
||||||
|
TRASH=$(OBJ) $(SRC:%.c=%.rst) $(SRC:%.c=%.asm) $(SRC:%.c=%.lst)
|
||||||
|
TRASH+=$(SRC:%.c=%.sym) $(NAME).lk $(NAME).map $(NAME).cdb
|
||||||
|
INDEPENDENT_HEADERS=stm8l.h ports_definition.h Makefile
|
||||||
|
|
||||||
|
all: $(NAME).ihx
|
||||||
|
|
||||||
|
clean:
|
||||||
|
rm -f $(TRASH)
|
||||||
|
|
||||||
|
load: $(NAME).ihx
|
||||||
|
stm8flash $(FLASHFLAGS) -w $(NAME).ihx
|
||||||
|
|
||||||
|
%.rel: %.c
|
||||||
|
$(SDCC) $(CCFLAGS) $(DEFS) -c $<
|
||||||
|
|
||||||
|
$(NAME).ihx: $(OBJ)
|
||||||
|
$(SDCC) $(LDFLAGS) $(OBJ) -o $(NAME).ihx
|
||||||
|
|
||||||
|
.PHONY: all
|
||||||
15
STM8/Readme.md
Normal file
15
STM8/Readme.md
Normal file
@ -0,0 +1,15 @@
|
|||||||
|
SCORPIO platform controller
|
||||||
|
============================
|
||||||
|
|
||||||
|
### Based on STM8
|
||||||
|
|
||||||
|
PINS description
|
||||||
|
|
||||||
|
* D6 - USART Rx
|
||||||
|
* D5 - USART Tx
|
||||||
|
* D0..D2 - select motors pair
|
||||||
|
* D3, D4 - select motor from pair
|
||||||
|
* C1..C3 - LED1..LED3
|
||||||
|
* B0..B3 - stepper motors' outputs
|
||||||
|
* B4, B5, F4 - relays (shutter, neon, flat)
|
||||||
|
* A1, A2 - end-switches ("-" and "+")
|
||||||
217
STM8/interrupts.c
Normal file
217
STM8/interrupts.c
Normal file
@ -0,0 +1,217 @@
|
|||||||
|
/*
|
||||||
|
* interrupts.c
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
#include "stepper.h"
|
||||||
|
#include "uart.h"
|
||||||
|
|
||||||
|
// Top Level Interrupt
|
||||||
|
INTERRUPT_HANDLER(TLI_IRQHandler, 0){}
|
||||||
|
|
||||||
|
// Auto Wake Up Interrupt
|
||||||
|
INTERRUPT_HANDLER(AWU_IRQHandler, 1){}
|
||||||
|
|
||||||
|
// Clock Controller Interrupt
|
||||||
|
INTERRUPT_HANDLER(CLK_IRQHandler, 2){}
|
||||||
|
|
||||||
|
// External Interrupt PORTA
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3){}
|
||||||
|
|
||||||
|
// External Interrupt PORTB
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4){}
|
||||||
|
|
||||||
|
// External Interrupt PORTC
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5){}
|
||||||
|
|
||||||
|
// External Interrupt PORTD
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6){
|
||||||
|
}
|
||||||
|
|
||||||
|
// External Interrupt PORTE
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7){}
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// External Interrupt PORTF
|
||||||
|
INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8){}
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined (STM8AF52Ax)
|
||||||
|
// CAN RX Interrupt routine.
|
||||||
|
INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8){}
|
||||||
|
|
||||||
|
// CAN TX Interrupt routine.
|
||||||
|
INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9){}
|
||||||
|
#endif // STM8S208 || STM8AF52Ax
|
||||||
|
|
||||||
|
// SPI Interrupt routine.
|
||||||
|
INTERRUPT_HANDLER(SPI_IRQHandler, 10){}
|
||||||
|
|
||||||
|
// Timer1 Update/Overflow/Trigger/Break Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11){
|
||||||
|
if(TIM1_SR1 & TIM_SR1_UIF){ // update interrupt
|
||||||
|
// Global_time++; // increase timer
|
||||||
|
}
|
||||||
|
TIM1_SR1 = 0; // clear all interrupt flags
|
||||||
|
}
|
||||||
|
|
||||||
|
// Timer1 Capture/Compare Interrupt routine.
|
||||||
|
INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12){}
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// Timer5 Update/Overflow/Break/Trigger Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13){}
|
||||||
|
|
||||||
|
// Timer5 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14){}
|
||||||
|
|
||||||
|
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||||
|
|
||||||
|
volatile char Ustep = 0;
|
||||||
|
// Timer2 Update/Overflow/Break Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){ // generate pulses for stepper CLK
|
||||||
|
char tmp;
|
||||||
|
U8 sw;
|
||||||
|
if(TIM2_SR1 & TIM_SR1_UIF){
|
||||||
|
TIM2_SR1 &= ~TIM_SR1_UIF; // take off flag
|
||||||
|
if(Steps_left == 0){
|
||||||
|
stop_motor();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
tmp = PORT(STP_PORT, ODR) & ~STP_PINS;
|
||||||
|
PORT(STP_PORT, ODR) = tmp | usteps[Ustep];
|
||||||
|
|
||||||
|
sw = check_endsw();
|
||||||
|
if(Dir){
|
||||||
|
if(--Ustep < 0){
|
||||||
|
Ustep = 7;
|
||||||
|
--Steps_left;
|
||||||
|
if(sw == 1){
|
||||||
|
stop_motor();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}else{
|
||||||
|
if(++Ustep > 7){
|
||||||
|
Ustep = 0;
|
||||||
|
--Steps_left;
|
||||||
|
if(sw == 2){
|
||||||
|
stop_motor();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// Timer2 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){
|
||||||
|
}
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||||
|
defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
|
||||||
|
// Timer3 Update/Overflow/Break Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15){}
|
||||||
|
|
||||||
|
// Timer3 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16){}
|
||||||
|
#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
|
||||||
|
defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
|
||||||
|
// UART1 TX Interrupt
|
||||||
|
INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){}
|
||||||
|
|
||||||
|
// UART1 RX Interrupt
|
||||||
|
INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){}
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
|
||||||
|
|
||||||
|
// I2C Interrupt
|
||||||
|
INTERRUPT_HANDLER(I2C_IRQHandler, 19){}
|
||||||
|
|
||||||
|
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
|
||||||
|
// UART2 TX interrupt
|
||||||
|
INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20){
|
||||||
|
if(UART2_SR & UART_SR_TXE){
|
||||||
|
if(tx_len == 0){
|
||||||
|
UART2_CR2 &= ~UART_CR2_TIEN; // disable TXE interrupt
|
||||||
|
tx_idx = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if(tx_idx < tx_len){
|
||||||
|
UART2_DR = UART_tx[tx_idx++];
|
||||||
|
}else{
|
||||||
|
UART2_CR2 &= ~UART_CR2_TIEN;
|
||||||
|
tx_idx = 0;
|
||||||
|
tx_len = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// UART2 RX interrupt
|
||||||
|
INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21){
|
||||||
|
U8 rb;
|
||||||
|
if(UART2_SR & UART_SR_RXNE){ // data received
|
||||||
|
rb = UART2_DR; // read received byte & clear RXNE flag
|
||||||
|
//while(!(UART2_SR & UART_SR_TXE));
|
||||||
|
UART_rx[rx_idx++] = rb; // put received byte into cycled buffer
|
||||||
|
//UART2_DR = rb;
|
||||||
|
if(rx_idx == UART_BUF_LEN && rb != '\n'){ // Oops: buffer overflow! Just forget old data
|
||||||
|
rx_idx = 0;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if(rb == '\n'){
|
||||||
|
uart_rdy = 1;
|
||||||
|
UART_rx[rx_idx] = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif // STM8S105 or STM8AF626x
|
||||||
|
|
||||||
|
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||||
|
// UART3 TX interrupt
|
||||||
|
INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20){}
|
||||||
|
|
||||||
|
// UART3 RX interrupt
|
||||||
|
INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21){}
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||||
|
|
||||||
|
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||||
|
// ADC2 interrupt
|
||||||
|
INTERRUPT_HANDLER(ADC2_IRQHandler, 22){}
|
||||||
|
#else
|
||||||
|
// ADC1 interrupt
|
||||||
|
INTERRUPT_HANDLER(ADC1_IRQHandler, 22){
|
||||||
|
}
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// Timer6 Update/Overflow/Trigger Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23){}
|
||||||
|
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
|
||||||
|
// Timer4 Update/Overflow Interrupt
|
||||||
|
INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23){}
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
// Eeprom EEC Interrupt
|
||||||
|
INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24){}
|
||||||
144
STM8/interrupts.h
Normal file
144
STM8/interrupts.h
Normal file
@ -0,0 +1,144 @@
|
|||||||
|
/*
|
||||||
|
* interrupts.h
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
#pragma once
|
||||||
|
#ifndef __INTERRUPTS_H__
|
||||||
|
#define __INTERRUPTS_H__
|
||||||
|
|
||||||
|
#include "stm8l.h"
|
||||||
|
|
||||||
|
// Top Level Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TLI_IRQHandler, 0);
|
||||||
|
|
||||||
|
// Auto Wake Up Interrupt
|
||||||
|
INTERRUPT_DEFINITION(AWU_IRQHandler, 1);
|
||||||
|
|
||||||
|
// Clock Controller Interrupt
|
||||||
|
INTERRUPT_DEFINITION(CLK_IRQHandler, 2);
|
||||||
|
|
||||||
|
// External Interrupt PORTA
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTA_IRQHandler, 3);
|
||||||
|
|
||||||
|
// External Interrupt PORTB
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTB_IRQHandler, 4);
|
||||||
|
|
||||||
|
// External Interrupt PORTC
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTC_IRQHandler, 5);
|
||||||
|
|
||||||
|
// External Interrupt PORTD
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTD_IRQHandler, 6);
|
||||||
|
|
||||||
|
// External Interrupt PORTE
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTE_IRQHandler, 7);
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// External Interrupt PORTF
|
||||||
|
INTERRUPT_DEFINITION(EXTI_PORTF_IRQHandler, 8);
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined (STM8AF52Ax)
|
||||||
|
// CAN RX Interrupt routine.
|
||||||
|
INTERRUPT_DEFINITION(CAN_RX_IRQHandler, 8);
|
||||||
|
|
||||||
|
// CAN TX Interrupt routine.
|
||||||
|
INTERRUPT_DEFINITION(CAN_TX_IRQHandler, 9);
|
||||||
|
#endif // STM8S208 || STM8AF52Ax
|
||||||
|
|
||||||
|
// SPI Interrupt routine.
|
||||||
|
INTERRUPT_DEFINITION(SPI_IRQHandler, 10);
|
||||||
|
|
||||||
|
// Timer1 Update/Overflow/Trigger/Break Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11);
|
||||||
|
|
||||||
|
// Timer1 Capture/Compare Interrupt routine.
|
||||||
|
INTERRUPT_DEFINITION(TIM1_CAP_COM_IRQHandler, 12);
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// Timer5 Update/Overflow/Break/Trigger Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13);
|
||||||
|
|
||||||
|
// Timer5 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM5_CAP_COM_IRQHandler, 14);
|
||||||
|
|
||||||
|
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||||
|
// Timer2 Update/Overflow/Break Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM2_UPD_OVF_BRK_IRQHandler, 13);
|
||||||
|
|
||||||
|
// Timer2 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM2_CAP_COM_IRQHandler, 14);
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||||
|
defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
|
||||||
|
// Timer3 Update/Overflow/Break Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM3_UPD_OVF_BRK_IRQHandler, 15);
|
||||||
|
|
||||||
|
// Timer3 Capture/Compare Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM3_CAP_COM_IRQHandler, 16);
|
||||||
|
#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||||
|
|
||||||
|
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
|
||||||
|
defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
|
||||||
|
// UART1 TX Interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART1_TX_IRQHandler, 17);
|
||||||
|
|
||||||
|
// UART1 RX Interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART1_RX_IRQHandler, 18);
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
|
||||||
|
|
||||||
|
// I2C Interrupt
|
||||||
|
INTERRUPT_DEFINITION(I2C_IRQHandler, 19);
|
||||||
|
|
||||||
|
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
|
||||||
|
// UART2 TX interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART2_TX_IRQHandler, 20);
|
||||||
|
|
||||||
|
// UART2 RX interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART2_RX_IRQHandler, 21);
|
||||||
|
#endif // STM8S105 or STM8AF626x
|
||||||
|
|
||||||
|
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||||
|
// UART3 TX interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART3_TX_IRQHandler, 20);
|
||||||
|
|
||||||
|
// UART3 RX interrupt
|
||||||
|
INTERRUPT_DEFINITION(UART3_RX_IRQHandler, 21);
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||||
|
|
||||||
|
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||||
|
// ADC2 interrupt
|
||||||
|
INTERRUPT_DEFINITION(ADC2_IRQHandler, 22);
|
||||||
|
#else // STM8S105, STM8S103 or STM8S903 or STM8AF626x
|
||||||
|
// ADC1 interrupt
|
||||||
|
INTERRUPT_DEFINITION(ADC1_IRQHandler, 22);
|
||||||
|
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||||
|
|
||||||
|
#ifdef STM8S903
|
||||||
|
// Timer6 Update/Overflow/Trigger Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM6_UPD_OVF_TRG_IRQHandler, 23);
|
||||||
|
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
|
||||||
|
// Timer4 Update/Overflow Interrupt
|
||||||
|
INTERRUPT_DEFINITION(TIM4_UPD_OVF_IRQHandler, 23);
|
||||||
|
#endif // STM8S903
|
||||||
|
|
||||||
|
// Eeprom EEC Interrupt
|
||||||
|
INTERRUPT_DEFINITION(EEPROM_EEC_IRQHandler, 24);
|
||||||
|
|
||||||
|
#endif // __INTERRUPTS_H__
|
||||||
142
STM8/main.c
Normal file
142
STM8/main.c
Normal file
@ -0,0 +1,142 @@
|
|||||||
|
/*
|
||||||
|
* blinky.c
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
#include "interrupts.h"
|
||||||
|
#include "stepper.h"
|
||||||
|
#include "uart.h"
|
||||||
|
#include "proto.h"
|
||||||
|
|
||||||
|
//U32 Global_time = 0L; // global time in ms
|
||||||
|
|
||||||
|
/*
|
||||||
|
* 0 0000
|
||||||
|
* 1 0001
|
||||||
|
* 2 0010
|
||||||
|
* 3 0011
|
||||||
|
* 4 0100
|
||||||
|
* 5 0101
|
||||||
|
* 6 0110
|
||||||
|
* 7 0111
|
||||||
|
* 8 1000
|
||||||
|
* 9 1001
|
||||||
|
*10 1010
|
||||||
|
*11 1011
|
||||||
|
*12 1100
|
||||||
|
*13 1101
|
||||||
|
*14 1110
|
||||||
|
*15 1111
|
||||||
|
*/
|
||||||
|
// microsteps: DCBA = 1000, 1100, 0100, 0110, 0010, 0011, 0001, 1001 -- for ULN
|
||||||
|
// what a shit is this > DCBA = 0001, 0010, 0110, 1010, 1001, 1000, 0100, 0000 - bipolar
|
||||||
|
// 1000, 1010, 0010, 0110, 0100, 0101, 0001, 1001 - half-step
|
||||||
|
// 1010, 0110, 0101, 1001 - full step
|
||||||
|
//const U8 ustepsUNI[8] = {8, 12, 4, 6, 2, 3, 1, 9}; // ULN - unipolar
|
||||||
|
//const U8 ustepsBIP[8] = {8, 10, 2, 6, 4, 5, 1, 9}; // bipolar
|
||||||
|
// current usteps
|
||||||
|
//U8 const *usteps = ustepsUNI;
|
||||||
|
|
||||||
|
int main() {
|
||||||
|
//unsigned long T = 0L;
|
||||||
|
// int Ival;
|
||||||
|
// U8 rb;
|
||||||
|
CLK_ICKR |= 8; // enable LSI for watchdog
|
||||||
|
CFG_GCR |= 1; // disable SWIM
|
||||||
|
// Configure clocking
|
||||||
|
CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
|
||||||
|
|
||||||
|
|
||||||
|
PORT(LEDS_PORT, DDR) |= LEDS_PINS;
|
||||||
|
PORT(LEDS_PORT, CR1) |= LEDS_PINS;
|
||||||
|
PORT(LEDS_PORT, CR2) |= LEDS_PINS;
|
||||||
|
|
||||||
|
// Configure timer 1 - LEDs
|
||||||
|
// prescaler = f_{in}/f_{tim1} - 1
|
||||||
|
// set Timer1 to 1MHz: 1/1 - 1 = 15
|
||||||
|
TIM1_PSCRH = 0;
|
||||||
|
TIM1_PSCRL = 15; // LSB should be written last as it updates prescaler
|
||||||
|
// auto-reload each 256ticks:
|
||||||
|
TIM1_ARRH = 0x0;
|
||||||
|
TIM1_ARRL = 0xFF;
|
||||||
|
TIM1_CCR1H = 0;
|
||||||
|
TIM1_CCR1L = 20;
|
||||||
|
TIM1_CCR2H = 0;
|
||||||
|
TIM1_CCR2L = 20;
|
||||||
|
TIM1_CCR3H = 0;
|
||||||
|
TIM1_CCR3L = 20;
|
||||||
|
|
||||||
|
// interrupts: none
|
||||||
|
// PWM mode 1 - OC1M = 110
|
||||||
|
TIM1_CCMR1 = 0x60; TIM1_CCMR2 = 0x60; TIM1_CCMR3 = 0x60;
|
||||||
|
TIM1_CCER1 = 0x11; // CC1E, CC2E
|
||||||
|
TIM1_CCER2 = 0x01; // CC3E
|
||||||
|
// auto-reload + enable
|
||||||
|
TIM1_CR1 = TIM_CR1_APRE | TIM_CR1_CEN;
|
||||||
|
TIM1_BKR |= 1<<7; // MOE - enable main output
|
||||||
|
|
||||||
|
// Configure pins
|
||||||
|
// PD5 - UART2_TX
|
||||||
|
PORT(UART_PORT, DDR) |= UART_TX_PIN;
|
||||||
|
PORT(UART_PORT, CR1) |= UART_TX_PIN;
|
||||||
|
PORT(UART_PORT, CR2) |= UART_TX_PIN;
|
||||||
|
|
||||||
|
// Configure UART
|
||||||
|
// 8 bit, no parity, 1 stop (UART_CR1/3 = 0 - reset value)
|
||||||
|
// 9600 on 16MHz: BRR1=0x41, BRR2=0x02
|
||||||
|
UART2_BRR2 = 0x03; UART2_BRR1 = 0x68;
|
||||||
|
UART2_CR2 = UART_CR2_TEN | UART_CR2_REN | UART_CR2_RIEN; // Allow RX/TX, generate ints on rx//tx
|
||||||
|
|
||||||
|
Stepper_speed = 1000;
|
||||||
|
// Configure timer 2 to generate signals for CLK
|
||||||
|
TIM2_PSCR = 4; // 1MHz
|
||||||
|
TIM2_ARRH = 1000 >> 8; // set speed
|
||||||
|
TIM2_ARRL = 1000 & 0xff;
|
||||||
|
TIM2_IER = TIM_IER_UIE; // update interrupt enable
|
||||||
|
TIM2_CR1 |= TIM_CR1_APRE | TIM_CR1_URS; // auto reload + interrupt on overflow
|
||||||
|
|
||||||
|
setup_stepper_pins();
|
||||||
|
RELAY_SETUP();
|
||||||
|
|
||||||
|
// enable all interrupts
|
||||||
|
enableInterrupts();
|
||||||
|
|
||||||
|
/*
|
||||||
|
// Setup watchdog
|
||||||
|
IWDG_KR = KEY_ACCESS; // enable access to protected registers
|
||||||
|
IWDG_PR = 6; // /256
|
||||||
|
IWDG_RLR = 0xff; // max time for watchdog (1.02s)
|
||||||
|
IWDG_KR = KEY_ENABLE; // start watchdog
|
||||||
|
*/
|
||||||
|
// Loop
|
||||||
|
do{
|
||||||
|
//if(RST_SR) RST_SR = 0x1f; // clear reset flags writing 1
|
||||||
|
//IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||||
|
if(uart_rdy){
|
||||||
|
process_string();
|
||||||
|
}
|
||||||
|
if(chk_esw){
|
||||||
|
chk_esw = 0;
|
||||||
|
stepper_get_esw(cur_motor);
|
||||||
|
}
|
||||||
|
}while(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
78
STM8/ports_definition.h
Normal file
78
STM8/ports_definition.h
Normal file
@ -0,0 +1,78 @@
|
|||||||
|
/*
|
||||||
|
* ports_definition.h - definition of ports pins & so on
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#ifndef __PORTS_DEFINITION_H__
|
||||||
|
#define __PORTS_DEFINITION_H__
|
||||||
|
|
||||||
|
#include "stm8l.h"
|
||||||
|
|
||||||
|
#ifdef EBUG
|
||||||
|
#define DBG(x) uart_write(x)
|
||||||
|
#else
|
||||||
|
#define DBG(x)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// macro for using in port constructions like PORT(LED_PORT, ODR) = xx
|
||||||
|
#define CONCAT(a, b) a ## _ ## b
|
||||||
|
#define PORT(a, b) CONCAT(a , b)
|
||||||
|
|
||||||
|
|
||||||
|
// UART2_TX
|
||||||
|
#define UART_PORT PD
|
||||||
|
#define UART_TX_PIN GPIO_PIN5
|
||||||
|
|
||||||
|
/****** Relays: B4, B5, F4 ******/
|
||||||
|
#define RELAY_SETUP() do{PB_DDR |= 0x30; PB_CR1 |= 0x30; PF_DDR |= 0x10; PF_CR1 |= 0x10;}while(0)
|
||||||
|
#define RELAYS_OFF() do{PB_ODR &= ~0x30; PF_ODR |= ~0x10;}while(0)
|
||||||
|
#define RELAY1_ON() do{PB_ODR |= 0x10;}while(0)
|
||||||
|
#define RELAY1_OFF() do{PB_ODR &= ~0x10;}while(0)
|
||||||
|
#define RELAY2_ON() do{PB_ODR |= 0x20;}while(0)
|
||||||
|
#define RELAY2_OFF() do{PB_ODR &= ~0x20;}while(0)
|
||||||
|
#define RELAY3_ON() do{PF_ODR |= 0x10;}while(0)
|
||||||
|
#define RELAY3_OFF() do{PF_ODR &= ~0x10;}while(0)
|
||||||
|
#define RELAY_1() (PB_ODR & 0x10)
|
||||||
|
#define RELAY_2() (PB_ODR & 0x20)
|
||||||
|
#define RELAY_3() (PF_ODR & 0x10)
|
||||||
|
|
||||||
|
|
||||||
|
/***** LEDs (C1..C3) *****/
|
||||||
|
#define LEDS_PORT PC
|
||||||
|
#define LEDS_PINS 0x0E
|
||||||
|
|
||||||
|
/***** Stepper motor *****/
|
||||||
|
// Clocking
|
||||||
|
// PB0..3 -- pins A..D of stepper
|
||||||
|
#define STP_PORT PB
|
||||||
|
#define STP_PINS 0x0f
|
||||||
|
|
||||||
|
// PD0..PD4 - select pair 0..2 & stepper
|
||||||
|
#define STP_SEL_PORT PD
|
||||||
|
#define STP_SEL_PINS 0x1f
|
||||||
|
|
||||||
|
#define STPRS_OFF() do{PORT(STP_PORT, ODR) &= ~STP_PINS; PORT(STP_SEL_PORT, ODR) &= ~0x07; PORT(STP_SEL_PORT, ODR) |= 0x18; }while(0)
|
||||||
|
|
||||||
|
#define ESW_PORT PA
|
||||||
|
// PA1 - "-", PA2 - "+"
|
||||||
|
#define ESW_PLUS 0x02
|
||||||
|
#define ESW_MINUS 0x04
|
||||||
|
|
||||||
|
#endif // __PORTS_DEFINITION_H__
|
||||||
217
STM8/proto.c
Normal file
217
STM8/proto.c
Normal file
@ -0,0 +1,217 @@
|
|||||||
|
/*
|
||||||
|
* geany_encoding=koi8-r
|
||||||
|
* proto.c - base protocol definitions
|
||||||
|
*
|
||||||
|
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
#include "uart.h"
|
||||||
|
#include "stepper.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Move motor for given amount of steps, cmd should be 'N nnnn any other symbols',
|
||||||
|
* N - motor number,
|
||||||
|
* nnnn - steps (-32768...32768)
|
||||||
|
* @return 1 if all OK
|
||||||
|
*/
|
||||||
|
U8 move_motor(char *cmd){
|
||||||
|
U8 N = (U8)*cmd - '0';
|
||||||
|
int steps;
|
||||||
|
if(N < 1 || N > 6) return 0;
|
||||||
|
cmd = omit_whitespace(cmd+1);
|
||||||
|
if(!readInt(cmd, &steps)) return 0;
|
||||||
|
#ifdef EBUG
|
||||||
|
uart_write("Move motor ");
|
||||||
|
printUint((U8*)&N, 1);
|
||||||
|
uart_write(" for ");
|
||||||
|
print_long((long)steps);
|
||||||
|
uart_write("steps\n");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if(steps) return stepper_move(N, steps);
|
||||||
|
else{ // steps == 0 - just check endswitches
|
||||||
|
stepper_get_esw(N);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Switch relay on/off depending on cmd value
|
||||||
|
* 1 - on, 0 - off
|
||||||
|
* @param N - second symbol of command ([2 N ...])
|
||||||
|
*/
|
||||||
|
U8 relay(char *cmd, char N){
|
||||||
|
U8 on = 0;
|
||||||
|
if(*cmd == '-'){ // just check
|
||||||
|
char ans[] = "[2 N St=1]\n";
|
||||||
|
ans[3] = N;
|
||||||
|
switch (N){
|
||||||
|
case '7':
|
||||||
|
on = RELAY_1();
|
||||||
|
break;
|
||||||
|
case '8':
|
||||||
|
on = RELAY_2();
|
||||||
|
break;
|
||||||
|
case '9':
|
||||||
|
on = RELAY_3();
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
if(!on) ans[8] = '0'; // off
|
||||||
|
uart_write(ans);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
if(*cmd == '0'){ // turn OFF
|
||||||
|
switch (N){
|
||||||
|
case '7':
|
||||||
|
RELAY1_OFF();
|
||||||
|
break;
|
||||||
|
case '8':
|
||||||
|
RELAY2_OFF();
|
||||||
|
break;
|
||||||
|
case '9':
|
||||||
|
RELAY3_OFF();
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
if(*cmd == '1'){ // turn ON
|
||||||
|
switch (N){
|
||||||
|
case '7':
|
||||||
|
RELAY1_ON();
|
||||||
|
break;
|
||||||
|
case '8':
|
||||||
|
RELAY2_ON();
|
||||||
|
break;
|
||||||
|
case '9':
|
||||||
|
RELAY3_ON();
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
//extern void print_time();
|
||||||
|
|
||||||
|
void LEDshine(char *cmd, U8 N){
|
||||||
|
int s;
|
||||||
|
if(!readInt(cmd, &s)) return;
|
||||||
|
if(s < 0 || s > 255) return;
|
||||||
|
switch (N){
|
||||||
|
case 0:
|
||||||
|
TIM1_CCR1L = s;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
TIM1_CCR2L = s;
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
TIM1_CCR3L = s;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* process commands from user buffer
|
||||||
|
* @return 1 if all OK
|
||||||
|
*/
|
||||||
|
U8 process_commands(char *cmd){
|
||||||
|
char s;
|
||||||
|
cmd = omit_whitespace(cmd + 1);
|
||||||
|
if(*cmd > '0' && *cmd < '7')
|
||||||
|
return move_motor(cmd);
|
||||||
|
s = *cmd;
|
||||||
|
cmd = omit_whitespace(cmd + 1);
|
||||||
|
switch(s){
|
||||||
|
case '?':
|
||||||
|
uart_write("Steps_left=");
|
||||||
|
print_long((long) Steps_left);
|
||||||
|
uart_write("\n");
|
||||||
|
break;
|
||||||
|
case '0': // stop motors
|
||||||
|
DBG("restart");
|
||||||
|
stop_motor();
|
||||||
|
RELAYS_OFF();
|
||||||
|
break;
|
||||||
|
case '7':
|
||||||
|
DBG("Shutter");
|
||||||
|
relay(cmd, '7');
|
||||||
|
break;
|
||||||
|
case '8':
|
||||||
|
DBG("Neon");
|
||||||
|
relay(cmd, '8');
|
||||||
|
break;
|
||||||
|
case '9':
|
||||||
|
DBG("Flat");
|
||||||
|
relay(cmd, '9');
|
||||||
|
break;
|
||||||
|
case 'a':
|
||||||
|
return stepper_ch_speed(cmd);
|
||||||
|
break;
|
||||||
|
case 'b':
|
||||||
|
DBG("LED1");
|
||||||
|
LEDshine(cmd, 0);
|
||||||
|
break;
|
||||||
|
case 'c':
|
||||||
|
DBG("LED2");
|
||||||
|
LEDshine(cmd, 1);
|
||||||
|
break;
|
||||||
|
case 'd':
|
||||||
|
DBG("LED3");
|
||||||
|
LEDshine(cmd, 2);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
DBG("\n");
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void process_string(){
|
||||||
|
U8 rbs, noerr=1;
|
||||||
|
char *cmd;
|
||||||
|
if(uart_rdy == 0) return;
|
||||||
|
uart_rdy = 0;
|
||||||
|
if(rx_idx < 3 || UART_rx[0] != '[' || UART_rx[rx_idx - 2] != ']'){
|
||||||
|
if(!chk_stpr_cmd(UART_rx[0])){
|
||||||
|
DBG("Enter \"[cmd]\"\n");
|
||||||
|
}
|
||||||
|
//if(rx_buffer[0] == 't'){ print_time(); return; }
|
||||||
|
rx_idx = 0;
|
||||||
|
noerr = 0;
|
||||||
|
}
|
||||||
|
if(noerr){ // echo back given string
|
||||||
|
UART_rx[rx_idx] = 0;
|
||||||
|
cmd = omit_whitespace(&UART_rx[1]);
|
||||||
|
if(*cmd != '2') return;
|
||||||
|
rbs = rx_idx;
|
||||||
|
rx_idx = 0;
|
||||||
|
uart_write(UART_rx);
|
||||||
|
UART_rx[rbs - 2] = 0;
|
||||||
|
process_commands(cmd);
|
||||||
|
}
|
||||||
|
}
|
||||||
122
STM8/sco_platform.ihx
Normal file
122
STM8/sco_platform.ihx
Normal file
@ -0,0 +1,122 @@
|
|||||||
|
:2080A000AE5007F6AA0FF7AE5008F6AA0FF7AE5009F6AA0FF7AE5011F6AA1FF7AE5012F6F1
|
||||||
|
:2080C000AA1FF7AE5013F6AA1FF7AE5005F6A4F0F7AE500FF6A4F8F7AE500FF6AA18F781C2
|
||||||
|
:2080E0005206961C0003891E0B89CD86F05B044D276E1E03A3FFF72D5E1E03A37FFF2E57A8
|
||||||
|
:20810000160372A9000AAEFFFF651F01A3007D24034F204DCF00473504530C7B010F05AE01
|
||||||
|
:20812000530DF77B02954F9EAE530EF735015301AE5300F6AA84F7AE83B289CD85255B02FD
|
||||||
|
:20814000965C4B0289CD857C5B03AE83C489CD85255B02A601200AAE83C689CD85255B02B4
|
||||||
|
:208160004F5B0681AE5001F6A5042604A6012008A5022603A602214F81880D04270F7B0480
|
||||||
|
:20818000A10622091E052705CE004427044FCC82380D052A0B350100461E05501F0520042E
|
||||||
|
:2081A000725F00467B06C700457B05C70044AE5005F6A4F0F7AE500FF6A4F8F7AE500FF673
|
||||||
|
:2081C000AA18F7AE500FF6957B044488A6016B02844D270508014A26FB9E1A01AE500FF7C1
|
||||||
|
:2081E000AE500FF6887B0544842408A4F7AE500FF72006A4EFAE500FF7CD8164027B0401F0
|
||||||
|
:20820000889EC7004B844D2714A1012609725D0046260A4F2007725D004627014F4D270688
|
||||||
|
:20822000CD823B4F2012AE83D789CD85255B02AE5300F6AA01F7A6015B0181AE5300F6A416
|
||||||
|
:20824000FEF75FCF004435010043AE83E589CD85255B028152027B05A1612F067B05A168B6
|
||||||
|
:208260002D034F201AAE83721F017B05A06197494FA2009558585872FB01CF0049A6015B0B
|
||||||
|
:2082800002815213965C1F121E12A65BF71E125CA632F71E125C5CA620F71E121C00031F3D
|
||||||
|
:2082A0000F1E0FA630F71E12A620E7041E12A653E7051E12A674E7061E12A63DE7071E1257
|
||||||
|
:2082C0001C00081F0D1E0DA630F71E12A65DE7091E12A60AE70A1E121C000B7F0D16260340
|
||||||
|
:2082E000CC836F7B16A1072303CC836FAE5005F6A4F0F7AE500FF6A4F8F7AE500FF6AA18C4
|
||||||
|
:20830000F7AE500FF6957B164488A6016B12844D270508114A26FB9E1A11AE500FF7AE5001
|
||||||
|
:208320000FF6887B1744842408AA10AE500FF72006AA20AE500FF77B16AB301E0FF7CD819A
|
||||||
|
:2083400064954D2603A603959EAB301E0DF71E1289CD85255B02AE5005F6A4F0F7AE500FB7
|
||||||
|
:20836000F6A4F8F7AE500FF6AA18F73507004B5B1381080C0406020301090206040C0809EC
|
||||||
|
:208380000103080901030206040C080A02060405010907030B090D0C0E060D090B03070603
|
||||||
|
:2083A0000E0C07060E0C0D090B0307050D090B0A0E065370656564206368616E6765642012
|
||||||
|
:2083C000746F20000A004261642073706565642076616C75650A00737465707065725F6D42
|
||||||
|
:0B83E0006F76650A0073746F700A006E
|
||||||
|
:098E7000000000000000837207FD
|
||||||
|
:2083EB0080808080808080808035005255808088AE5302F6A5012776A4FEAE5302F7CE00E8
|
||||||
|
:20840B00442605CD823B2066AE5005F6A4F06B01C6004ACB004C97C60049A90095F61A01BD
|
||||||
|
:20842B00AE5005F7CD81649095725D00462720725A004CC6004C4D2A353507004CCE004494
|
||||||
|
:20844B005ACF0044909EA1012624CD823B201F725C004CC6004CA1072D14725F004CCE00C1
|
||||||
|
:20846B00445ACF0044909EA1022603CD823B8480808080805202AE5240F64D2A43725D00A5
|
||||||
|
:20848B0050260DAE5245F6A47FF7725F004F2030C60050C1004F2319AE00221F01C6004F22
|
||||||
|
:2084AB0097725C004F4F9572FB01F6AE5241F7200FAE5245F6A47FF7725F004F725F0050B8
|
||||||
|
:2084CB005B02805203AE5240F6A5202747AE5241F66B01AE00011F02C6004E97725C004EBC
|
||||||
|
:2084EB004F9572FB027B01F77B01A10A2603A601214F88C6004EA1208426094D2606725FEA
|
||||||
|
:1A850B00004E20104D270D3501004D5FC6004E9772FB027F5B03808080807E
|
||||||
|
:018E790000F8
|
||||||
|
:208525005202725D005026FA721F5245725F004FAE00221F011E05C600509097725C0050ED
|
||||||
|
:208545004F909572F901F65C90F7F64D2707C60050A12025E2AE5245F6AA80F75B02811EB6
|
||||||
|
:2085650003F6A120270CA1092708A10D2704A10A26045CF620EC8152255F1F0F1F0D7B2ACE
|
||||||
|
:20858500A1042303CC86607B2AA1032603CC86600D2A2603CC8660965C1F124F5F9772FB4E
|
||||||
|
:2085A500127F4CA10C25F51E12A60AE70A7B2AA101270E7B2AA10227197B2AA104272E207E
|
||||||
|
:2085C500451E28F66B174F5F6B0F1F0D7B176B102034162817241E24FE1F22162217200F66
|
||||||
|
:2085E5001F0F1E1620170F161E170D20191628171C1E1CE6036B1BE6026B1AFE1F18161A51
|
||||||
|
:20860500170F1618170DA6096B114B0A5F894B001E13891E1389CD8CF85B08517B110A110A
|
||||||
|
:208625005F9772FB12909FAB30F74B0A5F894B001E13891E1389CD8D8F5B081F0F170D1E07
|
||||||
|
:208645000F26041E0D27067B11A1FF2CBD7B114C5F9772FB1289CD85255B025B2581521062
|
||||||
|
:208665000F0D965C1F0F1E0F1C000B7F0D132A14161590504F1214974F12139517151F130A
|
||||||
|
:20868500A6016B0DA60B6B0E4B0A5F894B001E19891E1989CD8CD35B089F0A0E5F417B0E15
|
||||||
|
:2086A5004172FB0FAB30F74B0A5F894B001E19891E1989CD8D685B081F1517131E1526043E
|
||||||
|
:2086C5001E1327040D0E26C07B0E0D0E27110D0D270D7B0E4A5F9772FB0F88A62DF7845F94
|
||||||
|
:2086E5009772FB0F89CD85255B128152100F02A6016B015F1F051F031E13F6A12D2607A681
|
||||||
|
:20870500016B025C1F131613170B1E0BF61E0B5C1F0BA1302552A139224E0F01881E068968
|
||||||
|
:208725001E06894B0A5F894B00CD8DE95B081F0A170884905F90975F905D2A015A72F90932
|
||||||
|
:208745009F1908889E1908958472A20030A20002A2009517051F03AE7FFF13054F12044F9F
|
||||||
|
:2087650012032EA6A6016B010D0127034F202B0D02271C7B06406B104F12056B0F4F120453
|
||||||
|
:1D8785006B0E4F12036B03160F17057B0E6B041E1527051E151605FFA6015B108114
|
||||||
|
:048E7A0000000000F4
|
||||||
|
:208000008200808382000000820083EB820083EC820083ED820083EE820083EF820083F0AA
|
||||||
|
:20802000820083F1820083F28200000082000000820083F3820083F4820083F9820083FA61
|
||||||
|
:208040008200847B8200847C8200847D82000000820000008200847E8200847F820084CEB9
|
||||||
|
:208060008200852282008523820085248200000082000000820000008200000082000000F8
|
||||||
|
:1D808300AE00422707724F00005A26F9AE000E2709D68E6FD700425A26F7CC80806D
|
||||||
|
:03808000CC87A208
|
||||||
|
:2087A200AE50C0F6AA08F772107F60350050C6AE500CF6AA0EF7AE500DF6AA0EF7AE500E43
|
||||||
|
:2087C200F6AA0EF735005260350F52613500526235FF526335005265351452663500526767
|
||||||
|
:2087E20035145268350052693514526A35605258356052593560525A3511525C3501525DE6
|
||||||
|
:2088020035815250721E526DAE5011F6AA20F7AE5012F6AA20F7AE5013F6AA20F7350352D0
|
||||||
|
:208822004335685242352C5245AE03E8CF00473504530C3503530D35E8530E35015301AE35
|
||||||
|
:208842005300F6AA84F7CD80A0AE5007F6AA30F7AE5008F6AA30F7AE501BF6AA10F7AE5064
|
||||||
|
:208862001CF6AA10F79A725D004D2703CD8BDA725D004327F1725F00433B004BCD82828408
|
||||||
|
:2088820020E48152051E08F6A0306B037B03A10125067B03A10623034F206A5C89CD856496
|
||||||
|
:2088A2005B021F04965C891E0689CD86F05B044D26034F2050AE8C7489CD85255B02961C7A
|
||||||
|
:2088C20000034B0189CD857C5B03AE8C8089CD85255B0216015F905D2A015A908989CD869E
|
||||||
|
:2088E200635B04AE8C8689CD85255B021E01270D1E01897B0588CD81795B0320087B038841
|
||||||
|
:20890200CD8282844F5B058152151E18F66B157B1AA1372606A6016B1220020F127B1AA187
|
||||||
|
:20892200382606A6016B0E20020F0E7B1AA1392606A6016B1120020F117B15A12D2703CC1E
|
||||||
|
:2089420089E3965C1F131E13A65BF71E135CA632F71E135C5CA620F7161372A90003A64E1F
|
||||||
|
:2089620090F71E13A620E7041E13A653E7051E13A674E7061E13A63DE7071E131C00081FC8
|
||||||
|
:208982000F1E0FA631F71E13A65DE7091E13A60AE70A1E131C000B7F7B1A90F70D12260A93
|
||||||
|
:2089A2000D0E26100D112616201EAE5005F6A4106B0D2018AE5005F6A4206B0D200EAE500E
|
||||||
|
:2089C20019F6A4106B0D20044FCC8A4F0D0D26051E0FA630F71E1389CD85255B02A60120AE
|
||||||
|
:2089E2006C7B15A13026300D12260A0D0E260F0D112614201BAE5005F6A4EFF72015AE506A
|
||||||
|
:208A020005F6A4DFF7200CAE5019F6A4EFF720034F203AA60120367B15A131262F0D122657
|
||||||
|
:208A22000A0D0E260F0D112614201BAE5005F6AA10F72015AE5005F6AA20F7200CAE50196B
|
||||||
|
:208A4200F6AA10F720034F2004A601214F5B15815202965C891E0789CD86F05B044D273705
|
||||||
|
:208A62000D012B331E01A300FF2C2C7B02887B08A100842712887B08A101842710887B0816
|
||||||
|
:208A8200A10284270E2010AE5266F7200AAE5268F72004AE526AF75B028152021E055C89A3
|
||||||
|
:208AA200CD85645B02F6A1302D0DA1372E0989CD88855B02CC8BD75C8889CD85645B021F04
|
||||||
|
:208AC2000284A130275CA1372775A1382603CC8B56A1392603CC8B6BA13F271FA161260381
|
||||||
|
:208AE200CC8B80A1622603CC8B8AA1632603CC8B9FA1642603CC8BB4CC8BC9AE8C8D89CDF7
|
||||||
|
:208B020085255B0290CE00445F905D2A015A908989CD86635B04AE8C9989CD85255B02CC26
|
||||||
|
:208B22008BCCAE8C9B89CD85255B02CD823BAE5005F6A4CFF7AE5019F6AAEFF7CC8BCCAE4F
|
||||||
|
:208B42008CA389CD85255B024B371E0289CD890A5B032076AE8CAB89CD85255B024B381E25
|
||||||
|
:208B62000289CD890A5B032061AE8CB089CD85255B024B391E0289CD890A5B03204C1E016C
|
||||||
|
:208B820089CD80E05B02204DAE8CB589CD85255B024B001E0289CD8A525B03202DAE8CBACB
|
||||||
|
:208BA20089CD85255B024B011E0289CD8A525B032018AE8CBF89CD85255B024B021E0289D6
|
||||||
|
:208BC200CD8A525B0320034F200BAE8C9989CD85255B02A6015B02815207A6016B03725DFD
|
||||||
|
:208BE200004D2603CC8C71725F004DC6004EA103251C90AE000190F6A15B26125FC6004EB1
|
||||||
|
:208C0200975A5A1F0672F90690F6A15D271CAE0001F688CD82545B014D2609AE8CC489CDAE
|
||||||
|
:208C220085255B02725F004E0F030D032741AE00011F045FC6004E9772FB047F1E045C89AF
|
||||||
|
:208C4200CD85645B021F011E01F6A1322621C6004E725F004E1E048889CD85255B02845F93
|
||||||
|
:208C6200975A5A72FB047F1E0189CD8A9C5B025B07814D6F7665206D6F746F72200020664E
|
||||||
|
:208C82006F72200073746570730A0053746570735F6C6566743D000A007265737461727433
|
||||||
|
:208CA2000053687574746572004E656F6E00466C6174004C454431004C454432004C4544CA
|
||||||
|
:208CC2003300456E74657220225B636D645D220A001E0916072A03CD8E658990891E0916F7
|
||||||
|
:208CE200072A03CD8E65899089CD8CF85B087B032A03CD8E658152030F030F017B0A484FA9
|
||||||
|
:208D0200494D262E160C1E0A905859170C1F0A1E08130C7B07120B7B06120A240D160C1E9E
|
||||||
|
:208D22000A549056170C1F0A20080C017B016B0320CA7B036B021E0872F00C7B07120B90EA
|
||||||
|
:208D4200977B06120A25061F0890951706160C1E0A549056170C1F0A7B020A024D26D71E88
|
||||||
|
:208D62000816065B03811E0916072A03CD8E658990891E0916072A03CD8E65899089CD8DEE
|
||||||
|
:208D82008F5B087B0318072A03CD8E658152065F1F051F03A6206B027B09484F496B0116BE
|
||||||
|
:208DA2000B1E09905859170B1F0916051E0390585917051F030D0127067B06AA016B061E43
|
||||||
|
:208DC2000572F00F7B04120E90977B03120D250C1F05909517037B0CAA016B0C0A0226B891
|
||||||
|
:208DE2001E0B16095B06815F89897B0A977B0E421F037B09977B0E4272FB021F024FA9005F
|
||||||
|
:208E02006B017B0A977B0D4272FB021F024F19016B017B0A977B0C4272FB011F017B09970B
|
||||||
|
:208E22007B0D4272FB011F017B08977B0E4272FB011F017B07977B0E429F1B016B017B0AD5
|
||||||
|
:208E4200977B0B429F1B016B017B09977B0C429F1B016B017B08977B0D429F1B016B0190E4
|
||||||
|
:0E8E620085858190535D2703535C81905C8170
|
||||||
|
:00000001FF
|
||||||
171
STM8/stepper.c
Normal file
171
STM8/stepper.c
Normal file
@ -0,0 +1,171 @@
|
|||||||
|
/*
|
||||||
|
* stepper.c
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
#include "uart.h"
|
||||||
|
#include "stepper.h"
|
||||||
|
|
||||||
|
volatile U8 chk_esw = 0; // need 2 check end-switches
|
||||||
|
|
||||||
|
static const U8 usteps_matrix[8][8] = {
|
||||||
|
{0b1000, 0b1100, 0b0100, 0b0110, 0b0010, 0b0011, 0b0001, 0b1001}, // [1234]
|
||||||
|
{0b0010, 0b0110, 0b0100, 0b1100, 0b1000, 0b1001, 0b0001, 0b0011}, // [3214]
|
||||||
|
{0b1000, 0b1001, 0b0001, 0b0011, 0b0010, 0b0110, 0b0100, 0b1100}, // [1432]
|
||||||
|
{0b1000, 0b1010, 0b0010, 0b0110, 0b0100, 0b0101, 0b0001, 0b1001}, // [1324]
|
||||||
|
// inversion: cat | sed -e 's/0b/x/g' -e 's/0/y/g' -e 's/1/0/g' -e 's/y/1/g' -e s'/x/0b/g'
|
||||||
|
{0b0111, 0b0011, 0b1011, 0b1001, 0b1101, 0b1100, 0b1110, 0b0110}, // [1234]
|
||||||
|
{0b1101, 0b1001, 0b1011, 0b0011, 0b0111, 0b0110, 0b1110, 0b1100}, // [3214]
|
||||||
|
{0b0111, 0b0110, 0b1110, 0b1100, 0b1101, 0b1001, 0b1011, 0b0011}, // [1432]
|
||||||
|
{0b0111, 0b0101, 0b1101, 0b1001, 0b1011, 0b1010, 0b1110, 0b0110}, // [1324]
|
||||||
|
};
|
||||||
|
|
||||||
|
volatile int Steps_left = 0; // Number of steps
|
||||||
|
volatile char Dir = 0; // direction of moving: 0/1
|
||||||
|
U16 Stepper_speed = 0; // length of one MICROstep in us
|
||||||
|
U8 *usteps = &usteps_matrix[0][0];
|
||||||
|
U8 cur_motor = 7;
|
||||||
|
/**
|
||||||
|
* Setup pins of stepper motor (all - PP out)
|
||||||
|
*/
|
||||||
|
void setup_stepper_pins(){
|
||||||
|
// Push-pull for outputs
|
||||||
|
// PB0..3
|
||||||
|
PORT(STP_PORT, DDR) |= STP_PINS;
|
||||||
|
PORT(STP_PORT, CR1) |= STP_PINS;
|
||||||
|
PORT(STP_PORT, CR2) |= STP_PINS;
|
||||||
|
// PD0..4
|
||||||
|
PORT(STP_SEL_PORT, DDR) |= STP_SEL_PINS;
|
||||||
|
PORT(STP_SEL_PORT, CR1) |= STP_SEL_PINS;
|
||||||
|
PORT(STP_SEL_PORT, CR2) |= STP_SEL_PINS;
|
||||||
|
|
||||||
|
STPRS_OFF();
|
||||||
|
}
|
||||||
|
|
||||||
|
U8 stepper_ch_speed(char *spd){
|
||||||
|
int newval;
|
||||||
|
if(readInt(spd, &newval)){
|
||||||
|
if(newval > -9 && newval < 0x7fff){
|
||||||
|
U16 O = 0xffff / (newval + 10);
|
||||||
|
if(O < MIN_STEP_LENGTH) return 0;
|
||||||
|
Stepper_speed = O;
|
||||||
|
// Configure timer 2 to generate signals for CLK
|
||||||
|
TIM2_PSCR = 4; // 1MHz
|
||||||
|
TIM2_ARRH = O >> 8; // set speed
|
||||||
|
TIM2_ARRL = O & 0xff;
|
||||||
|
TIM2_IER = TIM_IER_UIE; // update interrupt enable
|
||||||
|
TIM2_CR1 |= TIM_CR1_APRE | TIM_CR1_URS; // auto reload + interrupt on overflow & RUN
|
||||||
|
#ifdef EBUG
|
||||||
|
uart_write("Speed changed to ");
|
||||||
|
printUint((U8*)&O, 2);
|
||||||
|
uart_write("\n");
|
||||||
|
#endif
|
||||||
|
return 1;
|
||||||
|
}else DBG("Bad speed value\n");
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Check endswitches
|
||||||
|
* @return 0 if none pressed, 1 if "-", 2 if "+"
|
||||||
|
*/
|
||||||
|
U8 check_endsw(){
|
||||||
|
// A1 - "-", A2 - "+"
|
||||||
|
U8 pc = PORT(ESW_PORT, IDR);
|
||||||
|
if(0 == (pc & ESW_MINUS)) return 1;
|
||||||
|
if(0 == (pc & ESW_PLUS)) return 2;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* move stepper number Nmotor by Nsteps steps
|
||||||
|
* @return 1 if all OK, 0 if error occured
|
||||||
|
*/
|
||||||
|
U8 stepper_move(U8 Nmotor, int Nsteps){
|
||||||
|
U8 c;
|
||||||
|
if(!Nmotor || Nmotor > 6 || !Nsteps || Steps_left) return 0;
|
||||||
|
|
||||||
|
if(Nsteps < 0){
|
||||||
|
Dir = 1;
|
||||||
|
Nsteps *= -1;
|
||||||
|
}else
|
||||||
|
Dir = 0;
|
||||||
|
Steps_left = Nsteps;
|
||||||
|
STPRS_OFF();
|
||||||
|
|
||||||
|
// turn all OFF
|
||||||
|
// turn on the motor we need
|
||||||
|
PORT(STP_SEL_PORT, ODR) |= (1 << (Nmotor/2));
|
||||||
|
if(Nmotor & 1) PORT(STP_SEL_PORT, ODR) &= ~GPIO_PIN3;
|
||||||
|
else PORT(STP_SEL_PORT, ODR) &= ~GPIO_PIN4;
|
||||||
|
c = check_endsw();
|
||||||
|
cur_motor = Nmotor;
|
||||||
|
if(c){
|
||||||
|
if(c == 1){if(!Dir) c = 0;}
|
||||||
|
else if(Dir) c = 0;
|
||||||
|
}
|
||||||
|
if(c){
|
||||||
|
stop_motor();
|
||||||
|
return 0; // already at end-switch in given direction
|
||||||
|
}
|
||||||
|
DBG("stepper_move\n");
|
||||||
|
TIM2_CR1 |= TIM_CR1_CEN; // turn on timer
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void stop_motor(){
|
||||||
|
TIM2_CR1 &= ~TIM_CR1_CEN; // Turn off timer
|
||||||
|
Steps_left = 0;
|
||||||
|
chk_esw = 1;
|
||||||
|
DBG("stop\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* User can change current stepper phases table
|
||||||
|
* N - position in table from 'a' (0) to 'h' (7)
|
||||||
|
* return 1 if all OK
|
||||||
|
*/
|
||||||
|
U8 chk_stpr_cmd(char N){
|
||||||
|
if(N < 'a' || N > 'h') return 0;
|
||||||
|
usteps = &usteps_matrix[N-'a'][0];
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* get end-switches state for all motors or only Nth
|
||||||
|
* @param Nmotor - number of given motor
|
||||||
|
*/
|
||||||
|
void stepper_get_esw(U8 Nmotor){
|
||||||
|
U8 sw;
|
||||||
|
char str[] = "[2 0 St=0]\n"; // 3 - motor number, 5 - endswitch (3 if none)
|
||||||
|
if(Nmotor == 0 || Nmotor > 7) return; // no running motor
|
||||||
|
STPRS_OFF();
|
||||||
|
PORT(STP_SEL_PORT, ODR) |= (1 << (Nmotor/2));
|
||||||
|
if(Nmotor & 1) PORT(STP_SEL_PORT, ODR) |= 1<<4;
|
||||||
|
else PORT(STP_SEL_PORT, ODR) |= 1<<5;
|
||||||
|
str[3] = Nmotor + '0';
|
||||||
|
sw = check_endsw();
|
||||||
|
if(sw == 0) sw = 3;
|
||||||
|
str[8] = sw + '0';
|
||||||
|
uart_write(str);
|
||||||
|
STPRS_OFF();
|
||||||
|
cur_motor = 7;
|
||||||
|
}
|
||||||
48
STM8/stepper.h
Normal file
48
STM8/stepper.h
Normal file
@ -0,0 +1,48 @@
|
|||||||
|
/*
|
||||||
|
* stepper.h
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#ifndef __STEPPER_H__
|
||||||
|
#define __STEPPER_H__
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
|
||||||
|
#define MIN_STEP_LENGTH 125 // max speed == 1/(125us*16) = 500 steps per second
|
||||||
|
|
||||||
|
extern volatile U8 chk_esw;
|
||||||
|
extern U8 cur_motor;
|
||||||
|
|
||||||
|
extern volatile int Steps_left;
|
||||||
|
extern U16 Stepper_speed;
|
||||||
|
extern volatile char Dir;
|
||||||
|
extern U8 *usteps;
|
||||||
|
|
||||||
|
void setup_stepper_pins();
|
||||||
|
U8 stepper_ch_speed(char *spd);
|
||||||
|
U8 stepper_move(U8 Nmotor, int Nsteps);
|
||||||
|
|
||||||
|
void stop_motor();
|
||||||
|
U8 check_endsw();
|
||||||
|
void stepper_get_esw(U8 Nmotor);
|
||||||
|
|
||||||
|
U8 chk_stpr_cmd(char N);
|
||||||
|
|
||||||
|
#endif // __STEPPER_H__
|
||||||
567
STM8/stm8l.h
Normal file
567
STM8/stm8l.h
Normal file
@ -0,0 +1,567 @@
|
|||||||
|
/*
|
||||||
|
* stm8l.h
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#ifndef __STM8L_H__
|
||||||
|
#define __STM8L_H__
|
||||||
|
|
||||||
|
typedef unsigned char U8;
|
||||||
|
typedef unsigned int U16;
|
||||||
|
typedef unsigned long U32;
|
||||||
|
#define NULL (void*)0
|
||||||
|
|
||||||
|
/* functions */
|
||||||
|
#define enableInterrupts() {__asm__("rim\n");} // enable interrupts
|
||||||
|
#define disableInterrupts() {__asm__("sim\n");} // disable interrupts
|
||||||
|
#define iret() {__asm__("iret\n");} // Interrupt routine return
|
||||||
|
#define pop_ccr() {__asm__("pop cc\n");} // Pop CCR from the stack
|
||||||
|
#define push_ccr() {__asm__("push cc\n");}// Push CCR on the stack
|
||||||
|
#define rim() {__asm__("rim\n");} // enable interrupts
|
||||||
|
#define sim() {__asm__("sim\n");} // disable interrupts
|
||||||
|
#define nop() {__asm__("nop\n");} // No Operation
|
||||||
|
#define trap() {__asm__("trap\n");} // Trap (soft IT)
|
||||||
|
#define wfi() {__asm__("wfi\n");} // Wait For Interrupt
|
||||||
|
#define halt() {__asm__("halt\n");} // Halt
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Registers map is shown in short datasheet, page 26
|
||||||
|
*/
|
||||||
|
/* GPIO */
|
||||||
|
#define PA_ODR *(unsigned char*)0x5000
|
||||||
|
#define PA_IDR *(unsigned char*)0x5001
|
||||||
|
#define PA_DDR *(unsigned char*)0x5002
|
||||||
|
#define PA_CR1 *(unsigned char*)0x5003
|
||||||
|
#define PA_CR2 *(unsigned char*)0x5004
|
||||||
|
|
||||||
|
#define PB_ODR *(unsigned char*)0x5005
|
||||||
|
#define PB_IDR *(unsigned char*)0x5006
|
||||||
|
#define PB_DDR *(unsigned char*)0x5007
|
||||||
|
#define PB_CR1 *(unsigned char*)0x5008
|
||||||
|
#define PB_CR2 *(unsigned char*)0x5009
|
||||||
|
|
||||||
|
#define PC_ODR *(unsigned char*)0x500A
|
||||||
|
#define PC_IDR *(unsigned char*)0x500B
|
||||||
|
#define PC_DDR *(unsigned char*)0x500C
|
||||||
|
#define PC_CR1 *(unsigned char*)0x500D
|
||||||
|
#define PC_CR2 *(unsigned char*)0x500E
|
||||||
|
|
||||||
|
#define PD_ODR *(unsigned char*)0x500F
|
||||||
|
#define PD_IDR *(unsigned char*)0x5010
|
||||||
|
#define PD_DDR *(unsigned char*)0x5011
|
||||||
|
#define PD_CR1 *(unsigned char*)0x5012
|
||||||
|
#define PD_CR2 *(unsigned char*)0x5013
|
||||||
|
|
||||||
|
#define PE_ODR *(unsigned char*)0x5014
|
||||||
|
#define PE_IDR *(unsigned char*)0x5015
|
||||||
|
#define PE_DDR *(unsigned char*)0x5016
|
||||||
|
#define PE_CR1 *(unsigned char*)0x5017
|
||||||
|
#define PE_CR2 *(unsigned char*)0x5018
|
||||||
|
|
||||||
|
#define PF_ODR *(unsigned char*)0x5019
|
||||||
|
#define PF_IDR *(unsigned char*)0x501A
|
||||||
|
#define PF_DDR *(unsigned char*)0x501B
|
||||||
|
#define PF_CR1 *(unsigned char*)0x501C
|
||||||
|
#define PF_CR2 *(unsigned char*)0x501D
|
||||||
|
|
||||||
|
#ifdef STM8S105
|
||||||
|
#define PG_ODR *(unsigned char*)0x501E
|
||||||
|
#define PG_IDR *(unsigned char*)0x501F
|
||||||
|
#define PG_DDR *(unsigned char*)0x5020
|
||||||
|
#define PG_CR1 *(unsigned char*)0x5021
|
||||||
|
#define PG_CR2 *(unsigned char*)0x5022
|
||||||
|
|
||||||
|
#define PH_ODR *(unsigned char*)0x5023
|
||||||
|
#define PH_IDR *(unsigned char*)0x5024
|
||||||
|
#define PH_DDR *(unsigned char*)0x5025
|
||||||
|
#define PH_CR1 *(unsigned char*)0x5026
|
||||||
|
#define PH_CR2 *(unsigned char*)0x5027
|
||||||
|
|
||||||
|
#define PI_ODR *(unsigned char*)0x5028
|
||||||
|
#define PI_IDR *(unsigned char*)0x5029
|
||||||
|
#define PI_DDR *(unsigned char*)0x502A
|
||||||
|
#define PI_CR1 *(unsigned char*)0x502B
|
||||||
|
#define PI_CR2 *(unsigned char*)0x502C
|
||||||
|
#endif // STM8S105
|
||||||
|
|
||||||
|
/* GPIO bits */
|
||||||
|
#define GPIO_PIN0 (1 << 0)
|
||||||
|
#define GPIO_PIN1 (1 << 1)
|
||||||
|
#define GPIO_PIN2 (1 << 2)
|
||||||
|
#define GPIO_PIN3 (1 << 3)
|
||||||
|
#define GPIO_PIN4 (1 << 4)
|
||||||
|
#define GPIO_PIN5 (1 << 5)
|
||||||
|
#define GPIO_PIN6 (1 << 6)
|
||||||
|
#define GPIO_PIN7 (1 << 7)
|
||||||
|
|
||||||
|
/* -------------------- FLASH/EEPROM -------------------- */
|
||||||
|
#define FLASH_CR1 *(unsigned char*)0x505A
|
||||||
|
#define FLASH_CR2 *(unsigned char*)0x505B
|
||||||
|
#define FLASH_NCR2 *(unsigned char*)0x505C
|
||||||
|
#define FLASH_FPR *(unsigned char*)0x505D
|
||||||
|
#define FLASH_NFPR *(unsigned char*)0x505E
|
||||||
|
#define FLASH_IAPSR *(unsigned char*)0x505F
|
||||||
|
#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection
|
||||||
|
#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection
|
||||||
|
|
||||||
|
#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access
|
||||||
|
#define EEPROM_KEY2 0x56
|
||||||
|
#define EEPROM_START_ADDR (unsigned char*)0x4000
|
||||||
|
|
||||||
|
/* ------------------- interrupts ------------------- */
|
||||||
|
#define EXTI_CR1 *(unsigned char*)0x50A0
|
||||||
|
#define EXTI_CR2 *(unsigned char*)0x50A1
|
||||||
|
#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num)
|
||||||
|
#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num)
|
||||||
|
|
||||||
|
// Reset status register
|
||||||
|
#define RST_SR *(unsigned char*)0x50B3
|
||||||
|
|
||||||
|
/* ------------------- CLOCK ------------------- */
|
||||||
|
#define CLK_ICKR *(unsigned char*)0x50C0
|
||||||
|
#define CLK_ECKR *(unsigned char*)0x50C1
|
||||||
|
#define CLK_CMSR *(unsigned char*)0x50C3
|
||||||
|
#define CLK_SWR *(unsigned char*)0x50C4
|
||||||
|
#define CLK_SWCR *(unsigned char*)0x50C5
|
||||||
|
#define CLK_CKDIVR *(unsigned char*)0x50C6
|
||||||
|
#define CLK_SPCKENR1 *(unsigned char*)0x50C7
|
||||||
|
#define CLK_CSSR *(unsigned char*)0x50C8
|
||||||
|
#define CLK_CCOR *(unsigned char*)0x50C9
|
||||||
|
#define CLK_PCKENR2 *(unsigned char*)0x50CA
|
||||||
|
#define CLK_HSITRIMR *(unsigned char*)0x50CC
|
||||||
|
#define CLK_SWIMCCR *(unsigned char*)0x50CD
|
||||||
|
|
||||||
|
/* ------------------- Watchdog ------------------ */
|
||||||
|
#define WWDG_CR *(unsigned char*)0x50D1
|
||||||
|
#define WWDG_WR *(unsigned char*)0x50D2
|
||||||
|
#define IWDG_KR *(unsigned char*)0x50E0
|
||||||
|
#define IWDG_PR *(unsigned char*)0x50E1
|
||||||
|
#define IWDG_RLR *(unsigned char*)0x50E2
|
||||||
|
// enable Watchdog
|
||||||
|
#define KEY_ENABLE (0xCC)
|
||||||
|
// refresh Watchdog from IWDG_RLR
|
||||||
|
#define KEY_REFRESH (0xAA)
|
||||||
|
// modify IWDG_PR and IWDG_RLR
|
||||||
|
#define KEY_ACCESS (0x55)
|
||||||
|
|
||||||
|
/* ------------------- AWU, BEEP ------------------- */
|
||||||
|
#define AWU_CSR1 *(unsigned char*)0x50F0
|
||||||
|
#define AWU_APR *(unsigned char*)0x50F1
|
||||||
|
#define AWU_TBR *(unsigned char*)0x50F2
|
||||||
|
#define BEEP_CSR *(unsigned char*)0x50F3
|
||||||
|
|
||||||
|
/* ------------------- SPI ------------------- */
|
||||||
|
#define SPI_CR1 *(unsigned char*)0x5200
|
||||||
|
#define SPI_CR2 *(unsigned char*)0x5201
|
||||||
|
#define SPI_ICR *(unsigned char*)0x5202
|
||||||
|
#define SPI_SR *(unsigned char*)0x5203
|
||||||
|
#define SPI_DR *(unsigned char*)0x5204
|
||||||
|
#define SPI_CRCPR *(unsigned char*)0x5205
|
||||||
|
#define SPI_RXCRCR *(unsigned char*)0x5206
|
||||||
|
#define SPI_TXCRCR *(unsigned char*)0x5207
|
||||||
|
// SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA |
|
||||||
|
#define SPI_CR1_LSBFIRST (1<<7)
|
||||||
|
#define SPI_CR1_SPE (1<<6)
|
||||||
|
#define SPI_CR1_BRMASK (0x38)
|
||||||
|
#define SPI_CR1_MSTR (1<<2)
|
||||||
|
#define SPI_CR1_CPOL (1<<1)
|
||||||
|
#define SPI_CR1_CPHA (1)
|
||||||
|
// SPI_CR2 (page 272): | BDM | BDOE | CRCEN | CRCNEXT | - | RXONLY | SSM | SSI |
|
||||||
|
#define SPI_CR2_BDM (1<<7)
|
||||||
|
#define SPI_CR2_BDOE (1<<6)
|
||||||
|
#define SPI_CR2_CRCEN (1<<5)
|
||||||
|
#define SPI_CR2_CRCNEXT (1<<4)
|
||||||
|
#define SPI_CR2_RXONLY (1<<2)
|
||||||
|
#define SPI_CR2_SSM (1<<1)
|
||||||
|
#define SPI_CR2_SSI (1)
|
||||||
|
// SPI_ICR (page 273): | TXIE | RXIE | ERRIE | WKIE | - | - | - | - |
|
||||||
|
#define SPI_ICR_TXIE (1<<7)
|
||||||
|
#define SPI_ICR_RXIE (1<<6)
|
||||||
|
#define SPI_ICR_ERRIE (1<<5)
|
||||||
|
#define SPI_ICR_WKIE (1<<4)
|
||||||
|
// SPI_SR (page 274): | BSY | OVR | MODF | CRCERR | WKUP | - | TXE | RXNE |
|
||||||
|
#define SPI_SR_BSY (1<<7)
|
||||||
|
#define SPI_SR_OVR (1<<6)
|
||||||
|
#define SPI_SR_MODF (1<<5)
|
||||||
|
#define SPI_SR_CRCERR (1<<4)
|
||||||
|
#define SPI_SR_WKUP (1<<3)
|
||||||
|
#define SPI_SR_TXE (1<<1)
|
||||||
|
#define SPI_SR_RXNE (1)
|
||||||
|
|
||||||
|
/* ------------------- I2C ------------------- */
|
||||||
|
#define I2C_CR1 *(unsigned char*)0x5210
|
||||||
|
#define I2C_CR2 *(unsigned char*)0x5211
|
||||||
|
#define I2C_FREQR *(unsigned char*)0x5212
|
||||||
|
#define I2C_OARL *(unsigned char*)0x5213
|
||||||
|
#define I2C_OARH *(unsigned char*)0x5214
|
||||||
|
#define I2C_DR *(unsigned char*)0x5216
|
||||||
|
#define I2C_SR1 *(unsigned char*)0x5217
|
||||||
|
#define I2C_SR2 *(unsigned char*)0x5218
|
||||||
|
#define I2C_SR3 *(unsigned char*)0x5219
|
||||||
|
#define I2C_ITR *(unsigned char*)0x521A
|
||||||
|
#define I2C_CCRL *(unsigned char*)0x521B
|
||||||
|
#define I2C_CCRH *(unsigned char*)0x521C
|
||||||
|
#define I2C_TRISER *(unsigned char*)0x521D
|
||||||
|
#define I2C_PECR *(unsigned char*)0x521E
|
||||||
|
|
||||||
|
/* ------------------- UART ------------------- */
|
||||||
|
#ifdef STM8S003
|
||||||
|
#define UART1_SR *(unsigned char*)0x5230
|
||||||
|
#define UART1_DR *(unsigned char*)0x5231
|
||||||
|
#define UART1_BRR1 *(unsigned char*)0x5232
|
||||||
|
#define UART1_BRR2 *(unsigned char*)0x5233
|
||||||
|
#define UART1_CR1 *(unsigned char*)0x5234
|
||||||
|
#define UART1_CR2 *(unsigned char*)0x5235
|
||||||
|
#define UART1_CR3 *(unsigned char*)0x5236
|
||||||
|
#define UART1_CR4 *(unsigned char*)0x5237
|
||||||
|
#define UART1_CR5 *(unsigned char*)0x5238
|
||||||
|
#define UART1_GTR *(unsigned char*)0x5239
|
||||||
|
#define UART1_PSCR *(unsigned char*)0x523A
|
||||||
|
#endif // STM8S003
|
||||||
|
#ifdef STM8S105
|
||||||
|
#define UART2_SR *(unsigned char*)0x5240
|
||||||
|
#define UART2_DR *(unsigned char*)0x5241
|
||||||
|
#define UART2_BRR1 *(unsigned char*)0x5242
|
||||||
|
#define UART2_BRR2 *(unsigned char*)0x5243
|
||||||
|
#define UART2_CR1 *(unsigned char*)0x5244
|
||||||
|
#define UART2_CR2 *(unsigned char*)0x5245
|
||||||
|
#define UART2_CR3 *(unsigned char*)0x5246
|
||||||
|
#define UART2_CR4 *(unsigned char*)0x5247
|
||||||
|
#define UART2_CR5 *(unsigned char*)0x5248
|
||||||
|
#define UART2_CR6 *(unsigned char*)0x5249
|
||||||
|
#define UART2_GTR *(unsigned char*)0x524A
|
||||||
|
#define UART2_PSCR *(unsigned char*)0x524B
|
||||||
|
#endif // STM8S105
|
||||||
|
|
||||||
|
/* UART_CR1 bits */
|
||||||
|
#define UART_CR1_R8 (1 << 7)
|
||||||
|
#define UART_CR1_T8 (1 << 6)
|
||||||
|
#define UART_CR1_UARTD (1 << 5)
|
||||||
|
#define UART_CR1_M (1 << 4)
|
||||||
|
#define UART_CR1_WAKE (1 << 3)
|
||||||
|
#define UART_CR1_PCEN (1 << 2)
|
||||||
|
#define UART_CR1_PS (1 << 1)
|
||||||
|
#define UART_CR1_PIEN (1 << 0)
|
||||||
|
|
||||||
|
/* UART_CR2 bits */
|
||||||
|
#define UART_CR2_TIEN (1 << 7)
|
||||||
|
#define UART_CR2_TCIEN (1 << 6)
|
||||||
|
#define UART_CR2_RIEN (1 << 5)
|
||||||
|
#define UART_CR2_ILIEN (1 << 4)
|
||||||
|
#define UART_CR2_TEN (1 << 3)
|
||||||
|
#define UART_CR2_REN (1 << 2)
|
||||||
|
#define UART_CR2_RWU (1 << 1)
|
||||||
|
#define UART_CR2_SBK (1 << 0)
|
||||||
|
|
||||||
|
/* USART_CR3 bits */
|
||||||
|
#define UART_CR3_LINEN (1 << 6)
|
||||||
|
#define UART_CR3_STOP2 (1 << 5)
|
||||||
|
#define UART_CR3_STOP1 (1 << 4)
|
||||||
|
#define UART_CR3_CLKEN (1 << 3)
|
||||||
|
#define UART_CR3_CPOL (1 << 2)
|
||||||
|
#define UART_CR3_CPHA (1 << 1)
|
||||||
|
#define UART_CR3_LBCL (1 << 0)
|
||||||
|
|
||||||
|
/* UART_SR bits */
|
||||||
|
#define UART_SR_TXE (1 << 7)
|
||||||
|
#define UART_SR_TC (1 << 6)
|
||||||
|
#define UART_SR_RXNE (1 << 5)
|
||||||
|
#define UART_SR_IDLE (1 << 4)
|
||||||
|
#define UART_SR_OR (1 << 3)
|
||||||
|
#define UART_SR_NF (1 << 2)
|
||||||
|
#define UART_SR_FE (1 << 1)
|
||||||
|
#define UART_SR_PE (1 << 0)
|
||||||
|
|
||||||
|
|
||||||
|
/* ------------------- TIMERS ------------------- */
|
||||||
|
/* TIM1 */
|
||||||
|
#define TIM1_CR1 *(unsigned char*)0x5250
|
||||||
|
#define TIM1_CR2 *(unsigned char*)0x5251
|
||||||
|
#define TIM1_SMCR *(unsigned char*)0x5252
|
||||||
|
#define TIM1_ETR *(unsigned char*)0x5253
|
||||||
|
#define TIM1_IER *(unsigned char*)0x5254
|
||||||
|
#define TIM1_SR1 *(unsigned char*)0x5255
|
||||||
|
#define TIM1_SR2 *(unsigned char*)0x5256
|
||||||
|
#define TIM1_EGR *(unsigned char*)0x5257
|
||||||
|
#define TIM1_CCMR1 *(unsigned char*)0x5258
|
||||||
|
#define TIM1_CCMR2 *(unsigned char*)0x5259
|
||||||
|
#define TIM1_CCMR3 *(unsigned char*)0x525A
|
||||||
|
#define TIM1_CCMR4 *(unsigned char*)0x525B
|
||||||
|
#define TIM1_CCER1 *(unsigned char*)0x525C
|
||||||
|
#define TIM1_CCER2 *(unsigned char*)0x525D
|
||||||
|
#define TIM1_CNTRH *(unsigned char*)0x525E
|
||||||
|
#define TIM1_CNTRL *(unsigned char*)0x525F
|
||||||
|
#define TIM1_PSCRH *(unsigned char*)0x5260
|
||||||
|
#define TIM1_PSCRL *(unsigned char*)0x5261
|
||||||
|
#define TIM1_ARRH *(unsigned char*)0x5262
|
||||||
|
#define TIM1_ARRL *(unsigned char*)0x5263
|
||||||
|
#define TIM1_RCR *(unsigned char*)0x5264
|
||||||
|
#define TIM1_CCR1H *(unsigned char*)0x5265
|
||||||
|
#define TIM1_CCR1L *(unsigned char*)0x5266
|
||||||
|
#define TIM1_CCR2H *(unsigned char*)0x5267
|
||||||
|
#define TIM1_CCR2L *(unsigned char*)0x5268
|
||||||
|
#define TIM1_CCR3H *(unsigned char*)0x5269
|
||||||
|
#define TIM1_CCR3L *(unsigned char*)0x526A
|
||||||
|
#define TIM1_CCR4H *(unsigned char*)0x526B
|
||||||
|
#define TIM1_CCR4L *(unsigned char*)0x526C
|
||||||
|
#define TIM1_BKR *(unsigned char*)0x526D
|
||||||
|
#define TIM1_DTR *(unsigned char*)0x526E
|
||||||
|
#define TIM1_OISR *(unsigned char*)0x526F
|
||||||
|
|
||||||
|
|
||||||
|
/* TIM_IER bits */
|
||||||
|
#define TIM_IER_BIE (1 << 7)
|
||||||
|
#define TIM_IER_TIE (1 << 6)
|
||||||
|
#define TIM_IER_COMIE (1 << 5)
|
||||||
|
#define TIM_IER_CC4IE (1 << 4)
|
||||||
|
#define TIM_IER_CC3IE (1 << 3)
|
||||||
|
#define TIM_IER_CC2IE (1 << 2)
|
||||||
|
#define TIM_IER_CC1IE (1 << 1)
|
||||||
|
#define TIM_IER_UIE (1 << 0)
|
||||||
|
|
||||||
|
/* TIM_CR1 bits */
|
||||||
|
#define TIM_CR1_APRE (1 << 7)
|
||||||
|
#define TIM_CR1_CMSH (1 << 6)
|
||||||
|
#define TIM_CR1_CMSL (1 << 5)
|
||||||
|
#define TIM_CR1_DIR (1 << 4)
|
||||||
|
#define TIM_CR1_OPM (1 << 3)
|
||||||
|
#define TIM_CR1_URS (1 << 2)
|
||||||
|
#define TIM_CR1_UDIS (1 << 1)
|
||||||
|
#define TIM_CR1_CEN (1 << 0)
|
||||||
|
|
||||||
|
/* TIM_SR1 bits */
|
||||||
|
#define TIM_SR1_BIF (1 << 7)
|
||||||
|
#define TIM_SR1_TIF (1 << 6)
|
||||||
|
#define TIM_SR1_COMIF (1 << 5)
|
||||||
|
#define TIM_SR1_CC4IF (1 << 4)
|
||||||
|
#define TIM_SR1_CC3IF (1 << 3)
|
||||||
|
#define TIM_SR1_CC2IF (1 << 2)
|
||||||
|
#define TIM_SR1_CC1IF (1 << 1)
|
||||||
|
#define TIM_SR1_UIF (1 << 0)
|
||||||
|
|
||||||
|
/* TIM_EGR bits */
|
||||||
|
#define TIM_EGR_BG (1 << 7)
|
||||||
|
#define TIM_EGR_TG (1 << 6)
|
||||||
|
#define TIM_EGR_COMG (1 << 5)
|
||||||
|
#define TIM_EGR_CC4G (1 << 4)
|
||||||
|
#define TIM_EGR_CC3G (1 << 3)
|
||||||
|
#define TIM_EGR_CC2G (1 << 2)
|
||||||
|
#define TIM_EGR_CC1G (1 << 1)
|
||||||
|
#define TIM_EGR_UG (1 << 0)
|
||||||
|
|
||||||
|
|
||||||
|
/* TIM2 */
|
||||||
|
#define TIM2_CR1 *(unsigned char*)0x5300
|
||||||
|
#if defined STM8S105 || defined STM8S103
|
||||||
|
#define TIM2_IER *(unsigned char*)0x5301
|
||||||
|
#define TIM2_SR1 *(unsigned char*)0x5302
|
||||||
|
#define TIM2_SR2 *(unsigned char*)0x5303
|
||||||
|
#define TIM2_EGR *(unsigned char*)0x5304
|
||||||
|
#define TIM2_CCMR1 *(unsigned char*)0x5305
|
||||||
|
#define TIM2_CCMR2 *(unsigned char*)0x5306
|
||||||
|
#define TIM2_CCMR3 *(unsigned char*)0x5307
|
||||||
|
#define TIM2_CCER1 *(unsigned char*)0x5308
|
||||||
|
#define TIM2_CCER2 *(unsigned char*)0x5309
|
||||||
|
#define TIM2_CNTRH *(unsigned char*)0x530A
|
||||||
|
#define TIM2_CNTRL *(unsigned char*)0x530B
|
||||||
|
#define TIM2_PSCR *(unsigned char*)0x530C
|
||||||
|
#define TIM2_ARRH *(unsigned char*)0x530D
|
||||||
|
#define TIM2_ARRL *(unsigned char*)0x530E
|
||||||
|
#define TIM2_CCR1H *(unsigned char*)0x530F
|
||||||
|
#define TIM2_CCR1L *(unsigned char*)0x5310
|
||||||
|
#define TIM2_CCR2H *(unsigned char*)0x5311
|
||||||
|
#define TIM2_CCR2L *(unsigned char*)0x5312
|
||||||
|
#define TIM2_CCR3H *(unsigned char*)0x5313
|
||||||
|
#define TIM2_CCR3L *(unsigned char*)0x5314
|
||||||
|
#elif defined STM8S003
|
||||||
|
#define TIM2_IER *(unsigned char*)0x5303
|
||||||
|
#define TIM2_SR1 *(unsigned char*)0x5304
|
||||||
|
#define TIM2_SR2 *(unsigned char*)0x5305
|
||||||
|
#define TIM2_EGR *(unsigned char*)0x5306
|
||||||
|
#define TIM2_CCMR1 *(unsigned char*)0x5307
|
||||||
|
#define TIM2_CCMR2 *(unsigned char*)0x5308
|
||||||
|
#define TIM2_CCMR3 *(unsigned char*)0x5309
|
||||||
|
#define TIM2_CCER1 *(unsigned char*)0x530A
|
||||||
|
#define TIM2_CCER2 *(unsigned char*)0x530B
|
||||||
|
#define TIM2_CNTRH *(unsigned char*)0x530C
|
||||||
|
#define TIM2_CNTRL *(unsigned char*)0x530D
|
||||||
|
#define TIM2_PSCR *(unsigned char*)0x530E
|
||||||
|
#define TIM2_ARRH *(unsigned char*)0x530F
|
||||||
|
#define TIM2_ARRL *(unsigned char*)0x5310
|
||||||
|
#define TIM2_CCR1H *(unsigned char*)0x5311
|
||||||
|
#define TIM2_CCR1L *(unsigned char*)0x5312
|
||||||
|
#define TIM2_CCR2H *(unsigned char*)0x5313
|
||||||
|
#define TIM2_CCR2L *(unsigned char*)0x5314
|
||||||
|
#define TIM2_CCR3H *(unsigned char*)0x5315
|
||||||
|
#define TIM2_CCR3L *(unsigned char*)0x5316
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* TIM3 */
|
||||||
|
#if defined STM8S105 || defined STM8S103
|
||||||
|
#define TIM3_CR1 *(unsigned char*)0x5320
|
||||||
|
#define TIM3_IER *(unsigned char*)0x5321
|
||||||
|
#define TIM3_SR1 *(unsigned char*)0x5322
|
||||||
|
#define TIM3_SR2 *(unsigned char*)0x5323
|
||||||
|
#define TIM3_EGR *(unsigned char*)0x5324
|
||||||
|
#define TIM3_CCMR1 *(unsigned char*)0x5325
|
||||||
|
#define TIM3_CCMR2 *(unsigned char*)0x5326
|
||||||
|
#define TIM3_CCER1 *(unsigned char*)0x5327
|
||||||
|
#define TIM3_CNTRH *(unsigned char*)0x5328
|
||||||
|
#define TIM3_CNTRL *(unsigned char*)0x5329
|
||||||
|
#define TIM3_PSCR *(unsigned char*)0x532A
|
||||||
|
#define TIM3_ARRH *(unsigned char*)0x532B
|
||||||
|
#define TIM3_ARRL *(unsigned char*)0x532C
|
||||||
|
#define TIM3_CCR1H *(unsigned char*)0x532D
|
||||||
|
#define TIM3_CCR1L *(unsigned char*)0x532E
|
||||||
|
#define TIM3_CCR2H *(unsigned char*)0x532F
|
||||||
|
#define TIM3_CCR2L *(unsigned char*)0x5330
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* TIM4 */
|
||||||
|
#define TIM4_CR1 *(unsigned char*)0x5340
|
||||||
|
#if defined STM8S105 || defined STM8S103
|
||||||
|
#define TIM4_IER *(unsigned char*)0x5341
|
||||||
|
#define TIM4_SR *(unsigned char*)0x5342
|
||||||
|
#define TIM4_EGR *(unsigned char*)0x5343
|
||||||
|
#define TIM4_CNTR *(unsigned char*)0x5344
|
||||||
|
#define TIM4_PSCR *(unsigned char*)0x5345
|
||||||
|
#define TIM4_ARR *(unsigned char*)0x5346
|
||||||
|
#elif defined STM8S003
|
||||||
|
#define TIM4_IER *(unsigned char*)0x5343
|
||||||
|
#define TIM4_SR *(unsigned char*)0x5344
|
||||||
|
#define TIM4_EGR *(unsigned char*)0x5345
|
||||||
|
#define TIM4_CNTR *(unsigned char*)0x5346
|
||||||
|
#define TIM4_PSCR *(unsigned char*)0x5347
|
||||||
|
#define TIM4_ARR *(unsigned char*)0x5348
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* ------------------- ADC ------------------- */
|
||||||
|
#define ADC_DB0RH *(unsigned char*)0x53E0
|
||||||
|
#define ADC_DB0RL *(unsigned char*)0x53E1
|
||||||
|
#define ADC_DB1RH *(unsigned char*)0x53E2
|
||||||
|
#define ADC_DB1RL *(unsigned char*)0x53E3
|
||||||
|
#define ADC_DB2RH *(unsigned char*)0x53E4
|
||||||
|
#define ADC_DB2RL *(unsigned char*)0x53E5
|
||||||
|
#define ADC_DB3RH *(unsigned char*)0x53E6
|
||||||
|
#define ADC_DB3RL *(unsigned char*)0x53E7
|
||||||
|
#define ADC_DB4RH *(unsigned char*)0x53E8
|
||||||
|
#define ADC_DB4RL *(unsigned char*)0x53E9
|
||||||
|
#define ADC_DB5RH *(unsigned char*)0x53EA
|
||||||
|
#define ADC_DB5RL *(unsigned char*)0x53EB
|
||||||
|
#define ADC_DB6RH *(unsigned char*)0x53EC
|
||||||
|
#define ADC_DB6RL *(unsigned char*)0x53ED
|
||||||
|
#define ADC_DB7RH *(unsigned char*)0x53EE
|
||||||
|
#define ADC_DB7RL *(unsigned char*)0x53EF
|
||||||
|
#define ADC_DB8RH *(unsigned char*)0x53F0
|
||||||
|
#define ADC_DB8RL *(unsigned char*)0x53F1
|
||||||
|
#define ADC_DB9RH *(unsigned char*)0x53F2
|
||||||
|
#define ADC_DB9RL *(unsigned char*)0x53F3
|
||||||
|
#define ADC_CSR *(unsigned char*)0x5400
|
||||||
|
#define ADC_CR1 *(unsigned char*)0x5401
|
||||||
|
#define ADC_CR2 *(unsigned char*)0x5402
|
||||||
|
#define ADC_CR3 *(unsigned char*)0x5403
|
||||||
|
#define ADC_DRH *(unsigned char*)0x5404
|
||||||
|
#define ADC_DRL *(unsigned char*)0x5405
|
||||||
|
#define ADC_TDRH *(unsigned char*)0x5406
|
||||||
|
#define ADC_TDRL *(unsigned char*)0x5407
|
||||||
|
#define ADC_HTRH *(unsigned char*)0x5408
|
||||||
|
#define ADC_HTRL *(unsigned char*)0x5409
|
||||||
|
#define ADC_LTRH *(unsigned char*)0x540A
|
||||||
|
#define ADC_LTRL *(unsigned char*)0x540B
|
||||||
|
#define ADC_AWSRH *(unsigned char*)0x540C
|
||||||
|
#define ADC_AWSRL *(unsigned char*)0x540D
|
||||||
|
#define ADC_AWCRH *(unsigned char*)0x540E
|
||||||
|
#define ADC_AWCRL *(unsigned char*)0x540F
|
||||||
|
|
||||||
|
/* ------------------- swim control ------------------- */
|
||||||
|
#define CFG_GCR *(unsigned char*)0x7F60
|
||||||
|
#define SWIM_CSR *(unsigned char*)0x7F80
|
||||||
|
|
||||||
|
/* ------------------- ITC ------------------- */
|
||||||
|
#define ITC_SPR1 *(unsigned char*)0x7F70
|
||||||
|
#define ITC_SPR2 *(unsigned char*)0x7F71
|
||||||
|
#define ITC_SPR3 *(unsigned char*)0x7F72
|
||||||
|
#define ITC_SPR4 *(unsigned char*)0x7F73
|
||||||
|
#define ITC_SPR5 *(unsigned char*)0x7F74
|
||||||
|
#define ITC_SPR6 *(unsigned char*)0x7F75
|
||||||
|
#define ITC_SPR7 *(unsigned char*)0x7F76
|
||||||
|
#define ITC_SPR8 *(unsigned char*)0x7F77
|
||||||
|
|
||||||
|
|
||||||
|
/* -------------------- UNIQUE ID -------------------- */
|
||||||
|
#if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too???
|
||||||
|
#define U_ID00 (unsigned char*)0x48CD
|
||||||
|
#define U_ID01 (unsigned char*)0x48CE
|
||||||
|
#define U_ID02 (unsigned char*)0x48CF
|
||||||
|
#define U_ID03 (unsigned char*)0x48D0
|
||||||
|
#define U_ID04 (unsigned char*)0x48D1
|
||||||
|
#define U_ID05 (unsigned char*)0x48D2
|
||||||
|
#define U_ID06 (unsigned char*)0x48D3
|
||||||
|
#define U_ID07 (unsigned char*)0x48D4
|
||||||
|
#define U_ID08 (unsigned char*)0x48D5
|
||||||
|
#define U_ID09 (unsigned char*)0x48D6
|
||||||
|
#define U_ID10 (unsigned char*)0x48D7
|
||||||
|
#define U_ID11 (unsigned char*)0x48D8
|
||||||
|
#endif // defined STM8S105 || defined STM8S103
|
||||||
|
|
||||||
|
// CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx
|
||||||
|
#define CCR *(unsigned char*)0x7F0A
|
||||||
|
|
||||||
|
/* -------------------- OPTION BYTES -------------------- */
|
||||||
|
#if defined STM8S105
|
||||||
|
// readout protection
|
||||||
|
#define OPT0 *(unsigned char*)0x4800
|
||||||
|
// user boot code
|
||||||
|
#define OPT1 *(unsigned char*)0x4801
|
||||||
|
#define NOPT1 *(unsigned char*)0x4802
|
||||||
|
// alternate functions remapping
|
||||||
|
// | AFR7 | ... | AFR0 |
|
||||||
|
// AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1
|
||||||
|
// AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN
|
||||||
|
// AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3
|
||||||
|
// AFR0 - PD3 = ADC_ETR
|
||||||
|
#define OPT2 *(unsigned char*)0x4803
|
||||||
|
#define NOPT2 *(unsigned char*)0x4804
|
||||||
|
// trim, watchdog
|
||||||
|
#define OPT3 *(unsigned char*)0x4805
|
||||||
|
#define NOPT3 *(unsigned char*)0x4806
|
||||||
|
// extclc, awu
|
||||||
|
#define OPT4 *(unsigned char*)0x4807
|
||||||
|
#define NOPT4 *(unsigned char*)0x4808
|
||||||
|
// HSE stab time
|
||||||
|
#define OPT5 *(unsigned char*)0x4809
|
||||||
|
#define NOPT5 *(unsigned char*)0x480a
|
||||||
|
// none
|
||||||
|
#define OPT6 *(unsigned char*)0x480b
|
||||||
|
#define NOPT6 *(unsigned char*)0x480c
|
||||||
|
// none
|
||||||
|
#define OPT7 *(unsigned char*)0x480d
|
||||||
|
#define NOPT7 *(unsigned char*)0x480e
|
||||||
|
// bootloader opt byte
|
||||||
|
#define OPTBL *(unsigned char*)0x487e
|
||||||
|
#define NOPTBL *(unsigned char*)0x487f
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __STM8L_H__
|
||||||
|
|
||||||
|
// #define *(unsigned char*)0x
|
||||||
141
STM8/uart.c
Normal file
141
STM8/uart.c
Normal file
@ -0,0 +1,141 @@
|
|||||||
|
/*
|
||||||
|
* geany_encoding=koi8-r
|
||||||
|
* uart.c
|
||||||
|
*
|
||||||
|
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "uart.h"
|
||||||
|
#include "ports_definition.h"
|
||||||
|
|
||||||
|
U8 uart_rdy = 0;
|
||||||
|
U8 rx_idx = 0, tx_idx = 0, tx_len = 0;
|
||||||
|
|
||||||
|
U8 UART_rx[UART_BUF_LEN+1]; // cycle buffer for received data
|
||||||
|
U8 UART_tx[UART_BUF_LEN+1];
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Send one byte through UART
|
||||||
|
* @param byte - data to send
|
||||||
|
*
|
||||||
|
void UART_send_byte(U8 byte){
|
||||||
|
while(!(UART2_SR & UART_SR_TXE)); // wait until previous byte transmitted
|
||||||
|
UART2_DR = byte;
|
||||||
|
}*/
|
||||||
|
|
||||||
|
void uart_write(char *str){
|
||||||
|
while(tx_len);
|
||||||
|
UART2_CR2 &= ~UART_CR2_TIEN;
|
||||||
|
tx_idx = 0;
|
||||||
|
do{
|
||||||
|
UART_tx[tx_len++] = *str++;
|
||||||
|
}while(*str && tx_len < UART_BUF_LEN);
|
||||||
|
UART2_CR2 |= UART_CR2_TIEN; // enable TXE interrupt
|
||||||
|
}
|
||||||
|
|
||||||
|
char *omit_whitespace(char *str){
|
||||||
|
char c;
|
||||||
|
for(c = *str; c == ' ' || c == '\t' || c == '\r' || c == '\n'; c = *(++str));
|
||||||
|
return str;
|
||||||
|
}
|
||||||
|
|
||||||
|
void printUint(U8 *val, U8 len){
|
||||||
|
unsigned long Number = 0;
|
||||||
|
U8 i = len;
|
||||||
|
char ch;
|
||||||
|
U8 decimal_buff[12]; // max len of U32 == 10 + \n + \0
|
||||||
|
if(len > 4 || len == 3 || len == 0) return;
|
||||||
|
for(i = 0; i < 12; i++)
|
||||||
|
decimal_buff[i] = 0;
|
||||||
|
decimal_buff[10] = '\n';
|
||||||
|
ch = 9;
|
||||||
|
switch(len){
|
||||||
|
case 1:
|
||||||
|
Number = *((U8*)val);
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
Number = *((U16*)val);
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
Number = *((unsigned long*)val);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
do{
|
||||||
|
i = Number % 10L;
|
||||||
|
decimal_buff[ch--] = i + '0';
|
||||||
|
Number /= 10L;
|
||||||
|
}while(Number && ch > -1);
|
||||||
|
uart_write((char*)&decimal_buff[ch+1]);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* print signed long onto terminal
|
||||||
|
* max len = 10 symbols + 1 for "-" + 1 for '\n' + 1 for 0 = 13
|
||||||
|
*/
|
||||||
|
void print_long(long Number){
|
||||||
|
U8 i, L = 0;
|
||||||
|
U8 ch;
|
||||||
|
char decimal_buff[12];
|
||||||
|
decimal_buff[11] = 0;
|
||||||
|
ch = 11;
|
||||||
|
if(Number < 0){
|
||||||
|
Number = -Number;
|
||||||
|
L = 1;
|
||||||
|
}
|
||||||
|
do{
|
||||||
|
i = Number % 10L;
|
||||||
|
decimal_buff[--ch] = i + '0';
|
||||||
|
Number /= 10L;
|
||||||
|
}while(Number && ch > 0);
|
||||||
|
if(ch > 0 && L) decimal_buff[--ch] = '-';
|
||||||
|
uart_write(&decimal_buff[ch]);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* read 16 bit integer value from buffer until first non-number
|
||||||
|
* @param buff (i) - input buffer
|
||||||
|
* @param (o) - output value
|
||||||
|
* @return 1 if all OK or 0 if there's none numbers in buffer
|
||||||
|
*/
|
||||||
|
U8 readInt(char *buff, int *val){
|
||||||
|
U8 sign = 0, rb, bad = 1;
|
||||||
|
long R = 0;
|
||||||
|
//usart_send("readInt, buff=");
|
||||||
|
//usart_send(buff);
|
||||||
|
if(*buff == '-'){
|
||||||
|
sign = 1;
|
||||||
|
++buff;
|
||||||
|
}
|
||||||
|
do{
|
||||||
|
rb = *buff++;
|
||||||
|
if(rb < '0' || rb > '9') break;
|
||||||
|
bad = 0;
|
||||||
|
R = R * 10L + rb - '0';
|
||||||
|
if(R > 0x7fff){ // bad value
|
||||||
|
bad = 1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}while(1);
|
||||||
|
//print_long(R);
|
||||||
|
if(bad) return 0;
|
||||||
|
if(sign) R = -R;
|
||||||
|
if(val) *val = (int)R;
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
47
STM8/uart.h
Normal file
47
STM8/uart.h
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
/*
|
||||||
|
* geany_encoding=koi8-r
|
||||||
|
* uart.h
|
||||||
|
*
|
||||||
|
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#pragma once
|
||||||
|
#ifndef __UART_H__
|
||||||
|
#define __UART_H__
|
||||||
|
|
||||||
|
#include "ports_definition.h"
|
||||||
|
|
||||||
|
#define UART_BUF_LEN 32
|
||||||
|
|
||||||
|
extern U8 UART_rx[];
|
||||||
|
extern U8 UART_tx[];
|
||||||
|
extern U8 uart_rdy, rx_idx, tx_idx, tx_len;
|
||||||
|
|
||||||
|
//extern U32 Global_time; // global time in ms
|
||||||
|
|
||||||
|
void uart_write(char *str);
|
||||||
|
|
||||||
|
char *omit_whitespace(char *str);
|
||||||
|
|
||||||
|
void print_long(long Number);
|
||||||
|
void printUint(U8 *val, U8 len);
|
||||||
|
U8 readInt(char *buff, int *val);
|
||||||
|
|
||||||
|
#endif // __UART_H__
|
||||||
|
|
||||||
|
|
||||||
30
avr/proto.h
Normal file
30
avr/proto.h
Normal file
@ -0,0 +1,30 @@
|
|||||||
|
/*
|
||||||
|
* geany_encoding=koi8-r
|
||||||
|
* proto.h
|
||||||
|
*
|
||||||
|
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#ifndef __PROTO_H__
|
||||||
|
#define __PROTO_H__
|
||||||
|
|
||||||
|
void process_string();
|
||||||
|
|
||||||
|
#endif // __PROTO_H__
|
||||||
Loading…
x
Reference in New Issue
Block a user