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https://github.com/eddyem/scorpio.git
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add code for STM8-based 2stepper management board
This commit is contained in:
30
STM8/platform/Makefile
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30
STM8/platform/Makefile
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NAME=sco_platform
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SDCC=sdcc
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CCFLAGS=-DSTM8S105 -I../ -I/usr/share/sdcc/include -mstm8 --out-fmt-ihx
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LDFLAGS= -mstm8 --out-fmt-ihx -lstm8
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FLASHFLAGS=-cstlinkv2 -pstm8s105?4
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SRC=$(wildcard *.c)
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#DEFS = -DEBUG
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OBJ=$(SRC:%.c=%.rel)
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TRASH=$(OBJ) $(SRC:%.c=%.rst) $(SRC:%.c=%.asm) $(SRC:%.c=%.lst)
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TRASH+=$(SRC:%.c=%.sym) $(NAME).lk $(NAME).map $(NAME).cdb
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INDEPENDENT_HEADERS=stm8l.h ports_definition.h Makefile
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all: $(NAME).ihx
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clean:
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rm -f $(TRASH)
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load: $(NAME).ihx
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stm8flash $(FLASHFLAGS) -w $(NAME).ihx
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%.rel: %.c
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$(SDCC) $(CCFLAGS) $(DEFS) -c $<
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$(NAME).ihx: $(OBJ)
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$(SDCC) $(LDFLAGS) $(OBJ) -o $(NAME).ihx
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.PHONY: all
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30
STM8/platform/Readme.koi8-r
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30
STM8/platform/Readme.koi8-r
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@@ -0,0 +1,30 @@
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Протокол команд платформы SCORPIO
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=================================
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Все команды должны быть заключены в квадратные скобки с символом '\n' после закрывающейся скобки
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(анализатор протокола работает в строковом режиме). Пробелы внутри скобок игнорируются.
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Контроллер платформы имеет номер "2", поэтому парсер команд принимает лишь команды вида "[2 Xxx]\n".
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Список команд:
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* [2 ?] (отладочная команда) -- выдача оставшегося количества шагов.
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* [2 0] (изначально было "restart") -- остановить все моторы и реле (работающий watchdog не требует
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команды принудительной перезагрузки).
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* [2 N xxx], где N - число от 1 до 6, а xxx - число от -32767 до 32767 -- запуск шагового двигателя
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номер N на заданное количество шагов. Если двигатель стоит на концевике и не сможет двигаться в
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заданном направлении, вместо эха команды сразу возвращается статус концевика в виде [2 N St=x],
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где x - 1 или 2 в зависимости от номера концевика. После окончания движения возвращается статус
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двигателя, если концевики не зажаты, St=3.
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* [2 N x], где N - число от 7 до 9 -- включить (x=1) или выключить (x=0) реле (7 - затвор, 8 - неон,
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9 - плоское поле). Проверить статус можно, заменив x минусом (возврат будет таким же, как у статуса
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моторов).
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* [2 a xxx], где x - число от -8 до 32767 (наследие от старого протокола) -- изменить скорость шаговых
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двигателей на величину, равную 65535/(xxx-10)*0.125 шагов в секунду.
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* [2 N xxx], где N от 'b' до 'd', а xxx от 0 до 255 --- изменить яркость светодиодов ('b' - первый,
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'c' - второй и 'd' - третий). Значение 0 соответствует минимальной, а 255 максимальной яркости.
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45
STM8/platform/Readme.md
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45
STM8/platform/Readme.md
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@@ -0,0 +1,45 @@
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SCORPIO platform controller
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============================
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### Based on STM8
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PINS description
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* D6 -- USART Rx
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* D5 -- USART Tx
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* D0..D2 -- select motors pair
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* D3, D4 -- select motor from pair
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* C1..C3 -- LED1..LED3
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* B0..B3 -- stepper motors' outputs
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* B4, B5, F4 -- relays (shutter, neon, flat)
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* A1, A2 -- end-switches ("-" and "+")
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* C5..C7 -- end-switch address (C5 is LSB)
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### Commands protocol
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All commands should be in **square brackets with '\n'** after closing bracket. Spaces between parts
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inside command ignored.
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As heritage, The device have number "2", so it would parse only commands with format **"[2 Xxx]\n"**.
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List of commands:
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* **[2 ?]** -- *(debug)* tell amount of steps leave.
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* **[2 0]** -- *(new behaviour, old was "restart")* -- stop all motors and turn off all relays, due
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to working watchdog there's no need to make full system restart.
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* **[2 N xxx]**, where **N** is number from 1 to 6, **xxx** is number from -32767 to 32767 -- run
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stepper motor number **N** for given amount of steps; if stepper is at end-switch and can't go further,
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the answer would be **[2 N St=x]**, where **x** is 1 or 2 (depending on end-switch number);
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when all steps would be over (or motor will come to end-switch), controller will answer a status:
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**[2 N St=x]**, if x==3 the stepper isn't at any end-switch.
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* **[2 N x]**, where **N** is number from 7 to 9 -- turn on/off or get status of relays (7 -- Shutter,
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8 -- Neon, 9 -- Flat); if x==1 the relay would be turned on, if x==0 -- off, if x=='-' the status would
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be answered (format: **[2 N St=x]**, x==0 if power down, 1 if power up).
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* **[2 a xxx]**, where **xxx** if a number from -8 to 32767 -- change motor speed;
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new speed is 0xffff / (xxx + 10) * 0.125 steps per second.
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* **[2 N xxx], where **N** from 'b' to 'd', **xxx** from 0 to 255 -- change LEDx brightness, ('b' -- LED1,
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'c' -- LED2, 'd' -- LED3); brightness 0 is minimum and 255 is maximum.
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221
STM8/platform/interrupts.c
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221
STM8/platform/interrupts.c
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@@ -0,0 +1,221 @@
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/*
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* interrupts.c
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*
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* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "ports_definition.h"
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#include "stepper.h"
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#include "uart.h"
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// Top Level Interrupt
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INTERRUPT_HANDLER(TLI_IRQHandler, 0){}
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// Auto Wake Up Interrupt
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INTERRUPT_HANDLER(AWU_IRQHandler, 1){}
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// Clock Controller Interrupt
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INTERRUPT_HANDLER(CLK_IRQHandler, 2){}
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// External Interrupt PORTA
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INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3){}
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// External Interrupt PORTB
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INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4){}
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// External Interrupt PORTC
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INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5){}
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// External Interrupt PORTD
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INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6){
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}
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// External Interrupt PORTE
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INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7){}
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#ifdef STM8S903
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// External Interrupt PORTF
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INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8){}
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#endif // STM8S903
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#if defined (STM8S208) || defined (STM8AF52Ax)
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// CAN RX Interrupt routine.
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INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8){}
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// CAN TX Interrupt routine.
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INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9){}
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#endif // STM8S208 || STM8AF52Ax
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// SPI Interrupt routine.
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INTERRUPT_HANDLER(SPI_IRQHandler, 10){}
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// Timer1 Update/Overflow/Trigger/Break Interrupt
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INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11){
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if(TIM1_SR1 & TIM_SR1_UIF){ // update interrupt
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// Global_time++; // increase timer
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}
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TIM1_SR1 = 0; // clear all interrupt flags
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}
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// Timer1 Capture/Compare Interrupt routine.
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INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12){}
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#ifdef STM8S903
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// Timer5 Update/Overflow/Break/Trigger Interrupt
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INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13){}
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// Timer5 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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volatile char Ustep = 0;
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// Timer2 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){ // generate pulses for stepper CLK
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char tmp;
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U8 sw;
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if(TIM2_SR1 & TIM_SR1_UIF){
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TIM2_SR1 &= ~TIM_SR1_UIF; // take off flag
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tmp = PORT(STP_PORT, ODR) & ~STP_PINS;
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PORT(STP_PORT, ODR) = tmp | usteps[Ustep];
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if(Steps_left == 0){
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stop_motor();
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return;
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}
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sw = check_endsw();
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if(Dir){
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if(--Ustep < 0){
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Ustep = 7;
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--Steps_left;
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if(sw == 1){
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stop_motor();
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return;
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}
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}
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}else{
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if(Ustep == 0 && sw == 2){ // check end-switches only @ full steps
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stop_motor();
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return;
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}
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if(++Ustep > 7){
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Ustep = 0;
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--Steps_left;
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}
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}
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}
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}
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// Timer2 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){
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}
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#endif // STM8S903
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
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defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
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// Timer3 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15){}
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// Timer3 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16){}
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#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
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defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
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// UART1 TX Interrupt
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INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){}
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// UART1 RX Interrupt
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INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){}
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#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
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// I2C Interrupt
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INTERRUPT_HANDLER(I2C_IRQHandler, 19){}
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#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
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// UART2 TX interrupt
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INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20){
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if(UART2_SR & UART_SR_TXE){
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if(tx_len == 0){
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UART2_CR2 &= ~UART_CR2_TIEN; // disable TXE interrupt
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tx_idx = 0;
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return;
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}
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if(tx_idx < tx_len){
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UART2_DR = UART_tx[tx_idx++];
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}else{
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UART2_CR2 &= ~UART_CR2_TIEN;
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tx_idx = 0;
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tx_len = 0;
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return;
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}
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}
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}
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// UART2 RX interrupt
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INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21){
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U8 rb;
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if(UART2_SR & UART_SR_RXNE){ // data received
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rb = UART2_DR; // read received byte & clear RXNE flag
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if(rb == ' ' || rb == '\t' || rb == '\r' || rb == '\n') return; // omit spaces
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if(rb == '[') rx_idx = 0; // start of message
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//while(!(UART2_SR & UART_SR_TXE));
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UART_rx[rx_idx++] = rb; // put received byte into cycled buffer
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//UART2_DR = rb;
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if(rx_idx == UART_BUF_LEN && rb != ']'){ // Oops: buffer overflow! Just forget old data
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rx_idx = 0;
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return;
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}
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if(rb == ']'){
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uart_rdy = 1;
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UART_rx[rx_idx] = 0;
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}
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}
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}
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#endif // STM8S105 or STM8AF626x
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// UART3 TX interrupt
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INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20){}
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// UART3 RX interrupt
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INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21){}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||
|
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// ADC2 interrupt
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INTERRUPT_HANDLER(ADC2_IRQHandler, 22){}
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#else
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// ADC1 interrupt
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INTERRUPT_HANDLER(ADC1_IRQHandler, 22){
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}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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|
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#ifdef STM8S903
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// Timer6 Update/Overflow/Trigger Interrupt
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INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
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// Timer4 Update/Overflow Interrupt
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INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23){}
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#endif // STM8S903
|
||||
|
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// Eeprom EEC Interrupt
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INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24){}
|
||||
144
STM8/platform/interrupts.h
Normal file
144
STM8/platform/interrupts.h
Normal file
@@ -0,0 +1,144 @@
|
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/*
|
||||
* interrupts.h
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#pragma once
|
||||
#ifndef __INTERRUPTS_H__
|
||||
#define __INTERRUPTS_H__
|
||||
|
||||
#include "stm8l.h"
|
||||
|
||||
// Top Level Interrupt
|
||||
INTERRUPT_DEFINITION(TLI_IRQHandler, 0);
|
||||
|
||||
// Auto Wake Up Interrupt
|
||||
INTERRUPT_DEFINITION(AWU_IRQHandler, 1);
|
||||
|
||||
// Clock Controller Interrupt
|
||||
INTERRUPT_DEFINITION(CLK_IRQHandler, 2);
|
||||
|
||||
// External Interrupt PORTA
|
||||
INTERRUPT_DEFINITION(EXTI_PORTA_IRQHandler, 3);
|
||||
|
||||
// External Interrupt PORTB
|
||||
INTERRUPT_DEFINITION(EXTI_PORTB_IRQHandler, 4);
|
||||
|
||||
// External Interrupt PORTC
|
||||
INTERRUPT_DEFINITION(EXTI_PORTC_IRQHandler, 5);
|
||||
|
||||
// External Interrupt PORTD
|
||||
INTERRUPT_DEFINITION(EXTI_PORTD_IRQHandler, 6);
|
||||
|
||||
// External Interrupt PORTE
|
||||
INTERRUPT_DEFINITION(EXTI_PORTE_IRQHandler, 7);
|
||||
|
||||
#ifdef STM8S903
|
||||
// External Interrupt PORTF
|
||||
INTERRUPT_DEFINITION(EXTI_PORTF_IRQHandler, 8);
|
||||
#endif // STM8S903
|
||||
|
||||
#if defined (STM8S208) || defined (STM8AF52Ax)
|
||||
// CAN RX Interrupt routine.
|
||||
INTERRUPT_DEFINITION(CAN_RX_IRQHandler, 8);
|
||||
|
||||
// CAN TX Interrupt routine.
|
||||
INTERRUPT_DEFINITION(CAN_TX_IRQHandler, 9);
|
||||
#endif // STM8S208 || STM8AF52Ax
|
||||
|
||||
// SPI Interrupt routine.
|
||||
INTERRUPT_DEFINITION(SPI_IRQHandler, 10);
|
||||
|
||||
// Timer1 Update/Overflow/Trigger/Break Interrupt
|
||||
INTERRUPT_DEFINITION(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11);
|
||||
|
||||
// Timer1 Capture/Compare Interrupt routine.
|
||||
INTERRUPT_DEFINITION(TIM1_CAP_COM_IRQHandler, 12);
|
||||
|
||||
#ifdef STM8S903
|
||||
// Timer5 Update/Overflow/Break/Trigger Interrupt
|
||||
INTERRUPT_DEFINITION(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13);
|
||||
|
||||
// Timer5 Capture/Compare Interrupt
|
||||
INTERRUPT_DEFINITION(TIM5_CAP_COM_IRQHandler, 14);
|
||||
|
||||
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||
// Timer2 Update/Overflow/Break Interrupt
|
||||
INTERRUPT_DEFINITION(TIM2_UPD_OVF_BRK_IRQHandler, 13);
|
||||
|
||||
// Timer2 Capture/Compare Interrupt
|
||||
INTERRUPT_DEFINITION(TIM2_CAP_COM_IRQHandler, 14);
|
||||
#endif // STM8S903
|
||||
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
|
||||
defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
|
||||
// Timer3 Update/Overflow/Break Interrupt
|
||||
INTERRUPT_DEFINITION(TIM3_UPD_OVF_BRK_IRQHandler, 15);
|
||||
|
||||
// Timer3 Capture/Compare Interrupt
|
||||
INTERRUPT_DEFINITION(TIM3_CAP_COM_IRQHandler, 16);
|
||||
#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
|
||||
|
||||
#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
|
||||
defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
|
||||
// UART1 TX Interrupt
|
||||
INTERRUPT_DEFINITION(UART1_TX_IRQHandler, 17);
|
||||
|
||||
// UART1 RX Interrupt
|
||||
INTERRUPT_DEFINITION(UART1_RX_IRQHandler, 18);
|
||||
#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
|
||||
|
||||
// I2C Interrupt
|
||||
INTERRUPT_DEFINITION(I2C_IRQHandler, 19);
|
||||
|
||||
#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
|
||||
// UART2 TX interrupt
|
||||
INTERRUPT_DEFINITION(UART2_TX_IRQHandler, 20);
|
||||
|
||||
// UART2 RX interrupt
|
||||
INTERRUPT_DEFINITION(UART2_RX_IRQHandler, 21);
|
||||
#endif // STM8S105 or STM8AF626x
|
||||
|
||||
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||
// UART3 TX interrupt
|
||||
INTERRUPT_DEFINITION(UART3_TX_IRQHandler, 20);
|
||||
|
||||
// UART3 RX interrupt
|
||||
INTERRUPT_DEFINITION(UART3_RX_IRQHandler, 21);
|
||||
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||
|
||||
#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
|
||||
// ADC2 interrupt
|
||||
INTERRUPT_DEFINITION(ADC2_IRQHandler, 22);
|
||||
#else // STM8S105, STM8S103 or STM8S903 or STM8AF626x
|
||||
// ADC1 interrupt
|
||||
INTERRUPT_DEFINITION(ADC1_IRQHandler, 22);
|
||||
#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
||||
|
||||
#ifdef STM8S903
|
||||
// Timer6 Update/Overflow/Trigger Interrupt
|
||||
INTERRUPT_DEFINITION(TIM6_UPD_OVF_TRG_IRQHandler, 23);
|
||||
#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
|
||||
// Timer4 Update/Overflow Interrupt
|
||||
INTERRUPT_DEFINITION(TIM4_UPD_OVF_IRQHandler, 23);
|
||||
#endif // STM8S903
|
||||
|
||||
// Eeprom EEC Interrupt
|
||||
INTERRUPT_DEFINITION(EEPROM_EEC_IRQHandler, 24);
|
||||
|
||||
#endif // __INTERRUPTS_H__
|
||||
147
STM8/platform/main.c
Normal file
147
STM8/platform/main.c
Normal file
@@ -0,0 +1,147 @@
|
||||
/*
|
||||
* blinky.c
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "ports_definition.h"
|
||||
#include "interrupts.h"
|
||||
#include "stepper.h"
|
||||
#include "uart.h"
|
||||
#include "proto.h"
|
||||
|
||||
//U32 Global_time = 0L; // global time in ms
|
||||
|
||||
/*
|
||||
* 0 0000
|
||||
* 1 0001
|
||||
* 2 0010
|
||||
* 3 0011
|
||||
* 4 0100
|
||||
* 5 0101
|
||||
* 6 0110
|
||||
* 7 0111
|
||||
* 8 1000
|
||||
* 9 1001
|
||||
*10 1010
|
||||
*11 1011
|
||||
*12 1100
|
||||
*13 1101
|
||||
*14 1110
|
||||
*15 1111
|
||||
*/
|
||||
// microsteps: DCBA = 1000, 1100, 0100, 0110, 0010, 0011, 0001, 1001 -- for ULN
|
||||
// what a shit is this > DCBA = 0001, 0010, 0110, 1010, 1001, 1000, 0100, 0000 - bipolar
|
||||
// 1000, 1010, 0010, 0110, 0100, 0101, 0001, 1001 - half-step
|
||||
// 1010, 0110, 0101, 1001 - full step
|
||||
//const U8 ustepsUNI[8] = {8, 12, 4, 6, 2, 3, 1, 9}; // ULN - unipolar
|
||||
//const U8 ustepsBIP[8] = {8, 10, 2, 6, 4, 5, 1, 9}; // bipolar
|
||||
// current usteps
|
||||
//U8 const *usteps = ustepsUNI;
|
||||
|
||||
int main() {
|
||||
//unsigned long T = 0L;
|
||||
// int Ival;
|
||||
// U8 rb;
|
||||
CLK_ICKR |= 8; // enable LSI for watchdog
|
||||
CFG_GCR |= 1; // disable SWIM
|
||||
// Configure clocking
|
||||
CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
|
||||
|
||||
|
||||
PORT(LEDS_PORT, DDR) |= LEDS_PINS;
|
||||
PORT(LEDS_PORT, CR1) |= LEDS_PINS;
|
||||
PORT(LEDS_PORT, CR2) |= LEDS_PINS;
|
||||
|
||||
// Configure timer 1 - LEDs
|
||||
// prescaler = f_{in}/f_{tim1} - 1
|
||||
// set Timer1 to 1MHz: 1/1 - 1 = 15
|
||||
TIM1_PSCRH = 0;
|
||||
TIM1_PSCRL = 15; // LSB should be written last as it updates prescaler
|
||||
// auto-reload each 256ticks:
|
||||
TIM1_ARRH = 0x0;
|
||||
TIM1_ARRL = 0xFF;
|
||||
TIM1_CCR1H = 0;
|
||||
TIM1_CCR1L = 1; // Minimal brightness
|
||||
TIM1_CCR2H = 0;
|
||||
TIM1_CCR2L = 1;
|
||||
TIM1_CCR3H = 0;
|
||||
TIM1_CCR3L = 1;
|
||||
|
||||
// interrupts: none
|
||||
// PWM mode 1 - OC1M = 110
|
||||
TIM1_CCMR1 = 0x60; TIM1_CCMR2 = 0x60; TIM1_CCMR3 = 0x60;
|
||||
TIM1_CCER1 = 0x11; // CC1E, CC2E
|
||||
TIM1_CCER2 = 0x01; // CC3E
|
||||
// auto-reload + enable
|
||||
TIM1_CR1 = TIM_CR1_APRE | TIM_CR1_CEN;
|
||||
TIM1_BKR |= 1<<7; // MOE - enable main output
|
||||
|
||||
// Configure pins
|
||||
// PD5 - UART2_TX
|
||||
PORT(UART_PORT, DDR) |= UART_TX_PIN;
|
||||
PORT(UART_PORT, CR1) |= UART_TX_PIN;
|
||||
PORT(UART_PORT, CR2) |= UART_TX_PIN;
|
||||
|
||||
// Configure UART
|
||||
// 8 bit, no parity, 1 stop (UART_CR1/3 = 0 - reset value)
|
||||
// 9600 on 16MHz: BRR1=0x41, BRR2=0x02
|
||||
UART2_BRR2 = 0x03; UART2_BRR1 = 0x68;
|
||||
UART2_CR2 = UART_CR2_TEN | UART_CR2_REN | UART_CR2_RIEN; // Allow RX/TX, generate ints on rx//tx
|
||||
|
||||
Stepper_speed = 1000;
|
||||
// Configure timer 2 to generate signals for CLK
|
||||
TIM2_PSCR = 4; // 1MHz
|
||||
TIM2_ARRH = 1000 >> 8; // set speed
|
||||
TIM2_ARRL = 1000 & 0xff;
|
||||
TIM2_IER = TIM_IER_UIE; // update interrupt enable
|
||||
TIM2_CR1 |= TIM_CR1_APRE | TIM_CR1_URS; // auto reload + interrupt on overflow
|
||||
|
||||
setup_stepper_pins();
|
||||
RELAY_SETUP();
|
||||
// setup endswitch selection pins
|
||||
PORT(ESW_SEL_PORT, DDR) |= ESW_SEL_PINS;
|
||||
PORT(ESW_SEL_PORT, CR1) |= ESW_SEL_PINS;
|
||||
// Pullup to esw inputs
|
||||
PORT(ESW_PORT, CR1) |= ESW_PINS;
|
||||
|
||||
// enable all interrupts
|
||||
enableInterrupts();
|
||||
|
||||
|
||||
// Setup watchdog
|
||||
IWDG_KR = KEY_ENABLE; // start watchdog
|
||||
IWDG_KR = KEY_ACCESS; // enable access to protected registers
|
||||
IWDG_PR = 6; // /256
|
||||
IWDG_RLR = 0xff; // max time for watchdog (1.02s)
|
||||
|
||||
// Loop
|
||||
uart_write("Scorpio platform ready\n");
|
||||
if(RST_SR) RST_SR = 0x1f; // clear reset flags writing 1
|
||||
do{
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
if(uart_rdy){
|
||||
process_string();
|
||||
}
|
||||
if(chk_esw){
|
||||
stepper_get_esw(cur_motor);
|
||||
}
|
||||
}while(1);
|
||||
}
|
||||
|
||||
|
||||
83
STM8/platform/ports_definition.h
Normal file
83
STM8/platform/ports_definition.h
Normal file
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* ports_definition.h - definition of ports pins & so on
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __PORTS_DEFINITION_H__
|
||||
#define __PORTS_DEFINITION_H__
|
||||
|
||||
#include "stm8l.h"
|
||||
|
||||
#ifdef EBUG
|
||||
#define DBG(x) uart_write(x)
|
||||
#else
|
||||
#define DBG(x)
|
||||
#endif
|
||||
|
||||
// macro for using in port constructions like PORT(LED_PORT, ODR) = xx
|
||||
#define CONCAT(a, b) a ## _ ## b
|
||||
#define PORT(a, b) CONCAT(a , b)
|
||||
|
||||
|
||||
// UART2_TX
|
||||
#define UART_PORT PD
|
||||
#define UART_TX_PIN GPIO_PIN5
|
||||
|
||||
/****** Relays: B4, B5, F4 ******/
|
||||
#define RELAY_SETUP() do{PB_DDR |= 0x30; PB_CR1 |= 0x30; PF_DDR |= 0x10; PF_CR1 |= 0x10;}while(0)
|
||||
#define RELAYS_OFF() do{PB_ODR &= ~0x30; PF_ODR |= ~0x10;}while(0)
|
||||
#define RELAY1_ON() do{PB_ODR |= 0x10;}while(0)
|
||||
#define RELAY1_OFF() do{PB_ODR &= ~0x10;}while(0)
|
||||
#define RELAY2_ON() do{PB_ODR |= 0x20;}while(0)
|
||||
#define RELAY2_OFF() do{PB_ODR &= ~0x20;}while(0)
|
||||
#define RELAY3_ON() do{PF_ODR |= 0x10;}while(0)
|
||||
#define RELAY3_OFF() do{PF_ODR &= ~0x10;}while(0)
|
||||
#define RELAY_1() (PB_ODR & 0x10)
|
||||
#define RELAY_2() (PB_ODR & 0x20)
|
||||
#define RELAY_3() (PF_ODR & 0x10)
|
||||
|
||||
|
||||
/***** LEDs (C1..C3) *****/
|
||||
#define LEDS_PORT PC
|
||||
#define LEDS_PINS 0x0E
|
||||
|
||||
/***** Stepper motor *****/
|
||||
// Clocking
|
||||
// PB0..3 -- pins A..D of stepper
|
||||
#define STP_PORT PB
|
||||
#define STP_PINS 0x0f
|
||||
|
||||
// PC5-PC7 - endswitch address (through multiplexer)
|
||||
#define ESW_SEL_PORT PC
|
||||
#define ESW_SEL_PINS 0xe0
|
||||
|
||||
// PD0..PD4 - select pair 0..2 & stepper
|
||||
#define STP_SEL_PORT PD
|
||||
#define STP_SEL_PINS 0x1f
|
||||
|
||||
#define STPRS_OFF() do{PORT(STP_PORT, ODR) &= ~STP_PINS; PORT(STP_SEL_PORT, ODR) &= ~0x07; PORT(STP_SEL_PORT, ODR) |= 0x18; }while(0)
|
||||
|
||||
#define ESW_PORT PA
|
||||
#define ESW_PINS 0x06
|
||||
// PA1 - "+", PA2 - "-"
|
||||
#define ESW_PLUS 0x04
|
||||
#define ESW_MINUS 0x02
|
||||
|
||||
#endif // __PORTS_DEFINITION_H__
|
||||
212
STM8/platform/proto.c
Normal file
212
STM8/platform/proto.c
Normal file
@@ -0,0 +1,212 @@
|
||||
/*
|
||||
* geany_encoding=koi8-r
|
||||
* proto.c - base protocol definitions
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "ports_definition.h"
|
||||
#include "uart.h"
|
||||
#include "stepper.h"
|
||||
|
||||
/**
|
||||
* Move motor for given amount of steps, cmd should be 'N nnnn any other symbols',
|
||||
* N - motor number,
|
||||
* nnnn - steps (-32768...32768)
|
||||
* @return 1 if all OK
|
||||
*/
|
||||
U8 move_motor(char *cmd){
|
||||
U8 N = (U8)*cmd - '0';
|
||||
int steps;
|
||||
if(N < 1 || N > 6 || Steps_left) return 0;
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
++cmd;
|
||||
if(!readInt(cmd, &steps)) return 0;
|
||||
#ifdef EBUG
|
||||
uart_write("Move motor ");
|
||||
printUint((U8*)&N, 1);
|
||||
uart_write(" for ");
|
||||
print_long((long)steps);
|
||||
uart_write("steps\n");
|
||||
#endif
|
||||
|
||||
if(steps) return stepper_move(N, steps);
|
||||
else{ // steps == 0 - just check endswitches
|
||||
prep2chkesw(N);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Switch relay on/off depending on cmd value
|
||||
* 1 - on, 0 - off
|
||||
* @param N - second symbol of command ([2 N ...])
|
||||
*/
|
||||
U8 relay(char *cmd, char N){
|
||||
U8 on = 0;
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
if(*cmd == '-'){ // just check
|
||||
char ans[] = "[2 N St=1]\n";
|
||||
ans[3] = N;
|
||||
switch (N){
|
||||
case '7':
|
||||
on = RELAY_1();
|
||||
break;
|
||||
case '8':
|
||||
on = RELAY_2();
|
||||
break;
|
||||
case '9':
|
||||
on = RELAY_3();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
if(!on) ans[8] = '0'; // off
|
||||
uart_write(ans);
|
||||
return 0; // not echo previous command
|
||||
}
|
||||
if(*cmd == '0'){ // turn OFF
|
||||
switch (N){
|
||||
case '7':
|
||||
RELAY1_OFF();
|
||||
break;
|
||||
case '8':
|
||||
RELAY2_OFF();
|
||||
break;
|
||||
case '9':
|
||||
RELAY3_OFF();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
if(*cmd == '1'){ // turn ON
|
||||
switch (N){
|
||||
case '7':
|
||||
RELAY1_ON();
|
||||
break;
|
||||
case '8':
|
||||
RELAY2_ON();
|
||||
break;
|
||||
case '9':
|
||||
RELAY3_ON();
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//extern void print_time();
|
||||
|
||||
void LEDshine(char *cmd, U8 N){
|
||||
int s;
|
||||
if(!readInt(cmd, &s)) return;
|
||||
if(s < 0 || s > 255) return;
|
||||
switch (N){
|
||||
case 0:
|
||||
TIM1_CCR1L = s;
|
||||
break;
|
||||
case 1:
|
||||
TIM1_CCR2L = s;
|
||||
break;
|
||||
case 2:
|
||||
TIM1_CCR3L = s;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* process commands from user buffer
|
||||
* @return 1 if all OK
|
||||
*/
|
||||
U8 process_commands(char *cmd){
|
||||
char s;
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
++cmd;
|
||||
if(*cmd > '0' && *cmd < '7')
|
||||
return move_motor(cmd);
|
||||
s = *cmd;
|
||||
++cmd;
|
||||
switch(s){
|
||||
case '?':
|
||||
uart_write("Steps_left=");
|
||||
print_long((long) Steps_left);
|
||||
uart_write("\n");
|
||||
return 0;
|
||||
break;
|
||||
case '0': // stop motors
|
||||
DBG("restart");
|
||||
stop_motor();
|
||||
RELAYS_OFF();
|
||||
break;
|
||||
case '7':
|
||||
DBG("Shutter");
|
||||
return relay(cmd, '7');
|
||||
break;
|
||||
case '8':
|
||||
DBG("Neon");
|
||||
return relay(cmd, '8');
|
||||
break;
|
||||
case '9':
|
||||
DBG("Flat");
|
||||
return relay(cmd, '9');
|
||||
break;
|
||||
case 'a':
|
||||
return stepper_ch_speed(cmd);
|
||||
break;
|
||||
case 'b':
|
||||
DBG("LED1");
|
||||
LEDshine(cmd, 0);
|
||||
break;
|
||||
case 'c':
|
||||
DBG("LED2");
|
||||
LEDshine(cmd, 1);
|
||||
break;
|
||||
case 'd':
|
||||
DBG("LED3");
|
||||
LEDshine(cmd, 2);
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
DBG("\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
void process_string(){
|
||||
U8 noerr=1, ctr;
|
||||
char buf[UART_BUF_LEN+1];
|
||||
char *cmd = UART_rx;
|
||||
if(uart_rdy == 0) return;
|
||||
uart_rdy = 0;
|
||||
if(noerr){ // echo back given string
|
||||
++cmd;
|
||||
if(*cmd != '2') return;
|
||||
for(ctr = 0; ctr <= rx_idx; ++ctr) buf[ctr] = UART_rx[ctr];
|
||||
rx_idx = 0;
|
||||
if(process_commands(cmd))
|
||||
uart_write(buf);
|
||||
}
|
||||
}
|
||||
30
STM8/platform/proto.h
Normal file
30
STM8/platform/proto.h
Normal file
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* geany_encoding=koi8-r
|
||||
* proto.h
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __PROTO_H__
|
||||
#define __PROTO_H__
|
||||
|
||||
void process_string();
|
||||
|
||||
#endif // __PROTO_H__
|
||||
113
STM8/platform/sco_platform.ihx
Normal file
113
STM8/platform/sco_platform.ihx
Normal file
@@ -0,0 +1,113 @@
|
||||
:2080A000AE5007F6AA0FF7AE5008F6AA0FF7AE5009F6AA0FF7AE5011F6AA1FF7AE5012F6F1
|
||||
:2080C000AA1FF7AE5013F6AA1FF7AE5005F6A4F0F7AE500FF6A4F8F7AE500FF6AA18F781C2
|
||||
:2080E0005204965C891E0989CD868E5B044D27441E01A3FFF72D3D1E01A37FFF2E3616012A
|
||||
:2081000072A9000AAEFFFF65A3007D24034F2025CF00643504530C9E0F0390AE530D90F7AE
|
||||
:208120004F9FAE530EF735015301AE5300F6AA84F7A601214F5B048188AE5001F66B017B4A
|
||||
:2081400001954F417B0141889E1102842704029E014F4CA1FF25F09EA5022604A601200924
|
||||
:208160009EA5042603A602214F5B018152040D07270F7B07A10622091E082705CE006127FE
|
||||
:20818000044FCC825590AE004C5F7B0797581F0172F90190FE35AA50E00D082A0B350100E6
|
||||
:2081A000631E08501F082004725F00637B09C700627B08C70061AE005A9F1B0702A9009506
|
||||
:2081C000F69095AE500AF6A41F6B03909E4EA4F0481A03AE500AF7AE5005F6A4F0F7AE505F
|
||||
:2081E0000FF6A4F8F7AE500FF6AA18F7AE500FF695909F4488A6016B05844D270508044A2E
|
||||
:2082000026FB9E1A04AE500FF7AE500FF690542408A4EFAE500FF72006A4F7AE500FF7CD41
|
||||
:208220008138027B0701889EC70066844D2714A1012609725D0063260A4F2007725D0063C6
|
||||
:2082400027014F4D2706CD82584F2009AE5300F6AA01F7A6015B048172115300AE5005F61F
|
||||
:20826000A4F0F7AE500FF6A4F8F7AE500FF6AA18F7725F00675FCF006135010043815214FA
|
||||
:20828000965C5C1F131E13A65BF71E135CA632F71E135C5CA620F71E131C00031F0E1E0E8A
|
||||
:2082A000A630F71E13A620E7041E13A653E7051E13A674E7061E13A63DE7071E131C00086A
|
||||
:2082C0001F111E11A630F71E13A65DE7091E13A60AE70A1E131C000B7F0D1727627B17A1C5
|
||||
:2082E00006225C35AA50E0AE005A9F1B1702A90095F66B01AE500AF6A41F6B107B014EA4C6
|
||||
:20830000F0481A10AE500AF7C60043A1012309C600434AC700432027725F00437B17AB3000
|
||||
:208320001E0EF7CD8138954D2603A603959EAB301E11F71E1389CD84D35B02725F00665BDF
|
||||
:208340001481880D0427307B04A106222AAE005A9F1B0402A90095F69095AE500AF6A41F44
|
||||
:198360006B01909E4EA4F0481A01AE500AF77B04C7006635FF00438481FE
|
||||
:208D300000080A0206040501090000000300020001000000040005000104030002050000D8
|
||||
:048D50000000000718
|
||||
:2083790080808080808080808035005255808088AE5302F6A501277CA4FEAE5302F7AE5024
|
||||
:2083990005F6A4F06B01AE00449FCB006702A90095F61A01AE5005F7CE00612605CD8258BA
|
||||
:2083B9002052CD81389095725D00632720725A0067C600674D2A3D35070067CE00615ACFFF
|
||||
:2083D9000061909EA101262CCD82582027725D0067260B909EA1022605CD82582016725C05
|
||||
:2083F9000067C60067A1072D0B725F0067CE00615ACF00618480808080805202AE5240F671
|
||||
:208419004D2A43725D006B260DAE5245F6A47FF7725F006A2030C6006BC1006A2319AE00F6
|
||||
:20843900221F01C6006A97725C006A4F9572FB01F6AE5241F7200FAE5245F6A47FF7725F0D
|
||||
:20845900006A725F006B5B02805202AE5240F6A5202761AE5241F6A1202759A1092755A16A
|
||||
:208479000D2751A10A274DA15B2604725F0069AE00011F0141C600694188C600694C95C700
|
||||
:20849900006984024F0172FB01F7A15D2603A601214F88C60069A1208426094D2606725F6C
|
||||
:1A84B900006920104D270D350100685FC600699772FB017F5B028080808082
|
||||
:018D5400001E
|
||||
:2084D3005202725D006B270635AA50E020F4721F5245725F006AAE00221F011E05C6006B04
|
||||
:2084F3009097725C006B4F909572F901F65C90F7F64D2707C6006BA12025E2AE5245F6AA01
|
||||
:2085130080F75B028152255F1F101F0E7B2AA1042303CC85FC7B2AA1032603CC85FC0D2A0E
|
||||
:208533002603CC85FC965C1F184F5F9772FB187F4CA10C25F51E18A60AE70A7B2AA10127E8
|
||||
:208553000E7B2AA10227197B2AA104272E20451E28F66B174F5F6B101F0E7B176B112034F8
|
||||
:20857300162817121E12FE1F24162417220F210F20162217101620170E20191628171E1EBA
|
||||
:208593001EE6036B1DE6026B1CFE1F1A161C1710161A170EA6096B0D4B0A5F894B001E1404
|
||||
:2085B300891E1489CD8BB85B08517B0D0A0D5F9772FB18909FAB30F74B0A5F894B001E14CB
|
||||
:2085D300891E1489CD8C4F5B081F10170E1E1026041E0E27067B0DA1FF2CBD7B0D4C5F9759
|
||||
:2085F30072FB1889CD84D35B025B258152100F01961C00031F0F1E0F1C000B7F0D132A1452
|
||||
:20861300161590504F1214974F12139517151F13A6016B01A60B6B024B0A5F894B001E19D9
|
||||
:20863300891E1989CD8B935B089F0A025F417B024172FB0FAB30F74B0A5F894B001E1989F1
|
||||
:208653001E1989CD8C285B081F1517131E1526041E1327040D0226C07B020D0227110D0185
|
||||
:20867300270D7B024A5F9772FB0F88A62DF7845F9772FB0F89CD84D35B128152140F02A67A
|
||||
:20869300016B015F1F051F0335AA50E01E17F6A12D2607A6016B025C1F17161717091E0966
|
||||
:2086B300F61E095C1F09A12B27F4A1302552A139224E0F01881E06891E06894B0A5F894B13
|
||||
:2086D30000CD8CA95B081F0E170C84905F90975F905D2A015A72F90D9F190C889E190C954B
|
||||
:2086F3008472A20030A20002A2009517051F03AE7FFE13054F12044F12032EA2A6016B0197
|
||||
:208713000D0127034F202F0D02271C7B06406B124F12056B114F12046B104F12036B031636
|
||||
:198733001117057B106B0416191713160517071E131607FFA6015B148190
|
||||
:048D5500000000001A
|
||||
:208000008200808382000000820083798200837A8200837B8200837C8200837D8200837E56
|
||||
:208020008200837F820083808200000082000000820083818200838282008387820083880D
|
||||
:208040008200840F8200841082008411820000008200000082008412820084138200846241
|
||||
:20806000820084D0820084D1820084D28200000082000000820000008200000082000000F1
|
||||
:1D808300AE00422707724F00005A26F9AE00292709D68D2FD700425A26F7CC808093
|
||||
:03808000CC874C5E
|
||||
:20874C00AE50C0F6AA08F772107F60350050C6AE500CF6AA0EF7AE500DF6AA0EF7AE500E99
|
||||
:20876C00F6AA0EF735005260350F52613500526235FF5263350052653501526635005267D0
|
||||
:20878C0035015268350052693501526A35605258356052593560525A3511525C3501525D62
|
||||
:2087AC0035815250721E526DAE5011F6AA20F7AE5012F6AA20F7AE5013F6AA20F735035227
|
||||
:2087CC004335685242352C5245AE03E8CF00643504530C3503530D35E8530E35015301AE6F
|
||||
:2087EC005300F6AA84F7CD80A0AE5007F6AA30F7AE5008F6AA30F7AE501BF6AA10F7AE50BB
|
||||
:20880C001CF6AA10F7AE500CF6AAE0F7AE500DF6AAE0F7AE5003F6AA06F79A35CC50E035E8
|
||||
:20882C005550E0350650E135FF50E2AE886889CD84D35B02AE50B3F64D2704351F50B33582
|
||||
:20884C00AA50E0725D00682703CD8B2B725D004327ED3B0066CD827E8420E48153636F721A
|
||||
:20886C0070696F20706C6174666F726D2072656164790A0052021E05F6A030A101250AA131
|
||||
:20888C0006220690CE006127034F203235AA50E05C1F05965C88891E0889CD868E5B0497FC
|
||||
:2088AC0084414D4126034F20151E01270B1E018988CD816C5B03200688CD8342844F5B02A3
|
||||
:2088CC0081521535AA50E01E18F66B147B1AA1372606A6016B0D20020F0D7B1AA13826065A
|
||||
:2088EC00A6016B1320020F137B1AA1392606A6016B1520020F157B14A12D2703CC89A996E0
|
||||
:20890C005C1F111E11A65BF71E115CA632F71E115C5CA620F7161172A90003A64E90F71EBC
|
||||
:20892C0011A620E7041E11A653E7051E11A674E7061E11A63DE7071E111C00081F0F1E0F71
|
||||
:20894C00A631F71E11A65DE7091E11A60AE70A1E111C000B7F7B1A90F70D0D260A0D1326CA
|
||||
:20896C00100D152616201EAE5005F6A4106B0E2018AE5005F6A4206B0E200EAE5019F6A4CC
|
||||
:20898C00106B0E20044FCC8A150D0E26051E0FA630F71E1189CD84D35B024F206C7B14A1E0
|
||||
:2089AC003026300D0D260A0D13260F0D152614201BAE5005F6A4EFF72015AE5005F6A4DFBB
|
||||
:2089CC00F7200CAE5019F6A4EFF720034F203AA60120367B14A131262F0D0D260A0D1326C2
|
||||
:2089EC000F0D152614201BAE5005F6AA10F72015AE5005F6AA20F7200CAE5019F6AA10F742
|
||||
:208A0C0020034F2004A601214F5B15815202965C891E0789CD868E5B044D27370D012B33D8
|
||||
:208A2C001E01A300FF2C2C7B02887B08A100842712887B08A101842710887B08A10284276A
|
||||
:208A4C000E2010AE5266F7200AAE5268F72004AE526AF75B028135AA50E01E035C1F031EB7
|
||||
:208A6C0003F6A1302D0DA1372E0989CD88805B02CC8B2A5CA130274AA1372759A138275F46
|
||||
:208A8C00A1392765A13F2713A1612767A162276BA1632771A1642777CC8B25AE8B8589CD56
|
||||
:208AAC0084D35B0290CE00615F905D2A015A908989CD85FF5B04AE8B9189CD84D35B024FF1
|
||||
:208ACC00205CCD8258AE5005F6A4CFF7AE5019F6AAEFF720474B3789CD88CD5B03203F4BCB
|
||||
:208AEC003889CD88CD5B0320354B3989CD88CD5B03202B89CD80E05B0220234B0089CD8A7B
|
||||
:208B0C00185B0320174B0189CD8A185B03200D4B0289CD8A185B0320034F2002A60181521C
|
||||
:208B2C0029AE00011F2416241728725D00682746725F00681E285C1F011E01F6A1322636B2
|
||||
:208B4C00961C00031F264F905F909772F9265F9772FB2488F69790F7844CC1006923E8727F
|
||||
:208B6C005F00691E0189CD8A625B024D27081E2689CD84D35B025B298153746570735F6CBA
|
||||
:208B8C006566743D000A001E0916072A03CD8D258990891E0916072A03CD8D25899089CD52
|
||||
:208BAC008BB85B087B032A03CD8D258152030F030F017B0A484F494D262E160C1E0A9058A9
|
||||
:208BCC0059170C1F0A1E08130C7B07120B7B06120A240D160C1E0A549056170C1F0A20083A
|
||||
:208BEC000C017B016B0320CA7B036B021E0872F00C7B07120B90977B06120A25061F0890C4
|
||||
:208C0C00951706160C1E0A549056170C1F0A7B020A024D26D71E0816065B03811E0916078E
|
||||
:208C2C002A03CD8D258990891E0916072A03CD8D25899089CD8C4F5B087B0318072A03CDA6
|
||||
:208C4C008D258152065F1F051F03A6206B027B09484F496B01160B1E09905859170B1F0902
|
||||
:208C6C0016051E0390585917051F030D0127067B06AA016B061E0572F00F7B04120E9097FB
|
||||
:208C8C007B03120D250C1F05909517037B0CAA016B0C0A0226B81E0B16095B06815F898969
|
||||
:208CAC007B0A977B0E421F037B09977B0E4272FB021F024FA9006B017B0A977B0D4272FB72
|
||||
:208CCC00021F024F19016B017B0A977B0C4272FB011F017B09977B0D4272FB011F017B0827
|
||||
:208CEC00977B0E4272FB011F017B07977B0E429F1B016B017B0A977B0B429F1B016B017BE7
|
||||
:208D0C0009977B0C429F1B016B017B08977B0D429F1B016B019085858190535D2703535C78
|
||||
:048D2C0081905C8155
|
||||
:00000001FF
|
||||
183
STM8/platform/stepper.c
Normal file
183
STM8/platform/stepper.c
Normal file
@@ -0,0 +1,183 @@
|
||||
/*
|
||||
* stepper.c
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "ports_definition.h"
|
||||
#include "uart.h"
|
||||
#include "stepper.h"
|
||||
|
||||
volatile U8 chk_esw = 0; // need 2 check end-switches
|
||||
|
||||
U8 usteps[8] = {0b1000, 0b1010, 0b0010, 0b0110, 0b0100, 0b0101, 0b0001, 0b1001};
|
||||
|
||||
// numbers of motors in inner system:
|
||||
// MOTOR6=5, MOTOR5=4, MOTOR4=0, MOTOR3=1, MOTOR2=2, MOTOR1=3
|
||||
static motors_numbers[7] = {0,3,2,1,0,4,5};
|
||||
// array of end-switches for appropriate motor number
|
||||
// M1=e1, M2=e4, M3=e3, M4=e0, M5=e2, M6=e5
|
||||
static U8 esw_arr[7] = {0, 1, 4, 3, 0, 2, 5};
|
||||
#define ESW_SELECT(NUM) do{register U8 nsw = esw_arr[NUM]; register U8 C=PC_ODR & ~ESW_SEL_PINS; C |= ((nsw)<<5); PC_ODR = C;}while(0)
|
||||
|
||||
volatile int Steps_left = 0; // Number of steps
|
||||
volatile char Dir = 0; // direction of moving: 0/1
|
||||
U16 Stepper_speed = 0; // length of one MICROstep in us
|
||||
U8 cur_motor = 7;
|
||||
/**
|
||||
* Setup pins of stepper motor (all - PP out)
|
||||
*/
|
||||
void setup_stepper_pins(){
|
||||
// Push-pull for outputs
|
||||
// PB0..3
|
||||
PORT(STP_PORT, DDR) |= STP_PINS;
|
||||
PORT(STP_PORT, CR1) |= STP_PINS;
|
||||
PORT(STP_PORT, CR2) |= STP_PINS;
|
||||
// PD0..4
|
||||
PORT(STP_SEL_PORT, DDR) |= STP_SEL_PINS;
|
||||
PORT(STP_SEL_PORT, CR1) |= STP_SEL_PINS;
|
||||
PORT(STP_SEL_PORT, CR2) |= STP_SEL_PINS;
|
||||
|
||||
STPRS_OFF();
|
||||
}
|
||||
|
||||
U8 stepper_ch_speed(char *spd){
|
||||
int newval;
|
||||
if(readInt(spd, &newval)){
|
||||
if(newval > -9 && newval < 0x7fff){
|
||||
U16 O = 0xffff / (newval + 10);
|
||||
if(O < MIN_STEP_LENGTH) return 0;
|
||||
Stepper_speed = O;
|
||||
// Configure timer 2 to generate signals for CLK
|
||||
TIM2_PSCR = 4; // 1MHz
|
||||
TIM2_ARRH = O >> 8; // set speed
|
||||
TIM2_ARRL = O & 0xff;
|
||||
TIM2_IER = TIM_IER_UIE; // update interrupt enable
|
||||
TIM2_CR1 |= TIM_CR1_APRE | TIM_CR1_URS; // auto reload + interrupt on overflow & RUN
|
||||
#ifdef EBUG
|
||||
uart_write("Speed changed to ");
|
||||
printUint((U8*)&O, 2);
|
||||
uart_write("\n");
|
||||
#endif
|
||||
return 1;
|
||||
}else DBG("Bad speed value\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* Check endswitches
|
||||
* @return 0 if none pressed, 1 if "-", 2 if "+"
|
||||
*/
|
||||
U8 check_endsw(){
|
||||
// A1 - "+", A2 - "-"
|
||||
U8 i;
|
||||
U8 pc = PORT(ESW_PORT, IDR);
|
||||
for(i = 0; i < 255; ++i){ // wait a while for multiplexer
|
||||
if(pc != PORT(ESW_PORT, IDR)){
|
||||
pc = PORT(ESW_PORT, IDR);
|
||||
i = 0;
|
||||
}
|
||||
}
|
||||
if(0 == (pc & ESW_MINUS)) return 1;
|
||||
if(0 == (pc & ESW_PLUS)) return 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* move stepper number Nmotor by Nsteps steps
|
||||
* @return 1 if all OK, 0 if error occured
|
||||
*/
|
||||
U8 stepper_move(U8 Nmotor, int Nsteps){
|
||||
U8 c, nm;
|
||||
if(!Nmotor || Nmotor > 6 || !Nsteps || Steps_left) return 0;
|
||||
nm = motors_numbers[Nmotor];
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
|
||||
if(Nsteps < 0){
|
||||
Dir = 1;
|
||||
Nsteps *= -1;
|
||||
}else
|
||||
Dir = 0;
|
||||
Steps_left = Nsteps;
|
||||
// select endswitch
|
||||
ESW_SELECT(Nmotor);
|
||||
// turn all motors OFF
|
||||
STPRS_OFF();
|
||||
// turn on the motor we need
|
||||
PORT(STP_SEL_PORT, ODR) |= (1 << (nm/2));
|
||||
if(nm & 1) PORT(STP_SEL_PORT, ODR) &= ~GPIO_PIN4;
|
||||
else PORT(STP_SEL_PORT, ODR) &= ~GPIO_PIN3;
|
||||
c = check_endsw();
|
||||
cur_motor = Nmotor;
|
||||
if(c){
|
||||
if(c == 1){if(!Dir) c = 0;}
|
||||
else if(Dir) c = 0;
|
||||
}
|
||||
if(c){
|
||||
stop_motor();
|
||||
return 0; // already at end-switch in given direction
|
||||
}
|
||||
DBG("stepper_move\n");
|
||||
TIM2_CR1 |= TIM_CR1_CEN; // turn on timer
|
||||
return 1;
|
||||
}
|
||||
|
||||
void stop_motor(){
|
||||
TIM2_CR1 &= ~TIM_CR1_CEN; // Turn off timer
|
||||
// turn all motors OFF
|
||||
STPRS_OFF();
|
||||
Ustep = 0;
|
||||
Steps_left = 0;
|
||||
chk_esw = 1;
|
||||
DBG("stop\n");
|
||||
}
|
||||
|
||||
/**
|
||||
* get end-switches state for all motors or only Nth
|
||||
* @param Nmotor - number of given motor
|
||||
*/
|
||||
void stepper_get_esw(U8 Nmotor){
|
||||
U8 sw;
|
||||
char str[] = "[2 0 St=0]\n"; // 3 - motor number, 5 - endswitch (3 if none)
|
||||
if(Nmotor == 0 || Nmotor > 6) return; // no running motor
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
ESW_SELECT(Nmotor);
|
||||
if(chk_esw > 1){
|
||||
--chk_esw;
|
||||
return;
|
||||
}
|
||||
chk_esw = 0;
|
||||
str[3] = Nmotor + '0';
|
||||
sw = check_endsw();
|
||||
if(sw == 0) sw = 3;
|
||||
str[8] = sw + '0';
|
||||
uart_write(str);
|
||||
cur_motor = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* prepare for end-switches selection:
|
||||
* switch multiplexer and set flag
|
||||
*/
|
||||
void prep2chkesw(U8 N){
|
||||
if(N == 0 || N > 6) return;
|
||||
ESW_SELECT(N);
|
||||
cur_motor = N;
|
||||
chk_esw = 255;
|
||||
}
|
||||
50
STM8/platform/stepper.h
Normal file
50
STM8/platform/stepper.h
Normal file
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* stepper.h
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __STEPPER_H__
|
||||
#define __STEPPER_H__
|
||||
|
||||
#include "ports_definition.h"
|
||||
|
||||
#define MIN_STEP_LENGTH 125 // max speed == 1/(125us*16) = 500 steps per second
|
||||
|
||||
extern volatile char Ustep;
|
||||
extern volatile U8 chk_esw;
|
||||
extern U8 cur_motor;
|
||||
|
||||
extern volatile int Steps_left;
|
||||
extern U16 Stepper_speed;
|
||||
extern volatile char Dir;
|
||||
extern U8 usteps[];
|
||||
|
||||
void setup_stepper_pins();
|
||||
U8 stepper_ch_speed(char *spd);
|
||||
U8 stepper_move(U8 Nmotor, int Nsteps);
|
||||
|
||||
void stop_motor();
|
||||
U8 check_endsw();
|
||||
void prep2chkesw(U8 Nmotor);
|
||||
void stepper_get_esw(U8 Nmotor);
|
||||
|
||||
U8 chk_stpr_cmd(char N);
|
||||
|
||||
#endif // __STEPPER_H__
|
||||
567
STM8/platform/stm8l.h
Normal file
567
STM8/platform/stm8l.h
Normal file
@@ -0,0 +1,567 @@
|
||||
/*
|
||||
* stm8l.h
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
|
||||
#pragma once
|
||||
#ifndef __STM8L_H__
|
||||
#define __STM8L_H__
|
||||
|
||||
typedef unsigned char U8;
|
||||
typedef unsigned int U16;
|
||||
typedef unsigned long U32;
|
||||
#define NULL (void*)0
|
||||
|
||||
/* functions */
|
||||
#define enableInterrupts() {__asm__("rim\n");} // enable interrupts
|
||||
#define disableInterrupts() {__asm__("sim\n");} // disable interrupts
|
||||
#define iret() {__asm__("iret\n");} // Interrupt routine return
|
||||
#define pop_ccr() {__asm__("pop cc\n");} // Pop CCR from the stack
|
||||
#define push_ccr() {__asm__("push cc\n");}// Push CCR on the stack
|
||||
#define rim() {__asm__("rim\n");} // enable interrupts
|
||||
#define sim() {__asm__("sim\n");} // disable interrupts
|
||||
#define nop() {__asm__("nop\n");} // No Operation
|
||||
#define trap() {__asm__("trap\n");} // Trap (soft IT)
|
||||
#define wfi() {__asm__("wfi\n");} // Wait For Interrupt
|
||||
#define halt() {__asm__("halt\n");} // Halt
|
||||
|
||||
/*
|
||||
* Registers map is shown in short datasheet, page 26
|
||||
*/
|
||||
/* GPIO */
|
||||
#define PA_ODR *(unsigned char*)0x5000
|
||||
#define PA_IDR *(unsigned char*)0x5001
|
||||
#define PA_DDR *(unsigned char*)0x5002
|
||||
#define PA_CR1 *(unsigned char*)0x5003
|
||||
#define PA_CR2 *(unsigned char*)0x5004
|
||||
|
||||
#define PB_ODR *(unsigned char*)0x5005
|
||||
#define PB_IDR *(unsigned char*)0x5006
|
||||
#define PB_DDR *(unsigned char*)0x5007
|
||||
#define PB_CR1 *(unsigned char*)0x5008
|
||||
#define PB_CR2 *(unsigned char*)0x5009
|
||||
|
||||
#define PC_ODR *(unsigned char*)0x500A
|
||||
#define PC_IDR *(unsigned char*)0x500B
|
||||
#define PC_DDR *(unsigned char*)0x500C
|
||||
#define PC_CR1 *(unsigned char*)0x500D
|
||||
#define PC_CR2 *(unsigned char*)0x500E
|
||||
|
||||
#define PD_ODR *(unsigned char*)0x500F
|
||||
#define PD_IDR *(unsigned char*)0x5010
|
||||
#define PD_DDR *(unsigned char*)0x5011
|
||||
#define PD_CR1 *(unsigned char*)0x5012
|
||||
#define PD_CR2 *(unsigned char*)0x5013
|
||||
|
||||
#define PE_ODR *(unsigned char*)0x5014
|
||||
#define PE_IDR *(unsigned char*)0x5015
|
||||
#define PE_DDR *(unsigned char*)0x5016
|
||||
#define PE_CR1 *(unsigned char*)0x5017
|
||||
#define PE_CR2 *(unsigned char*)0x5018
|
||||
|
||||
#define PF_ODR *(unsigned char*)0x5019
|
||||
#define PF_IDR *(unsigned char*)0x501A
|
||||
#define PF_DDR *(unsigned char*)0x501B
|
||||
#define PF_CR1 *(unsigned char*)0x501C
|
||||
#define PF_CR2 *(unsigned char*)0x501D
|
||||
|
||||
#ifdef STM8S105
|
||||
#define PG_ODR *(unsigned char*)0x501E
|
||||
#define PG_IDR *(unsigned char*)0x501F
|
||||
#define PG_DDR *(unsigned char*)0x5020
|
||||
#define PG_CR1 *(unsigned char*)0x5021
|
||||
#define PG_CR2 *(unsigned char*)0x5022
|
||||
|
||||
#define PH_ODR *(unsigned char*)0x5023
|
||||
#define PH_IDR *(unsigned char*)0x5024
|
||||
#define PH_DDR *(unsigned char*)0x5025
|
||||
#define PH_CR1 *(unsigned char*)0x5026
|
||||
#define PH_CR2 *(unsigned char*)0x5027
|
||||
|
||||
#define PI_ODR *(unsigned char*)0x5028
|
||||
#define PI_IDR *(unsigned char*)0x5029
|
||||
#define PI_DDR *(unsigned char*)0x502A
|
||||
#define PI_CR1 *(unsigned char*)0x502B
|
||||
#define PI_CR2 *(unsigned char*)0x502C
|
||||
#endif // STM8S105
|
||||
|
||||
/* GPIO bits */
|
||||
#define GPIO_PIN0 (1 << 0)
|
||||
#define GPIO_PIN1 (1 << 1)
|
||||
#define GPIO_PIN2 (1 << 2)
|
||||
#define GPIO_PIN3 (1 << 3)
|
||||
#define GPIO_PIN4 (1 << 4)
|
||||
#define GPIO_PIN5 (1 << 5)
|
||||
#define GPIO_PIN6 (1 << 6)
|
||||
#define GPIO_PIN7 (1 << 7)
|
||||
|
||||
/* -------------------- FLASH/EEPROM -------------------- */
|
||||
#define FLASH_CR1 *(unsigned char*)0x505A
|
||||
#define FLASH_CR2 *(unsigned char*)0x505B
|
||||
#define FLASH_NCR2 *(unsigned char*)0x505C
|
||||
#define FLASH_FPR *(unsigned char*)0x505D
|
||||
#define FLASH_NFPR *(unsigned char*)0x505E
|
||||
#define FLASH_IAPSR *(unsigned char*)0x505F
|
||||
#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection
|
||||
#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection
|
||||
|
||||
#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access
|
||||
#define EEPROM_KEY2 0x56
|
||||
#define EEPROM_START_ADDR (unsigned char*)0x4000
|
||||
|
||||
/* ------------------- interrupts ------------------- */
|
||||
#define EXTI_CR1 *(unsigned char*)0x50A0
|
||||
#define EXTI_CR2 *(unsigned char*)0x50A1
|
||||
#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num)
|
||||
#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num)
|
||||
|
||||
// Reset status register
|
||||
#define RST_SR *(unsigned char*)0x50B3
|
||||
|
||||
/* ------------------- CLOCK ------------------- */
|
||||
#define CLK_ICKR *(unsigned char*)0x50C0
|
||||
#define CLK_ECKR *(unsigned char*)0x50C1
|
||||
#define CLK_CMSR *(unsigned char*)0x50C3
|
||||
#define CLK_SWR *(unsigned char*)0x50C4
|
||||
#define CLK_SWCR *(unsigned char*)0x50C5
|
||||
#define CLK_CKDIVR *(unsigned char*)0x50C6
|
||||
#define CLK_SPCKENR1 *(unsigned char*)0x50C7
|
||||
#define CLK_CSSR *(unsigned char*)0x50C8
|
||||
#define CLK_CCOR *(unsigned char*)0x50C9
|
||||
#define CLK_PCKENR2 *(unsigned char*)0x50CA
|
||||
#define CLK_HSITRIMR *(unsigned char*)0x50CC
|
||||
#define CLK_SWIMCCR *(unsigned char*)0x50CD
|
||||
|
||||
/* ------------------- Watchdog ------------------ */
|
||||
#define WWDG_CR *(unsigned char*)0x50D1
|
||||
#define WWDG_WR *(unsigned char*)0x50D2
|
||||
#define IWDG_KR *(unsigned char*)0x50E0
|
||||
#define IWDG_PR *(unsigned char*)0x50E1
|
||||
#define IWDG_RLR *(unsigned char*)0x50E2
|
||||
// enable Watchdog
|
||||
#define KEY_ENABLE (0xCC)
|
||||
// refresh Watchdog from IWDG_RLR
|
||||
#define KEY_REFRESH (0xAA)
|
||||
// modify IWDG_PR and IWDG_RLR
|
||||
#define KEY_ACCESS (0x55)
|
||||
|
||||
/* ------------------- AWU, BEEP ------------------- */
|
||||
#define AWU_CSR1 *(unsigned char*)0x50F0
|
||||
#define AWU_APR *(unsigned char*)0x50F1
|
||||
#define AWU_TBR *(unsigned char*)0x50F2
|
||||
#define BEEP_CSR *(unsigned char*)0x50F3
|
||||
|
||||
/* ------------------- SPI ------------------- */
|
||||
#define SPI_CR1 *(unsigned char*)0x5200
|
||||
#define SPI_CR2 *(unsigned char*)0x5201
|
||||
#define SPI_ICR *(unsigned char*)0x5202
|
||||
#define SPI_SR *(unsigned char*)0x5203
|
||||
#define SPI_DR *(unsigned char*)0x5204
|
||||
#define SPI_CRCPR *(unsigned char*)0x5205
|
||||
#define SPI_RXCRCR *(unsigned char*)0x5206
|
||||
#define SPI_TXCRCR *(unsigned char*)0x5207
|
||||
// SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA |
|
||||
#define SPI_CR1_LSBFIRST (1<<7)
|
||||
#define SPI_CR1_SPE (1<<6)
|
||||
#define SPI_CR1_BRMASK (0x38)
|
||||
#define SPI_CR1_MSTR (1<<2)
|
||||
#define SPI_CR1_CPOL (1<<1)
|
||||
#define SPI_CR1_CPHA (1)
|
||||
// SPI_CR2 (page 272): | BDM | BDOE | CRCEN | CRCNEXT | - | RXONLY | SSM | SSI |
|
||||
#define SPI_CR2_BDM (1<<7)
|
||||
#define SPI_CR2_BDOE (1<<6)
|
||||
#define SPI_CR2_CRCEN (1<<5)
|
||||
#define SPI_CR2_CRCNEXT (1<<4)
|
||||
#define SPI_CR2_RXONLY (1<<2)
|
||||
#define SPI_CR2_SSM (1<<1)
|
||||
#define SPI_CR2_SSI (1)
|
||||
// SPI_ICR (page 273): | TXIE | RXIE | ERRIE | WKIE | - | - | - | - |
|
||||
#define SPI_ICR_TXIE (1<<7)
|
||||
#define SPI_ICR_RXIE (1<<6)
|
||||
#define SPI_ICR_ERRIE (1<<5)
|
||||
#define SPI_ICR_WKIE (1<<4)
|
||||
// SPI_SR (page 274): | BSY | OVR | MODF | CRCERR | WKUP | - | TXE | RXNE |
|
||||
#define SPI_SR_BSY (1<<7)
|
||||
#define SPI_SR_OVR (1<<6)
|
||||
#define SPI_SR_MODF (1<<5)
|
||||
#define SPI_SR_CRCERR (1<<4)
|
||||
#define SPI_SR_WKUP (1<<3)
|
||||
#define SPI_SR_TXE (1<<1)
|
||||
#define SPI_SR_RXNE (1)
|
||||
|
||||
/* ------------------- I2C ------------------- */
|
||||
#define I2C_CR1 *(unsigned char*)0x5210
|
||||
#define I2C_CR2 *(unsigned char*)0x5211
|
||||
#define I2C_FREQR *(unsigned char*)0x5212
|
||||
#define I2C_OARL *(unsigned char*)0x5213
|
||||
#define I2C_OARH *(unsigned char*)0x5214
|
||||
#define I2C_DR *(unsigned char*)0x5216
|
||||
#define I2C_SR1 *(unsigned char*)0x5217
|
||||
#define I2C_SR2 *(unsigned char*)0x5218
|
||||
#define I2C_SR3 *(unsigned char*)0x5219
|
||||
#define I2C_ITR *(unsigned char*)0x521A
|
||||
#define I2C_CCRL *(unsigned char*)0x521B
|
||||
#define I2C_CCRH *(unsigned char*)0x521C
|
||||
#define I2C_TRISER *(unsigned char*)0x521D
|
||||
#define I2C_PECR *(unsigned char*)0x521E
|
||||
|
||||
/* ------------------- UART ------------------- */
|
||||
#ifdef STM8S003
|
||||
#define UART1_SR *(unsigned char*)0x5230
|
||||
#define UART1_DR *(unsigned char*)0x5231
|
||||
#define UART1_BRR1 *(unsigned char*)0x5232
|
||||
#define UART1_BRR2 *(unsigned char*)0x5233
|
||||
#define UART1_CR1 *(unsigned char*)0x5234
|
||||
#define UART1_CR2 *(unsigned char*)0x5235
|
||||
#define UART1_CR3 *(unsigned char*)0x5236
|
||||
#define UART1_CR4 *(unsigned char*)0x5237
|
||||
#define UART1_CR5 *(unsigned char*)0x5238
|
||||
#define UART1_GTR *(unsigned char*)0x5239
|
||||
#define UART1_PSCR *(unsigned char*)0x523A
|
||||
#endif // STM8S003
|
||||
#ifdef STM8S105
|
||||
#define UART2_SR *(unsigned char*)0x5240
|
||||
#define UART2_DR *(unsigned char*)0x5241
|
||||
#define UART2_BRR1 *(unsigned char*)0x5242
|
||||
#define UART2_BRR2 *(unsigned char*)0x5243
|
||||
#define UART2_CR1 *(unsigned char*)0x5244
|
||||
#define UART2_CR2 *(unsigned char*)0x5245
|
||||
#define UART2_CR3 *(unsigned char*)0x5246
|
||||
#define UART2_CR4 *(unsigned char*)0x5247
|
||||
#define UART2_CR5 *(unsigned char*)0x5248
|
||||
#define UART2_CR6 *(unsigned char*)0x5249
|
||||
#define UART2_GTR *(unsigned char*)0x524A
|
||||
#define UART2_PSCR *(unsigned char*)0x524B
|
||||
#endif // STM8S105
|
||||
|
||||
/* UART_CR1 bits */
|
||||
#define UART_CR1_R8 (1 << 7)
|
||||
#define UART_CR1_T8 (1 << 6)
|
||||
#define UART_CR1_UARTD (1 << 5)
|
||||
#define UART_CR1_M (1 << 4)
|
||||
#define UART_CR1_WAKE (1 << 3)
|
||||
#define UART_CR1_PCEN (1 << 2)
|
||||
#define UART_CR1_PS (1 << 1)
|
||||
#define UART_CR1_PIEN (1 << 0)
|
||||
|
||||
/* UART_CR2 bits */
|
||||
#define UART_CR2_TIEN (1 << 7)
|
||||
#define UART_CR2_TCIEN (1 << 6)
|
||||
#define UART_CR2_RIEN (1 << 5)
|
||||
#define UART_CR2_ILIEN (1 << 4)
|
||||
#define UART_CR2_TEN (1 << 3)
|
||||
#define UART_CR2_REN (1 << 2)
|
||||
#define UART_CR2_RWU (1 << 1)
|
||||
#define UART_CR2_SBK (1 << 0)
|
||||
|
||||
/* USART_CR3 bits */
|
||||
#define UART_CR3_LINEN (1 << 6)
|
||||
#define UART_CR3_STOP2 (1 << 5)
|
||||
#define UART_CR3_STOP1 (1 << 4)
|
||||
#define UART_CR3_CLKEN (1 << 3)
|
||||
#define UART_CR3_CPOL (1 << 2)
|
||||
#define UART_CR3_CPHA (1 << 1)
|
||||
#define UART_CR3_LBCL (1 << 0)
|
||||
|
||||
/* UART_SR bits */
|
||||
#define UART_SR_TXE (1 << 7)
|
||||
#define UART_SR_TC (1 << 6)
|
||||
#define UART_SR_RXNE (1 << 5)
|
||||
#define UART_SR_IDLE (1 << 4)
|
||||
#define UART_SR_OR (1 << 3)
|
||||
#define UART_SR_NF (1 << 2)
|
||||
#define UART_SR_FE (1 << 1)
|
||||
#define UART_SR_PE (1 << 0)
|
||||
|
||||
|
||||
/* ------------------- TIMERS ------------------- */
|
||||
/* TIM1 */
|
||||
#define TIM1_CR1 *(unsigned char*)0x5250
|
||||
#define TIM1_CR2 *(unsigned char*)0x5251
|
||||
#define TIM1_SMCR *(unsigned char*)0x5252
|
||||
#define TIM1_ETR *(unsigned char*)0x5253
|
||||
#define TIM1_IER *(unsigned char*)0x5254
|
||||
#define TIM1_SR1 *(unsigned char*)0x5255
|
||||
#define TIM1_SR2 *(unsigned char*)0x5256
|
||||
#define TIM1_EGR *(unsigned char*)0x5257
|
||||
#define TIM1_CCMR1 *(unsigned char*)0x5258
|
||||
#define TIM1_CCMR2 *(unsigned char*)0x5259
|
||||
#define TIM1_CCMR3 *(unsigned char*)0x525A
|
||||
#define TIM1_CCMR4 *(unsigned char*)0x525B
|
||||
#define TIM1_CCER1 *(unsigned char*)0x525C
|
||||
#define TIM1_CCER2 *(unsigned char*)0x525D
|
||||
#define TIM1_CNTRH *(unsigned char*)0x525E
|
||||
#define TIM1_CNTRL *(unsigned char*)0x525F
|
||||
#define TIM1_PSCRH *(unsigned char*)0x5260
|
||||
#define TIM1_PSCRL *(unsigned char*)0x5261
|
||||
#define TIM1_ARRH *(unsigned char*)0x5262
|
||||
#define TIM1_ARRL *(unsigned char*)0x5263
|
||||
#define TIM1_RCR *(unsigned char*)0x5264
|
||||
#define TIM1_CCR1H *(unsigned char*)0x5265
|
||||
#define TIM1_CCR1L *(unsigned char*)0x5266
|
||||
#define TIM1_CCR2H *(unsigned char*)0x5267
|
||||
#define TIM1_CCR2L *(unsigned char*)0x5268
|
||||
#define TIM1_CCR3H *(unsigned char*)0x5269
|
||||
#define TIM1_CCR3L *(unsigned char*)0x526A
|
||||
#define TIM1_CCR4H *(unsigned char*)0x526B
|
||||
#define TIM1_CCR4L *(unsigned char*)0x526C
|
||||
#define TIM1_BKR *(unsigned char*)0x526D
|
||||
#define TIM1_DTR *(unsigned char*)0x526E
|
||||
#define TIM1_OISR *(unsigned char*)0x526F
|
||||
|
||||
|
||||
/* TIM_IER bits */
|
||||
#define TIM_IER_BIE (1 << 7)
|
||||
#define TIM_IER_TIE (1 << 6)
|
||||
#define TIM_IER_COMIE (1 << 5)
|
||||
#define TIM_IER_CC4IE (1 << 4)
|
||||
#define TIM_IER_CC3IE (1 << 3)
|
||||
#define TIM_IER_CC2IE (1 << 2)
|
||||
#define TIM_IER_CC1IE (1 << 1)
|
||||
#define TIM_IER_UIE (1 << 0)
|
||||
|
||||
/* TIM_CR1 bits */
|
||||
#define TIM_CR1_APRE (1 << 7)
|
||||
#define TIM_CR1_CMSH (1 << 6)
|
||||
#define TIM_CR1_CMSL (1 << 5)
|
||||
#define TIM_CR1_DIR (1 << 4)
|
||||
#define TIM_CR1_OPM (1 << 3)
|
||||
#define TIM_CR1_URS (1 << 2)
|
||||
#define TIM_CR1_UDIS (1 << 1)
|
||||
#define TIM_CR1_CEN (1 << 0)
|
||||
|
||||
/* TIM_SR1 bits */
|
||||
#define TIM_SR1_BIF (1 << 7)
|
||||
#define TIM_SR1_TIF (1 << 6)
|
||||
#define TIM_SR1_COMIF (1 << 5)
|
||||
#define TIM_SR1_CC4IF (1 << 4)
|
||||
#define TIM_SR1_CC3IF (1 << 3)
|
||||
#define TIM_SR1_CC2IF (1 << 2)
|
||||
#define TIM_SR1_CC1IF (1 << 1)
|
||||
#define TIM_SR1_UIF (1 << 0)
|
||||
|
||||
/* TIM_EGR bits */
|
||||
#define TIM_EGR_BG (1 << 7)
|
||||
#define TIM_EGR_TG (1 << 6)
|
||||
#define TIM_EGR_COMG (1 << 5)
|
||||
#define TIM_EGR_CC4G (1 << 4)
|
||||
#define TIM_EGR_CC3G (1 << 3)
|
||||
#define TIM_EGR_CC2G (1 << 2)
|
||||
#define TIM_EGR_CC1G (1 << 1)
|
||||
#define TIM_EGR_UG (1 << 0)
|
||||
|
||||
|
||||
/* TIM2 */
|
||||
#define TIM2_CR1 *(unsigned char*)0x5300
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM2_IER *(unsigned char*)0x5301
|
||||
#define TIM2_SR1 *(unsigned char*)0x5302
|
||||
#define TIM2_SR2 *(unsigned char*)0x5303
|
||||
#define TIM2_EGR *(unsigned char*)0x5304
|
||||
#define TIM2_CCMR1 *(unsigned char*)0x5305
|
||||
#define TIM2_CCMR2 *(unsigned char*)0x5306
|
||||
#define TIM2_CCMR3 *(unsigned char*)0x5307
|
||||
#define TIM2_CCER1 *(unsigned char*)0x5308
|
||||
#define TIM2_CCER2 *(unsigned char*)0x5309
|
||||
#define TIM2_CNTRH *(unsigned char*)0x530A
|
||||
#define TIM2_CNTRL *(unsigned char*)0x530B
|
||||
#define TIM2_PSCR *(unsigned char*)0x530C
|
||||
#define TIM2_ARRH *(unsigned char*)0x530D
|
||||
#define TIM2_ARRL *(unsigned char*)0x530E
|
||||
#define TIM2_CCR1H *(unsigned char*)0x530F
|
||||
#define TIM2_CCR1L *(unsigned char*)0x5310
|
||||
#define TIM2_CCR2H *(unsigned char*)0x5311
|
||||
#define TIM2_CCR2L *(unsigned char*)0x5312
|
||||
#define TIM2_CCR3H *(unsigned char*)0x5313
|
||||
#define TIM2_CCR3L *(unsigned char*)0x5314
|
||||
#elif defined STM8S003
|
||||
#define TIM2_IER *(unsigned char*)0x5303
|
||||
#define TIM2_SR1 *(unsigned char*)0x5304
|
||||
#define TIM2_SR2 *(unsigned char*)0x5305
|
||||
#define TIM2_EGR *(unsigned char*)0x5306
|
||||
#define TIM2_CCMR1 *(unsigned char*)0x5307
|
||||
#define TIM2_CCMR2 *(unsigned char*)0x5308
|
||||
#define TIM2_CCMR3 *(unsigned char*)0x5309
|
||||
#define TIM2_CCER1 *(unsigned char*)0x530A
|
||||
#define TIM2_CCER2 *(unsigned char*)0x530B
|
||||
#define TIM2_CNTRH *(unsigned char*)0x530C
|
||||
#define TIM2_CNTRL *(unsigned char*)0x530D
|
||||
#define TIM2_PSCR *(unsigned char*)0x530E
|
||||
#define TIM2_ARRH *(unsigned char*)0x530F
|
||||
#define TIM2_ARRL *(unsigned char*)0x5310
|
||||
#define TIM2_CCR1H *(unsigned char*)0x5311
|
||||
#define TIM2_CCR1L *(unsigned char*)0x5312
|
||||
#define TIM2_CCR2H *(unsigned char*)0x5313
|
||||
#define TIM2_CCR2L *(unsigned char*)0x5314
|
||||
#define TIM2_CCR3H *(unsigned char*)0x5315
|
||||
#define TIM2_CCR3L *(unsigned char*)0x5316
|
||||
#endif
|
||||
|
||||
|
||||
/* TIM3 */
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM3_CR1 *(unsigned char*)0x5320
|
||||
#define TIM3_IER *(unsigned char*)0x5321
|
||||
#define TIM3_SR1 *(unsigned char*)0x5322
|
||||
#define TIM3_SR2 *(unsigned char*)0x5323
|
||||
#define TIM3_EGR *(unsigned char*)0x5324
|
||||
#define TIM3_CCMR1 *(unsigned char*)0x5325
|
||||
#define TIM3_CCMR2 *(unsigned char*)0x5326
|
||||
#define TIM3_CCER1 *(unsigned char*)0x5327
|
||||
#define TIM3_CNTRH *(unsigned char*)0x5328
|
||||
#define TIM3_CNTRL *(unsigned char*)0x5329
|
||||
#define TIM3_PSCR *(unsigned char*)0x532A
|
||||
#define TIM3_ARRH *(unsigned char*)0x532B
|
||||
#define TIM3_ARRL *(unsigned char*)0x532C
|
||||
#define TIM3_CCR1H *(unsigned char*)0x532D
|
||||
#define TIM3_CCR1L *(unsigned char*)0x532E
|
||||
#define TIM3_CCR2H *(unsigned char*)0x532F
|
||||
#define TIM3_CCR2L *(unsigned char*)0x5330
|
||||
#endif
|
||||
|
||||
/* TIM4 */
|
||||
#define TIM4_CR1 *(unsigned char*)0x5340
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM4_IER *(unsigned char*)0x5341
|
||||
#define TIM4_SR *(unsigned char*)0x5342
|
||||
#define TIM4_EGR *(unsigned char*)0x5343
|
||||
#define TIM4_CNTR *(unsigned char*)0x5344
|
||||
#define TIM4_PSCR *(unsigned char*)0x5345
|
||||
#define TIM4_ARR *(unsigned char*)0x5346
|
||||
#elif defined STM8S003
|
||||
#define TIM4_IER *(unsigned char*)0x5343
|
||||
#define TIM4_SR *(unsigned char*)0x5344
|
||||
#define TIM4_EGR *(unsigned char*)0x5345
|
||||
#define TIM4_CNTR *(unsigned char*)0x5346
|
||||
#define TIM4_PSCR *(unsigned char*)0x5347
|
||||
#define TIM4_ARR *(unsigned char*)0x5348
|
||||
#endif
|
||||
|
||||
/* ------------------- ADC ------------------- */
|
||||
#define ADC_DB0RH *(unsigned char*)0x53E0
|
||||
#define ADC_DB0RL *(unsigned char*)0x53E1
|
||||
#define ADC_DB1RH *(unsigned char*)0x53E2
|
||||
#define ADC_DB1RL *(unsigned char*)0x53E3
|
||||
#define ADC_DB2RH *(unsigned char*)0x53E4
|
||||
#define ADC_DB2RL *(unsigned char*)0x53E5
|
||||
#define ADC_DB3RH *(unsigned char*)0x53E6
|
||||
#define ADC_DB3RL *(unsigned char*)0x53E7
|
||||
#define ADC_DB4RH *(unsigned char*)0x53E8
|
||||
#define ADC_DB4RL *(unsigned char*)0x53E9
|
||||
#define ADC_DB5RH *(unsigned char*)0x53EA
|
||||
#define ADC_DB5RL *(unsigned char*)0x53EB
|
||||
#define ADC_DB6RH *(unsigned char*)0x53EC
|
||||
#define ADC_DB6RL *(unsigned char*)0x53ED
|
||||
#define ADC_DB7RH *(unsigned char*)0x53EE
|
||||
#define ADC_DB7RL *(unsigned char*)0x53EF
|
||||
#define ADC_DB8RH *(unsigned char*)0x53F0
|
||||
#define ADC_DB8RL *(unsigned char*)0x53F1
|
||||
#define ADC_DB9RH *(unsigned char*)0x53F2
|
||||
#define ADC_DB9RL *(unsigned char*)0x53F3
|
||||
#define ADC_CSR *(unsigned char*)0x5400
|
||||
#define ADC_CR1 *(unsigned char*)0x5401
|
||||
#define ADC_CR2 *(unsigned char*)0x5402
|
||||
#define ADC_CR3 *(unsigned char*)0x5403
|
||||
#define ADC_DRH *(unsigned char*)0x5404
|
||||
#define ADC_DRL *(unsigned char*)0x5405
|
||||
#define ADC_TDRH *(unsigned char*)0x5406
|
||||
#define ADC_TDRL *(unsigned char*)0x5407
|
||||
#define ADC_HTRH *(unsigned char*)0x5408
|
||||
#define ADC_HTRL *(unsigned char*)0x5409
|
||||
#define ADC_LTRH *(unsigned char*)0x540A
|
||||
#define ADC_LTRL *(unsigned char*)0x540B
|
||||
#define ADC_AWSRH *(unsigned char*)0x540C
|
||||
#define ADC_AWSRL *(unsigned char*)0x540D
|
||||
#define ADC_AWCRH *(unsigned char*)0x540E
|
||||
#define ADC_AWCRL *(unsigned char*)0x540F
|
||||
|
||||
/* ------------------- swim control ------------------- */
|
||||
#define CFG_GCR *(unsigned char*)0x7F60
|
||||
#define SWIM_CSR *(unsigned char*)0x7F80
|
||||
|
||||
/* ------------------- ITC ------------------- */
|
||||
#define ITC_SPR1 *(unsigned char*)0x7F70
|
||||
#define ITC_SPR2 *(unsigned char*)0x7F71
|
||||
#define ITC_SPR3 *(unsigned char*)0x7F72
|
||||
#define ITC_SPR4 *(unsigned char*)0x7F73
|
||||
#define ITC_SPR5 *(unsigned char*)0x7F74
|
||||
#define ITC_SPR6 *(unsigned char*)0x7F75
|
||||
#define ITC_SPR7 *(unsigned char*)0x7F76
|
||||
#define ITC_SPR8 *(unsigned char*)0x7F77
|
||||
|
||||
|
||||
/* -------------------- UNIQUE ID -------------------- */
|
||||
#if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too???
|
||||
#define U_ID00 (unsigned char*)0x48CD
|
||||
#define U_ID01 (unsigned char*)0x48CE
|
||||
#define U_ID02 (unsigned char*)0x48CF
|
||||
#define U_ID03 (unsigned char*)0x48D0
|
||||
#define U_ID04 (unsigned char*)0x48D1
|
||||
#define U_ID05 (unsigned char*)0x48D2
|
||||
#define U_ID06 (unsigned char*)0x48D3
|
||||
#define U_ID07 (unsigned char*)0x48D4
|
||||
#define U_ID08 (unsigned char*)0x48D5
|
||||
#define U_ID09 (unsigned char*)0x48D6
|
||||
#define U_ID10 (unsigned char*)0x48D7
|
||||
#define U_ID11 (unsigned char*)0x48D8
|
||||
#endif // defined STM8S105 || defined STM8S103
|
||||
|
||||
// CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx
|
||||
#define CCR *(unsigned char*)0x7F0A
|
||||
|
||||
/* -------------------- OPTION BYTES -------------------- */
|
||||
#if defined STM8S105
|
||||
// readout protection
|
||||
#define OPT0 *(unsigned char*)0x4800
|
||||
// user boot code
|
||||
#define OPT1 *(unsigned char*)0x4801
|
||||
#define NOPT1 *(unsigned char*)0x4802
|
||||
// alternate functions remapping
|
||||
// | AFR7 | ... | AFR0 |
|
||||
// AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1
|
||||
// AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN
|
||||
// AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3
|
||||
// AFR0 - PD3 = ADC_ETR
|
||||
#define OPT2 *(unsigned char*)0x4803
|
||||
#define NOPT2 *(unsigned char*)0x4804
|
||||
// trim, watchdog
|
||||
#define OPT3 *(unsigned char*)0x4805
|
||||
#define NOPT3 *(unsigned char*)0x4806
|
||||
// extclc, awu
|
||||
#define OPT4 *(unsigned char*)0x4807
|
||||
#define NOPT4 *(unsigned char*)0x4808
|
||||
// HSE stab time
|
||||
#define OPT5 *(unsigned char*)0x4809
|
||||
#define NOPT5 *(unsigned char*)0x480a
|
||||
// none
|
||||
#define OPT6 *(unsigned char*)0x480b
|
||||
#define NOPT6 *(unsigned char*)0x480c
|
||||
// none
|
||||
#define OPT7 *(unsigned char*)0x480d
|
||||
#define NOPT7 *(unsigned char*)0x480e
|
||||
// bootloader opt byte
|
||||
#define OPTBL *(unsigned char*)0x487e
|
||||
#define NOPTBL *(unsigned char*)0x487f
|
||||
|
||||
#endif
|
||||
|
||||
#endif // __STM8L_H__
|
||||
|
||||
// #define *(unsigned char*)0x
|
||||
137
STM8/platform/uart.c
Normal file
137
STM8/platform/uart.c
Normal file
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* geany_encoding=koi8-r
|
||||
* uart.c
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "uart.h"
|
||||
#include "ports_definition.h"
|
||||
|
||||
U8 uart_rdy = 0;
|
||||
U8 rx_idx = 0, tx_idx = 0, tx_len = 0;
|
||||
|
||||
U8 UART_rx[UART_BUF_LEN+1]; // cycle buffer for received data
|
||||
U8 UART_tx[UART_BUF_LEN+1];
|
||||
|
||||
/**
|
||||
* Send one byte through UART
|
||||
* @param byte - data to send
|
||||
*
|
||||
void UART_send_byte(U8 byte){
|
||||
while(!(UART2_SR & UART_SR_TXE)); // wait until previous byte transmitted
|
||||
UART2_DR = byte;
|
||||
}*/
|
||||
|
||||
void uart_write(char *str){
|
||||
while(tx_len) {IWDG_KR = KEY_REFRESH;}
|
||||
UART2_CR2 &= ~UART_CR2_TIEN;
|
||||
tx_idx = 0;
|
||||
do{
|
||||
UART_tx[tx_len++] = *str++;
|
||||
}while(*str && tx_len < UART_BUF_LEN);
|
||||
UART2_CR2 |= UART_CR2_TIEN; // enable TXE interrupt
|
||||
}
|
||||
|
||||
void printUint(U8 *val, U8 len){
|
||||
unsigned long Number = 0;
|
||||
U8 i = len;
|
||||
char ch;
|
||||
U8 decimal_buff[12]; // max len of U32 == 10 + \n + \0
|
||||
if(len > 4 || len == 3 || len == 0) return;
|
||||
for(i = 0; i < 12; i++)
|
||||
decimal_buff[i] = 0;
|
||||
decimal_buff[10] = '\n';
|
||||
ch = 9;
|
||||
switch(len){
|
||||
case 1:
|
||||
Number = *((U8*)val);
|
||||
break;
|
||||
case 2:
|
||||
Number = *((U16*)val);
|
||||
break;
|
||||
case 4:
|
||||
Number = *((unsigned long*)val);
|
||||
break;
|
||||
}
|
||||
do{
|
||||
i = Number % 10L;
|
||||
decimal_buff[ch--] = i + '0';
|
||||
Number /= 10L;
|
||||
}while(Number && ch > -1);
|
||||
uart_write((char*)&decimal_buff[ch+1]);
|
||||
}
|
||||
|
||||
/**
|
||||
* print signed long onto terminal
|
||||
* max len = 10 symbols + 1 for "-" + 1 for '\n' + 1 for 0 = 13
|
||||
*/
|
||||
void print_long(long Number){
|
||||
U8 i, L = 0;
|
||||
U8 ch;
|
||||
char decimal_buff[12];
|
||||
decimal_buff[11] = 0;
|
||||
ch = 11;
|
||||
if(Number < 0){
|
||||
Number = -Number;
|
||||
L = 1;
|
||||
}
|
||||
do{
|
||||
i = Number % 10L;
|
||||
decimal_buff[--ch] = i + '0';
|
||||
Number /= 10L;
|
||||
}while(Number && ch > 0);
|
||||
if(ch > 0 && L) decimal_buff[--ch] = '-';
|
||||
uart_write(&decimal_buff[ch]);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* read 16 bit integer value from buffer until first non-number
|
||||
* @param buff (i) - input buffer
|
||||
* @param (o) - output value
|
||||
* @return 1 if all OK or 0 if there's none numbers in buffer
|
||||
*/
|
||||
U8 readInt(char *buff, int *val){
|
||||
U8 sign = 0, rb, bad = 1;
|
||||
long R = 0;
|
||||
IWDG_KR = KEY_REFRESH; // refresh watchdog
|
||||
//usart_send("readInt, buff=");
|
||||
//usart_send(buff);
|
||||
if(*buff == '-'){
|
||||
sign = 1;
|
||||
++buff;
|
||||
}
|
||||
do{
|
||||
rb = *buff++;
|
||||
if(rb == '+') continue;
|
||||
if(rb < '0' || rb > '9') break;
|
||||
bad = 0;
|
||||
R = R * 10L + rb - '0';
|
||||
if(R > 0x7ffe){ // bad value
|
||||
bad = 1;
|
||||
break;
|
||||
}
|
||||
}while(1);
|
||||
//print_long(R);
|
||||
if(bad) return 0;
|
||||
if(sign) R = -R;
|
||||
*val = (int)R;
|
||||
return 1;
|
||||
}
|
||||
47
STM8/platform/uart.h
Normal file
47
STM8/platform/uart.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/*
|
||||
* geany_encoding=koi8-r
|
||||
* uart.h
|
||||
*
|
||||
* Copyright 2017 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*
|
||||
*/
|
||||
#pragma once
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include "ports_definition.h"
|
||||
|
||||
#define UART_BUF_LEN 32
|
||||
|
||||
extern U8 UART_rx[];
|
||||
extern U8 UART_tx[];
|
||||
extern U8 uart_rdy, rx_idx, tx_idx, tx_len;
|
||||
|
||||
//extern U32 Global_time; // global time in ms
|
||||
|
||||
void uart_write(char *str);
|
||||
|
||||
char *omit_whitespace(char *str);
|
||||
|
||||
void print_long(long Number);
|
||||
void printUint(U8 *val, U8 len);
|
||||
U8 readInt(char *buff, int *val);
|
||||
|
||||
#endif // __UART_H__
|
||||
|
||||
|
||||
Reference in New Issue
Block a user