diff --git a/LEDS_BT/main.c b/LEDS_BT/main.c
index 3dd7491..c1a596f 100644
--- a/LEDS_BT/main.c
+++ b/LEDS_BT/main.c
@@ -55,13 +55,12 @@ int main() {
 	TIM1_IER = TIM_IER_UIE;
 	// auto-reload + interrupt on overflow + enable
 	TIM1_CR1 = TIM_CR1_APRE | TIM_CR1_URS | TIM_CR1_CEN;
-    // leds - opendrain
+    // leds - pushpull
     PD_DDR = 0x0e;
     PC_DDR = 0xf8;
-/*
     PD_CR1 = 0x0e;
     PC_CR1 = 0xf8;
-*/
+
 	PORT(LED_PORT, DDR)  |= LED_PIN;
 	PORT(LED_PORT, CR1)  |= LED_PIN;
 
@@ -103,28 +102,28 @@ int main() {
                     PC_ODR |= (1<<3);
                 break;
                 case 'A':
-                    PD_ODR &= (1<<3);
+                    PD_ODR &= ~(1<<3);
                 break;
                 case 'B':
-                    PD_ODR &= (1<<2);
+                    PD_ODR &= ~(1<<2);
                 break;
                 case 'C':
-                    PD_ODR &= (1<<1);
+                    PD_ODR &= ~(1<<1);
                 break;
                 case 'D':
-                    PC_ODR &= (1<<7);
+                    PC_ODR &= ~(1<<7);
                 break;
                 case 'E':
-                    PC_ODR &= (1<<6);
+                    PC_ODR &= ~(1<<6);
                 break;
                 case 'F':
-                    PC_ODR &= (1<<5);
+                    PC_ODR &= ~(1<<5);
                 break;
                 case 'G':
-                    PC_ODR &= (1<<4);
+                    PC_ODR &= ~(1<<4);
                 break;
                 case 'H':
-                    PC_ODR &= (1<<3);
+                    PC_ODR &= ~(1<<3);
                 break;
                 case '9':
                     PD_ODR |= 0x0e;
diff --git a/LEDS_BT/pseudostars_7groups/LEDs.config b/LEDS_BT/pseudostars_7groups/LEDs.config
new file mode 100644
index 0000000..3e6d801
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/LEDs.config
@@ -0,0 +1,3 @@
+// Add predefined macros for your project here. For example:
+// #define THE_ANSWER 42
+#define STM8S103
diff --git a/LEDS_BT/pseudostars_7groups/LEDs.creator b/LEDS_BT/pseudostars_7groups/LEDs.creator
new file mode 100644
index 0000000..e94cbbd
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/LEDs.creator
@@ -0,0 +1 @@
+[General]
diff --git a/LEDS_BT/pseudostars_7groups/LEDs.files b/LEDS_BT/pseudostars_7groups/LEDs.files
new file mode 100644
index 0000000..0732498
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/LEDs.files
@@ -0,0 +1,6 @@
+interrupts.c
+interrupts.h
+main.c
+ports_definition.h
+uart.c
+uart.h
diff --git a/LEDS_BT/pseudostars_7groups/LEDs.includes b/LEDS_BT/pseudostars_7groups/LEDs.includes
new file mode 100644
index 0000000..eb4d905
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/LEDs.includes
@@ -0,0 +1 @@
+../
diff --git a/LEDS_BT/pseudostars_7groups/Makefile b/LEDS_BT/pseudostars_7groups/Makefile
new file mode 100644
index 0000000..e845e46
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/Makefile
@@ -0,0 +1,34 @@
+NAME=uart
+SDCC=sdcc
+
+CCFLAGS=-DSTM8S103 -I../ -I/usr/share/sdcc/include -mstm8 --out-fmt-ihx
+LDFLAGS= -mstm8 --out-fmt-ihx -lstm8
+FLASHFLAGS=-cstlinkv2 -pstm8s103f2
+
+SRC=$(wildcard *.c)
+
+OBJ=$(SRC:%.c=%.rel)
+TRASH=$(OBJ) $(SRC:%.c=%.rst) $(SRC:%.c=%.asm) $(SRC:%.c=%.lst) $(SRC:%.c=%.cdb)
+TRASH+=$(SRC:%.c=%.sym) $(NAME).lk $(NAME).map
+INDEPENDENT_HEADERS=../stm8s.h ports_definition.h Makefile
+
+all: $(NAME).ihx
+
+#$(SRC) : %.c : %.h $(INDEPENDENT_HEADERS)
+#	@touch $@
+#
+#%.h: ;
+
+clean:
+	rm -f $(TRASH)
+
+load: $(NAME).ihx
+	stm8flash $(FLASHFLAGS) -w $(NAME).ihx
+
+%.rel: %.c
+	$(SDCC) $(CCFLAGS) -c $<
+
+$(NAME).ihx: $(OBJ)
+	$(SDCC) $(LDFLAGS) $(OBJ) -o $(NAME).ihx
+
+.PHONY: all
diff --git a/LEDS_BT/pseudostars_7groups/Readme b/LEDS_BT/pseudostars_7groups/Readme
new file mode 100644
index 0000000..4aacabc
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/Readme
@@ -0,0 +1,2 @@
+Setup "bluetooth control 8-lamp", connect STM8S103F2 to bluetooth HC-06.
+Manage up to 8 LEDs controlled by bluetooth module HC-06
diff --git a/LEDS_BT/pseudostars_7groups/interrupts.c b/LEDS_BT/pseudostars_7groups/interrupts.c
new file mode 100644
index 0000000..cd357e3
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/interrupts.c
@@ -0,0 +1,167 @@
+/*
+ * interrupts.c
+ *
+ * Copyright 2018 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include "ports_definition.h"
+#include "uart.h"
+
+// Top Level Interrupt
+INTERRUPT_HANDLER(TLI_IRQHandler, 0){}
+
+// Auto Wake Up Interrupt
+INTERRUPT_HANDLER(AWU_IRQHandler, 1){}
+
+// Clock Controller Interrupt
+INTERRUPT_HANDLER(CLK_IRQHandler, 2){}
+
+// External Interrupt PORTA
+INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3){}
+
+// External Interrupt PORTB
+INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4){}
+
+// External Interrupt PORTC
+INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5){
+}
+
+// External Interrupt PORTD
+INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6){
+}
+
+// External Interrupt PORTE
+INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7){}
+
+#ifdef STM8S903
+// External Interrupt PORTF
+INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8){}
+#endif // STM8S903
+
+#if defined (STM8S208) || defined (STM8AF52Ax)
+// CAN RX Interrupt routine.
+INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8){}
+
+// CAN TX Interrupt routine.
+INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9){}
+#endif // STM8S208 || STM8AF52Ax
+
+// SPI Interrupt routine.
+INTERRUPT_HANDLER(SPI_IRQHandler, 10){}
+
+// Timer1 Update/Overflow/Trigger/Break Interrupt
+INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11){
+    if(TIM1_SR1 & TIM_SR1_UIF){ // update interrupt
+        Global_time++; // increase timer
+    }
+    TIM1_SR1 = 0; // clear all interrupt flag
+}
+
+// Timer1 Capture/Compare Interrupt routine.
+INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12){}
+
+#ifdef STM8S903
+// Timer5 Update/Overflow/Break/Trigger Interrupt
+INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13){}
+
+// Timer5 Capture/Compare Interrupt
+INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14){}
+
+#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
+
+// Timer2 Update/Overflow/Break Interrupt
+INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){
+}
+
+// Timer2 Capture/Compare Interrupt
+INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){
+}
+#endif // STM8S903
+
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
+    defined(STM8S005) ||  defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
+// Timer3 Update/Overflow/Break Interrupt
+INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15){}
+
+// Timer3 Capture/Compare Interrupt
+INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16){}
+#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
+
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
+    defined(STM8S003) ||  defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
+// UART1 TX Interrupt
+INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){}
+
+// UART1 RX Interrupt
+INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){
+    U8 rb;
+    unsigned long Tlast = 0;
+    if(UART1_SR & UART_SR_RXNE){ // data received
+        rb = UART1_DR; // read received byte & clear RXNE flag
+        if(uart_ready) return; // omit everything before command read
+        if(Global_time - Tlast < CMD_PAUSE){ // need a little pause
+            Tlast = Global_time;
+            return;
+        }
+        Tlast = Global_time;
+        //if(rb == '+') return; // answer when disconnected
+        UART_rx_cmd = rb; // put received byte into cycled buffer
+        uart_ready = 1;
+    }
+}
+#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
+
+// I2C Interrupt
+INTERRUPT_HANDLER(I2C_IRQHandler, 19){}
+
+#if defined(STM8S105) || defined(STM8S005) ||  defined (STM8AF626x)
+// UART2 TX interrupt
+INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20){}
+
+// UART2 RX interrupt
+INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21){
+}
+#endif // STM8S105 or STM8AF626x
+
+#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
+// UART3 TX interrupt
+INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20){}
+
+// UART3 RX interrupt
+INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21){}
+#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
+
+#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
+// ADC2 interrupt
+INTERRUPT_HANDLER(ADC2_IRQHandler, 22){}
+#else
+INTERRUPT_HANDLER(ADC1_IRQHandler, 22){ // read ADC value
+}
+#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
+
+#ifdef STM8S903
+// Timer6 Update/Overflow/Trigger Interrupt
+INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23){}
+#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
+// Timer4 Update/Overflow Interrupt
+INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23){
+}
+#endif // STM8S903
+
+// Eeprom EEC Interrupt
+INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24){}
diff --git a/LEDS_BT/pseudostars_7groups/interrupts.h b/LEDS_BT/pseudostars_7groups/interrupts.h
new file mode 100644
index 0000000..9e17f55
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/interrupts.h
@@ -0,0 +1,147 @@
+/*
+ * interrupts.h
+ *
+ * Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#pragma once
+#ifndef __INTERRUPTS_H__
+#define __INTERRUPTS_H__
+
+#include "stm8s.h"
+
+extern volatile U8 ADC_ready; // flag: data ready
+extern volatile int ADC_value; // value of last ADC measurement
+
+// Top Level Interrupt
+INTERRUPT_DEFINITION(TLI_IRQHandler, 0);
+
+// Auto Wake Up Interrupt
+INTERRUPT_DEFINITION(AWU_IRQHandler, 1);
+
+// Clock Controller Interrupt
+INTERRUPT_DEFINITION(CLK_IRQHandler, 2);
+
+// External Interrupt PORTA
+INTERRUPT_DEFINITION(EXTI_PORTA_IRQHandler, 3);
+
+// External Interrupt PORTB
+INTERRUPT_DEFINITION(EXTI_PORTB_IRQHandler, 4);
+
+// External Interrupt PORTC
+INTERRUPT_DEFINITION(EXTI_PORTC_IRQHandler, 5);
+
+// External Interrupt PORTD
+INTERRUPT_DEFINITION(EXTI_PORTD_IRQHandler, 6);
+
+// External Interrupt PORTE
+INTERRUPT_DEFINITION(EXTI_PORTE_IRQHandler, 7);
+
+#ifdef STM8S903
+// External Interrupt PORTF
+INTERRUPT_DEFINITION(EXTI_PORTF_IRQHandler, 8);
+#endif // STM8S903
+
+#if defined (STM8S208) || defined (STM8AF52Ax)
+// CAN RX Interrupt routine.
+INTERRUPT_DEFINITION(CAN_RX_IRQHandler, 8);
+
+// CAN TX Interrupt routine.
+INTERRUPT_DEFINITION(CAN_TX_IRQHandler, 9);
+#endif // STM8S208 || STM8AF52Ax
+
+// SPI Interrupt routine.
+INTERRUPT_DEFINITION(SPI_IRQHandler, 10);
+
+// Timer1 Update/Overflow/Trigger/Break Interrupt
+INTERRUPT_DEFINITION(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11);
+
+// Timer1 Capture/Compare Interrupt routine.
+INTERRUPT_DEFINITION(TIM1_CAP_COM_IRQHandler, 12);
+
+#ifdef STM8S903
+// Timer5 Update/Overflow/Break/Trigger Interrupt
+INTERRUPT_DEFINITION(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13);
+
+// Timer5 Capture/Compare Interrupt
+INTERRUPT_DEFINITION(TIM5_CAP_COM_IRQHandler, 14);
+
+#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
+// Timer2 Update/Overflow/Break Interrupt
+INTERRUPT_DEFINITION(TIM2_UPD_OVF_BRK_IRQHandler, 13);
+
+// Timer2 Capture/Compare Interrupt
+INTERRUPT_DEFINITION(TIM2_CAP_COM_IRQHandler, 14);
+#endif // STM8S903
+
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
+    defined(STM8S005) ||  defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
+// Timer3 Update/Overflow/Break Interrupt
+INTERRUPT_DEFINITION(TIM3_UPD_OVF_BRK_IRQHandler, 15);
+
+// Timer3 Capture/Compare Interrupt
+INTERRUPT_DEFINITION(TIM3_CAP_COM_IRQHandler, 16);
+#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
+
+#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
+    defined(STM8S003) ||  defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
+// UART1 TX Interrupt
+INTERRUPT_DEFINITION(UART1_TX_IRQHandler, 17);
+
+// UART1 RX Interrupt
+INTERRUPT_DEFINITION(UART1_RX_IRQHandler, 18);
+#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
+
+// I2C Interrupt
+INTERRUPT_DEFINITION(I2C_IRQHandler, 19);
+
+#if defined(STM8S105) || defined(STM8S005) ||  defined (STM8AF626x)
+// UART2 TX interrupt
+INTERRUPT_DEFINITION(UART2_TX_IRQHandler, 20);
+
+// UART2 RX interrupt
+INTERRUPT_DEFINITION(UART2_RX_IRQHandler, 21);
+#endif // STM8S105 or STM8AF626x
+
+#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
+// UART3 TX interrupt
+INTERRUPT_DEFINITION(UART3_TX_IRQHandler, 20);
+
+// UART3 RX interrupt
+INTERRUPT_DEFINITION(UART3_RX_IRQHandler, 21);
+#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
+
+#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
+// ADC2 interrupt
+INTERRUPT_DEFINITION(ADC2_IRQHandler, 22);
+#else // STM8S105, STM8S103 or STM8S903 or STM8AF626x
+// ADC1 interrupt
+INTERRUPT_DEFINITION(ADC1_IRQHandler, 22);
+#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
+
+#ifdef STM8S903
+// Timer6 Update/Overflow/Trigger Interrupt
+INTERRUPT_DEFINITION(TIM6_UPD_OVF_TRG_IRQHandler, 23);
+#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
+// Timer4 Update/Overflow Interrupt
+INTERRUPT_DEFINITION(TIM4_UPD_OVF_IRQHandler, 23);
+#endif // STM8S903
+
+// Eeprom EEC Interrupt
+INTERRUPT_DEFINITION(EEPROM_EEC_IRQHandler, 24);
+
+#endif // __INTERRUPTS_H__
diff --git a/LEDS_BT/pseudostars_7groups/main.c b/LEDS_BT/pseudostars_7groups/main.c
new file mode 100644
index 0000000..e9b46fb
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/main.c
@@ -0,0 +1,207 @@
+
+/*
+ * blinky.c
+ *
+ * Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#include "ports_definition.h"
+#include "interrupts.h"
+#include "uart.h"
+
+volatile unsigned long Global_time = 0L; // global time in ms
+#define LEDNMBR		7
+/*
+    LED channels:
+    0 - D3
+    1 - D2
+    2 - D1
+    3 - C7
+    4 - C6
+    5 - C5
+    6 - C4
+    7 channels for LEDs, 8th channel switch effects
+ */
+
+// number of pseudo-random numbers
+#define RANDSIZE 	19
+// number of variants
+#define RANDCNT		4
+
+const U8 rand[RANDCNT][RANDSIZE] = {
+	{12, 12, 3, 16, 8, 20, 4, 3, 15, 1, 15, 4, 6, 15, 19, 9, 10},
+	{12, 12, 3, 16, 8, 50, 4, 3, 15, 100, 15, 4, 6, 15, 19, 9, 10},
+	{23, 22, 2, 11, 13, 28, 25, 1, 29, 16, 9, 7, 17, 16, 13, 21, 18},
+	{30, 8, 31, 5, 24, 23, 33, 24, 18, 35, 30, 23, 29, 1, 22, 24, 25}
+};
+
+int main() {
+	unsigned long T = 0L;
+	U8 ON[7] = {0,0,0,0,0,0,0};
+	unsigned long timers[7] = {0,0,0,0,0,0,0};
+	U8 rb, i, cnt=0, rnmb=0;
+	CFG_GCR |= 1; // disable SWIM
+	// Configure clocking
+	CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
+    // TIM1 - system timer (1ms)
+    TIM1_PSCRH = 0;
+	TIM1_PSCRL = 15; // LSB should be written last as it updates prescaler
+	// auto-reload each 1ms: TIM_ARR = 1000 = 0x03E8
+	TIM1_ARRH = 0x03;
+	TIM1_ARRL = 0xE8;
+	// interrupts: update
+	TIM1_IER = TIM_IER_UIE;
+	// auto-reload + interrupt on overflow + enable
+	TIM1_CR1 = TIM_CR1_APRE | TIM_CR1_URS | TIM_CR1_CEN;
+    // leds - pushpull
+    PD_DDR = 0x0e;
+    PC_DDR = 0xf8;
+    PD_CR1 = 0x0e;
+    PC_CR1 = 0xf8;
+
+	PORT(LED_PORT, DDR)  |= LED_PIN;
+	PORT(LED_PORT, CR1)  |= LED_PIN;
+
+    uart_init();
+
+	// enable all interrupts
+	enableInterrupts();
+
+	// Loop
+	do{
+		if(Global_time - T > 499){
+			T = Global_time;
+			PORT(LED_PORT, ODR) ^= LED_PIN; // blink on-board LED
+		}
+		for(i = 0; i < LEDNMBR-1; ++i){
+			if(ON[i]){
+				if(Global_time > timers[i]){
+					timers[i] = Global_time + rand[rnmb][cnt];
+					if(++cnt > RANDSIZE-1) cnt = 0;
+					switch(i){
+						case 0:
+		                    PD_ODR ^= (1<<3);
+		                break;
+		                case 1:
+		                    PD_ODR ^= (1<<2);
+		                break;
+		                case 2:
+		                    PD_ODR ^= (1<<1);
+		                break;
+		                case 3:
+		                    PC_ODR ^= (1<<7);
+		                break;
+		                case 4:
+		                    PC_ODR ^= (1<<6);
+		                break;
+		                case 5:
+		                    PC_ODR ^= (1<<5);
+		                break;
+		                case 6:
+		                    PC_ODR ^= (1<<4);
+		                break;
+		            }
+				}
+			}
+		}
+		if(uart_read_cmd(&rb)){ // buffer isn't empty
+            switch(rb){
+                case '1':
+                    PD_ODR |= (1<<3);
+                    ON[0] = 1;
+                    timers[0] = Global_time;
+                break;
+                case '2':
+                    PD_ODR |= (1<<2);
+                    ON[1] = 1;
+                    timers[1] = Global_time;
+                break;
+                case '3':
+                    PD_ODR |= (1<<1);
+                    ON[2] = 1;
+                    timers[2] = Global_time;
+                break;
+                case '4':
+                    PC_ODR |= (1<<7);
+                    ON[3] = 1;
+                    timers[3] = Global_time;
+                break;
+                case '5':
+                    PC_ODR |= (1<<6);
+                    ON[4] = 1;
+                    timers[4] = Global_time;
+                break;
+                case '6':
+                    PC_ODR |= (1<<5);
+                    ON[5] = 1;
+                    timers[5] = Global_time;
+                break;
+                case '7':
+                    PC_ODR |= (1<<4);
+                    ON[6] = 1;
+                    timers[6] = Global_time;
+                break;
+                case '8': // increment rnmb
+                    if(++rnmb > RANDCNT-1) rnmb = 0;
+                break;
+                case 'A':
+                    PD_ODR &= ~(1<<3);
+                    ON[0] = 0;
+                break;
+                case 'B':
+                    PD_ODR &= ~(1<<2);
+                    ON[1] = 0;
+                break;
+                case 'C':
+                    PD_ODR &= ~(1<<1);
+                    ON[2] = 0;
+                break;
+                case 'D':
+                    PC_ODR &= ~(1<<7);
+                    ON[3] = 0;
+                break;
+                case 'E':
+                    PC_ODR &= ~(1<<6);
+                    ON[4] = 0;
+                break;
+                case 'F':
+                    PC_ODR &= ~(1<<5);
+                    ON[5] = 0;
+                break;
+                case 'G':
+                    PC_ODR &= ~(1<<4);
+                    ON[6] = 0;
+                break;
+                case 'H':
+                    // increment rnmb
+                	if(++rnmb > RANDCNT-1) rnmb = 0;
+                break;
+                case '9':
+                    PD_ODR |= 0x0e;
+                    PC_ODR |= 0xf8;
+                    for(i = 0; i < LEDNMBR-1; ++i){ ON[i] = 1; timers[i] = Global_time;}
+                break;
+                case 'I':
+                    PD_ODR &= ~0x0e;
+                    PC_ODR &= ~0xf8;
+                    for(i = 0; i < LEDNMBR-1; ++i) ON[i] = 0;
+                break;
+            }
+		}
+	}while(1);
+}
+
diff --git a/LEDS_BT/pseudostars_7groups/ports_definition.h b/LEDS_BT/pseudostars_7groups/ports_definition.h
new file mode 100644
index 0000000..f6287a0
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/ports_definition.h
@@ -0,0 +1,43 @@
+/*
+ * ports_definition.h - definition of ports pins & so on
+ *
+ * Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#pragma once
+#ifndef __PORTS_DEFINITION_H__
+#define __PORTS_DEFINITION_H__
+
+#include "stm8s.h"
+
+// minimal pause between commands (ms)
+#define CMD_PAUSE       100
+
+// macro for using in port constructions like PORT(LED_PORT, ODR) = xx
+#define CONCAT(a, b)	a ## _ ## b
+#define PORT(a, b)		CONCAT(a , b)
+
+// on-board LED - PB5
+#define LED_PORT		PB
+#define LED_PIN			GPIO_PIN5
+
+// UART2_TX
+#define UART_PORT		PD
+#define UART_TX_PIN		GPIO_PIN5
+
+#endif // __PORTS_DEFINITION_H__
diff --git a/LEDS_BT/pseudostars_7groups/stm8s.h b/LEDS_BT/pseudostars_7groups/stm8s.h
new file mode 100644
index 0000000..719d197
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/stm8s.h
@@ -0,0 +1,568 @@
+/*
+ * stm8l.h
+ *
+ * Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+
+#pragma once
+#ifndef __STM8L_H__
+#define __STM8L_H__
+
+typedef unsigned char U8;
+typedef unsigned int U16;
+typedef unsigned long U32;
+#define NULL (void*)0
+
+/* functions */
+#define enableInterrupts()    {__asm__("rim\n");}    // enable interrupts
+#define disableInterrupts()   {__asm__("sim\n");}    // disable interrupts
+#define iret()                {__asm__("iret\n");}   // Interrupt routine return
+#define pop_ccr()             {__asm__("pop cc\n");} // Pop CCR from the stack
+#define push_ccr()            {__asm__("push cc\n");}// Push CCR on the stack
+#define rim()                 {__asm__("rim\n");}    // enable interrupts
+#define sim()                 {__asm__("sim\n");}    // disable interrupts
+#define nop()                 {__asm__("nop\n");}    // No Operation
+#define trap()                {__asm__("trap\n");}   // Trap (soft IT)
+#define wfi()                 {__asm__("wfi\n");}    // Wait For Interrupt
+#define halt()                {__asm__("halt\n");}   // Halt
+
+/*
+ * Registers map is shown in short datasheet, page 26
+ */
+/* GPIO */
+#define PA_ODR *(unsigned char*)0x5000
+#define PA_IDR *(unsigned char*)0x5001
+#define PA_DDR *(unsigned char*)0x5002
+#define PA_CR1 *(unsigned char*)0x5003
+#define PA_CR2 *(unsigned char*)0x5004
+
+#define PB_ODR *(unsigned char*)0x5005
+#define PB_IDR *(unsigned char*)0x5006
+#define PB_DDR *(unsigned char*)0x5007
+#define PB_CR1 *(unsigned char*)0x5008
+#define PB_CR2 *(unsigned char*)0x5009
+
+#define PC_ODR *(unsigned char*)0x500A
+#define PC_IDR *(unsigned char*)0x500B
+#define PC_DDR *(unsigned char*)0x500C
+#define PC_CR1 *(unsigned char*)0x500D
+#define PC_CR2 *(unsigned char*)0x500E
+
+#define PD_ODR *(unsigned char*)0x500F
+#define PD_IDR *(unsigned char*)0x5010
+#define PD_DDR *(unsigned char*)0x5011
+#define PD_CR1 *(unsigned char*)0x5012
+#define PD_CR2 *(unsigned char*)0x5013
+
+#define PE_ODR *(unsigned char*)0x5014
+#define PE_IDR *(unsigned char*)0x5015
+#define PE_DDR *(unsigned char*)0x5016
+#define PE_CR1 *(unsigned char*)0x5017
+#define PE_CR2 *(unsigned char*)0x5018
+
+#define PF_ODR *(unsigned char*)0x5019
+#define PF_IDR *(unsigned char*)0x501A
+#define PF_DDR *(unsigned char*)0x501B
+#define PF_CR1 *(unsigned char*)0x501C
+#define PF_CR2 *(unsigned char*)0x501D
+
+#ifdef STM8S105
+#define PG_ODR *(unsigned char*)0x501E
+#define PG_IDR *(unsigned char*)0x501F
+#define PG_DDR *(unsigned char*)0x5020
+#define PG_CR1 *(unsigned char*)0x5021
+#define PG_CR2 *(unsigned char*)0x5022
+
+#define PH_ODR *(unsigned char*)0x5023
+#define PH_IDR *(unsigned char*)0x5024
+#define PH_DDR *(unsigned char*)0x5025
+#define PH_CR1 *(unsigned char*)0x5026
+#define PH_CR2 *(unsigned char*)0x5027
+
+#define PI_ODR *(unsigned char*)0x5028
+#define PI_IDR *(unsigned char*)0x5029
+#define PI_DDR *(unsigned char*)0x502A
+#define PI_CR1 *(unsigned char*)0x502B
+#define PI_CR2 *(unsigned char*)0x502C
+#endif // STM8S105
+
+/* GPIO bits */
+#define GPIO_PIN0       (1 << 0)
+#define GPIO_PIN1       (1 << 1)
+#define GPIO_PIN2       (1 << 2)
+#define GPIO_PIN3       (1 << 3)
+#define GPIO_PIN4       (1 << 4)
+#define GPIO_PIN5       (1 << 5)
+#define GPIO_PIN6       (1 << 6)
+#define GPIO_PIN7       (1 << 7)
+
+/* -------------------- FLASH/EEPROM -------------------- */
+#define FLASH_CR1   *(unsigned char*)0x505A
+#define FLASH_CR2   *(unsigned char*)0x505B
+#define FLASH_NCR2  *(unsigned char*)0x505C
+#define FLASH_FPR   *(unsigned char*)0x505D
+#define FLASH_NFPR  *(unsigned char*)0x505E
+#define FLASH_IAPSR *(unsigned char*)0x505F
+#define FLASH_PUKR  *(unsigned char*)0x5062 // progmem unprotection
+#define FLASH_DUKR  *(unsigned char*)0x5064 // EEPROM unprotection
+
+#define EEPROM_KEY1     0xAE  // keys to manage EEPROM's write access
+#define EEPROM_KEY2     0x56
+#define EEPROM_START_ADDR  (unsigned char*)0x4000
+
+/* ------------------- interrupts ------------------- */
+#define EXTI_CR1    *(unsigned char*)0x50A0
+#define EXTI_CR2    *(unsigned char*)0x50A1
+#define INTERRUPT_HANDLER(fn, num)      void fn() __interrupt(num)
+#define INTERRUPT_DEFINITION(fn, num)   extern void fn() __interrupt(num)
+
+// Reset status register
+#define RST_SR      *(unsigned char*)0x50B3
+
+/* ------------------- CLOCK ------------------- */
+#define CLK_ICKR        *(unsigned char*)0x50C0
+#define CLK_ECKR        *(unsigned char*)0x50C1
+#define CLK_CMSR        *(unsigned char*)0x50C3
+#define CLK_SWR         *(unsigned char*)0x50C4
+#define CLK_SWCR        *(unsigned char*)0x50C5
+#define CLK_CKDIVR      *(unsigned char*)0x50C6
+#define CLK_SPCKENR1    *(unsigned char*)0x50C7
+#define CLK_CSSR        *(unsigned char*)0x50C8
+#define CLK_CCOR        *(unsigned char*)0x50C9
+#define CLK_PCKENR2     *(unsigned char*)0x50CA
+#define CLK_HSITRIMR    *(unsigned char*)0x50CC
+#define CLK_SWIMCCR     *(unsigned char*)0x50CD
+
+/* ------------------- Watchdog ------------------ */
+#define WWDG_CR         *(unsigned char*)0x50D1
+#define WWDG_WR         *(unsigned char*)0x50D2
+#define IWDG_KR         *(unsigned char*)0x50E0
+#define IWDG_PR         *(unsigned char*)0x50E1
+#define IWDG_RLR        *(unsigned char*)0x50E2
+// enable Watchdog
+#define KEY_ENABLE      (0xCC)
+// refresh Watchdog from IWDG_RLR
+#define KEY_REFRESH     (0xAA)
+// modify IWDG_PR and IWDG_RLR
+#define KEY_ACCESS      (0x55)
+
+
+/* ------------------- AWU, BEEP ------------------- */
+#define AWU_CSR1        *(unsigned char*)0x50F0
+#define AWU_APR         *(unsigned char*)0x50F1
+#define AWU_TBR         *(unsigned char*)0x50F2
+#define BEEP_CSR        *(unsigned char*)0x50F3
+
+/* ------------------- SPI ------------------- */
+#define SPI_CR1         *(unsigned char*)0x5200
+#define SPI_CR2         *(unsigned char*)0x5201
+#define SPI_ICR         *(unsigned char*)0x5202
+#define SPI_SR          *(unsigned char*)0x5203
+#define SPI_DR          *(unsigned char*)0x5204
+#define SPI_CRCPR       *(unsigned char*)0x5205
+#define SPI_RXCRCR      *(unsigned char*)0x5206
+#define SPI_TXCRCR      *(unsigned char*)0x5207
+// SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA |
+#define SPI_CR1_LSBFIRST (1<<7)
+#define SPI_CR1_SPE      (1<<6)
+#define SPI_CR1_BRMASK   (0x38)
+#define SPI_CR1_MSTR     (1<<2)
+#define SPI_CR1_CPOL     (1<<1)
+#define SPI_CR1_CPHA     (1)
+// SPI_CR2 (page 272): | BDM | BDOE | CRCEN | CRCNEXT | - | RXONLY | SSM | SSI |
+#define SPI_CR2_BDM      (1<<7)
+#define SPI_CR2_BDOE     (1<<6)
+#define SPI_CR2_CRCEN    (1<<5)
+#define SPI_CR2_CRCNEXT  (1<<4)
+#define SPI_CR2_RXONLY   (1<<2)
+#define SPI_CR2_SSM      (1<<1)
+#define SPI_CR2_SSI      (1)
+// SPI_ICR (page 273): | TXIE | RXIE | ERRIE | WKIE | - | - | - | - |
+#define SPI_ICR_TXIE     (1<<7)
+#define SPI_ICR_RXIE     (1<<6)
+#define SPI_ICR_ERRIE    (1<<5)
+#define SPI_ICR_WKIE     (1<<4)
+// SPI_SR (page 274):  | BSY | OVR | MODF | CRCERR | WKUP | - | TXE | RXNE |
+#define SPI_SR_BSY       (1<<7)
+#define SPI_SR_OVR       (1<<6)
+#define SPI_SR_MODF      (1<<5)
+#define SPI_SR_CRCERR    (1<<4)
+#define SPI_SR_WKUP      (1<<3)
+#define SPI_SR_TXE       (1<<1)
+#define SPI_SR_RXNE      (1)
+
+/* ------------------- I2C ------------------- */
+#define I2C_CR1         *(unsigned char*)0x5210
+#define I2C_CR2         *(unsigned char*)0x5211
+#define I2C_FREQR       *(unsigned char*)0x5212
+#define I2C_OARL        *(unsigned char*)0x5213
+#define I2C_OARH        *(unsigned char*)0x5214
+#define I2C_DR          *(unsigned char*)0x5216
+#define I2C_SR1         *(unsigned char*)0x5217
+#define I2C_SR2         *(unsigned char*)0x5218
+#define I2C_SR3         *(unsigned char*)0x5219
+#define I2C_ITR         *(unsigned char*)0x521A
+#define I2C_CCRL        *(unsigned char*)0x521B
+#define I2C_CCRH        *(unsigned char*)0x521C
+#define I2C_TRISER      *(unsigned char*)0x521D
+#define I2C_PECR        *(unsigned char*)0x521E
+
+/* ------------------- UART ------------------- */
+#if defined STM8S003 || defined STM8S103
+#define UART1_SR    *(unsigned char*)0x5230
+#define UART1_DR    *(unsigned char*)0x5231
+#define UART1_BRR1  *(unsigned char*)0x5232
+#define UART1_BRR2  *(unsigned char*)0x5233
+#define UART1_CR1   *(unsigned char*)0x5234
+#define UART1_CR2   *(unsigned char*)0x5235
+#define UART1_CR3   *(unsigned char*)0x5236
+#define UART1_CR4   *(unsigned char*)0x5237
+#define UART1_CR5   *(unsigned char*)0x5238
+#define UART1_GTR   *(unsigned char*)0x5239
+#define UART1_PSCR  *(unsigned char*)0x523A
+#endif // STM8S003
+#ifdef STM8S105
+#define UART2_SR    *(unsigned char*)0x5240
+#define UART2_DR    *(unsigned char*)0x5241
+#define UART2_BRR1  *(unsigned char*)0x5242
+#define UART2_BRR2  *(unsigned char*)0x5243
+#define UART2_CR1   *(unsigned char*)0x5244
+#define UART2_CR2   *(unsigned char*)0x5245
+#define UART2_CR3   *(unsigned char*)0x5246
+#define UART2_CR4   *(unsigned char*)0x5247
+#define UART2_CR5   *(unsigned char*)0x5248
+#define UART2_CR6   *(unsigned char*)0x5249
+#define UART2_GTR   *(unsigned char*)0x524A
+#define UART2_PSCR  *(unsigned char*)0x524B
+#endif // STM8S105
+
+/* UART_CR1 bits */
+#define UART_CR1_R8 (1 << 7)
+#define UART_CR1_T8 (1 << 6)
+#define UART_CR1_UARTD (1 << 5)
+#define UART_CR1_M (1 << 4)
+#define UART_CR1_WAKE (1 << 3)
+#define UART_CR1_PCEN (1 << 2)
+#define UART_CR1_PS (1 << 1)
+#define UART_CR1_PIEN (1 << 0)
+
+/* UART_CR2 bits */
+#define UART_CR2_TIEN (1 << 7)
+#define UART_CR2_TCIEN (1 << 6)
+#define UART_CR2_RIEN (1 << 5)
+#define UART_CR2_ILIEN (1 << 4)
+#define UART_CR2_TEN (1 << 3)
+#define UART_CR2_REN (1 << 2)
+#define UART_CR2_RWU (1 << 1)
+#define UART_CR2_SBK (1 << 0)
+
+/* USART_CR3 bits */
+#define UART_CR3_LINEN (1 << 6)
+#define UART_CR3_STOP2 (1 << 5)
+#define UART_CR3_STOP1 (1 << 4)
+#define UART_CR3_CLKEN (1 << 3)
+#define UART_CR3_CPOL (1 << 2)
+#define UART_CR3_CPHA (1 << 1)
+#define UART_CR3_LBCL (1 << 0)
+
+/* UART_SR bits */
+#define UART_SR_TXE (1 << 7)
+#define UART_SR_TC (1 << 6)
+#define UART_SR_RXNE (1 << 5)
+#define UART_SR_IDLE (1 << 4)
+#define UART_SR_OR (1 << 3)
+#define UART_SR_NF (1 << 2)
+#define UART_SR_FE (1 << 1)
+#define UART_SR_PE (1 << 0)
+
+
+/* ------------------- TIMERS ------------------- */
+/* TIM1 */
+#define TIM1_CR1    *(unsigned char*)0x5250
+#define TIM1_CR2    *(unsigned char*)0x5251
+#define TIM1_SMCR   *(unsigned char*)0x5252
+#define TIM1_ETR    *(unsigned char*)0x5253
+#define TIM1_IER    *(unsigned char*)0x5254
+#define TIM1_SR1    *(unsigned char*)0x5255
+#define TIM1_SR2    *(unsigned char*)0x5256
+#define TIM1_EGR    *(unsigned char*)0x5257
+#define TIM1_CCMR1  *(unsigned char*)0x5258
+#define TIM1_CCMR2  *(unsigned char*)0x5259
+#define TIM1_CCMR3  *(unsigned char*)0x525A
+#define TIM1_CCMR4  *(unsigned char*)0x525B
+#define TIM1_CCER1  *(unsigned char*)0x525C
+#define TIM1_CCER2  *(unsigned char*)0x525D
+#define TIM1_CNTRH  *(unsigned char*)0x525E
+#define TIM1_CNTRL  *(unsigned char*)0x525F
+#define TIM1_PSCRH  *(unsigned char*)0x5260
+#define TIM1_PSCRL  *(unsigned char*)0x5261
+#define TIM1_ARRH   *(unsigned char*)0x5262
+#define TIM1_ARRL   *(unsigned char*)0x5263
+#define TIM1_RCR    *(unsigned char*)0x5264
+#define TIM1_CCR1H  *(unsigned char*)0x5265
+#define TIM1_CCR1L  *(unsigned char*)0x5266
+#define TIM1_CCR2H  *(unsigned char*)0x5267
+#define TIM1_CCR2L  *(unsigned char*)0x5268
+#define TIM1_CCR3H  *(unsigned char*)0x5269
+#define TIM1_CCR3L  *(unsigned char*)0x526A
+#define TIM1_CCR4H  *(unsigned char*)0x526B
+#define TIM1_CCR4L  *(unsigned char*)0x526C
+#define TIM1_BKR    *(unsigned char*)0x526D
+#define TIM1_DTR    *(unsigned char*)0x526E
+#define TIM1_OISR   *(unsigned char*)0x526F
+
+
+/* TIM_IER bits */
+#define TIM_IER_BIE (1 << 7)
+#define TIM_IER_TIE (1 << 6)
+#define TIM_IER_COMIE (1 << 5)
+#define TIM_IER_CC4IE (1 << 4)
+#define TIM_IER_CC3IE (1 << 3)
+#define TIM_IER_CC2IE (1 << 2)
+#define TIM_IER_CC1IE (1 << 1)
+#define TIM_IER_UIE (1 << 0)
+
+/* TIM_CR1 bits */
+#define TIM_CR1_APRE (1 << 7)
+#define TIM_CR1_CMSH (1 << 6)
+#define TIM_CR1_CMSL (1 << 5)
+#define TIM_CR1_DIR (1 << 4)
+#define TIM_CR1_OPM (1 << 3)
+#define TIM_CR1_URS (1 << 2)
+#define TIM_CR1_UDIS (1 << 1)
+#define TIM_CR1_CEN (1 << 0)
+
+/* TIM_SR1 bits */
+#define TIM_SR1_BIF (1 << 7)
+#define TIM_SR1_TIF (1 << 6)
+#define TIM_SR1_COMIF (1 << 5)
+#define TIM_SR1_CC4IF (1 << 4)
+#define TIM_SR1_CC3IF (1 << 3)
+#define TIM_SR1_CC2IF (1 << 2)
+#define TIM_SR1_CC1IF (1 << 1)
+#define TIM_SR1_UIF (1 << 0)
+
+/* TIM_EGR bits */
+#define TIM_EGR_BG (1 << 7)
+#define TIM_EGR_TG (1 << 6)
+#define TIM_EGR_COMG (1 << 5)
+#define TIM_EGR_CC4G (1 << 4)
+#define TIM_EGR_CC3G (1 << 3)
+#define TIM_EGR_CC2G (1 << 2)
+#define TIM_EGR_CC1G (1 << 1)
+#define TIM_EGR_UG (1 << 0)
+
+
+/* TIM2 */
+#define TIM2_CR1    *(unsigned char*)0x5300
+#if defined STM8S105 || defined STM8S103
+#define TIM2_IER    *(unsigned char*)0x5301
+#define TIM2_SR1    *(unsigned char*)0x5302
+#define TIM2_SR2    *(unsigned char*)0x5303
+#define TIM2_EGR    *(unsigned char*)0x5304
+#define TIM2_CCMR1  *(unsigned char*)0x5305
+#define TIM2_CCMR2  *(unsigned char*)0x5306
+#define TIM2_CCMR3  *(unsigned char*)0x5307
+#define TIM2_CCER1  *(unsigned char*)0x5308
+#define TIM2_CCER2  *(unsigned char*)0x5309
+#define TIM2_CNTRH  *(unsigned char*)0x530A
+#define TIM2_CNTRL  *(unsigned char*)0x530B
+#define TIM2_PSCR   *(unsigned char*)0x530C
+#define TIM2_ARRH   *(unsigned char*)0x530D
+#define TIM2_ARRL   *(unsigned char*)0x530E
+#define TIM2_CCR1H  *(unsigned char*)0x530F
+#define TIM2_CCR1L  *(unsigned char*)0x5310
+#define TIM2_CCR2H  *(unsigned char*)0x5311
+#define TIM2_CCR2L  *(unsigned char*)0x5312
+#define TIM2_CCR3H  *(unsigned char*)0x5313
+#define TIM2_CCR3L  *(unsigned char*)0x5314
+#elif defined STM8S003
+#define TIM2_IER    *(unsigned char*)0x5303
+#define TIM2_SR1    *(unsigned char*)0x5304
+#define TIM2_SR2    *(unsigned char*)0x5305
+#define TIM2_EGR    *(unsigned char*)0x5306
+#define TIM2_CCMR1  *(unsigned char*)0x5307
+#define TIM2_CCMR2  *(unsigned char*)0x5308
+#define TIM2_CCMR3  *(unsigned char*)0x5309
+#define TIM2_CCER1  *(unsigned char*)0x530A
+#define TIM2_CCER2  *(unsigned char*)0x530B
+#define TIM2_CNTRH  *(unsigned char*)0x530C
+#define TIM2_CNTRL  *(unsigned char*)0x530D
+#define TIM2_PSCR   *(unsigned char*)0x530E
+#define TIM2_ARRH   *(unsigned char*)0x530F
+#define TIM2_ARRL   *(unsigned char*)0x5310
+#define TIM2_CCR1H  *(unsigned char*)0x5311
+#define TIM2_CCR1L  *(unsigned char*)0x5312
+#define TIM2_CCR2H  *(unsigned char*)0x5313
+#define TIM2_CCR2L  *(unsigned char*)0x5314
+#define TIM2_CCR3H  *(unsigned char*)0x5315
+#define TIM2_CCR3L  *(unsigned char*)0x5316
+#endif
+
+
+/* TIM3 */
+#if defined STM8S105 || defined STM8S103
+#define TIM3_CR1    *(unsigned char*)0x5320
+#define TIM3_IER    *(unsigned char*)0x5321
+#define TIM3_SR1    *(unsigned char*)0x5322
+#define TIM3_SR2    *(unsigned char*)0x5323
+#define TIM3_EGR    *(unsigned char*)0x5324
+#define TIM3_CCMR1  *(unsigned char*)0x5325
+#define TIM3_CCMR2  *(unsigned char*)0x5326
+#define TIM3_CCER1  *(unsigned char*)0x5327
+#define TIM3_CNTRH  *(unsigned char*)0x5328
+#define TIM3_CNTRL  *(unsigned char*)0x5329
+#define TIM3_PSCR   *(unsigned char*)0x532A
+#define TIM3_ARRH   *(unsigned char*)0x532B
+#define TIM3_ARRL   *(unsigned char*)0x532C
+#define TIM3_CCR1H  *(unsigned char*)0x532D
+#define TIM3_CCR1L  *(unsigned char*)0x532E
+#define TIM3_CCR2H  *(unsigned char*)0x532F
+#define TIM3_CCR2L  *(unsigned char*)0x5330
+#endif
+
+/* TIM4 */
+#define TIM4_CR1    *(unsigned char*)0x5340
+#if defined STM8S105 || defined STM8S103
+#define TIM4_IER    *(unsigned char*)0x5341
+#define TIM4_SR     *(unsigned char*)0x5342
+#define TIM4_EGR    *(unsigned char*)0x5343
+#define TIM4_CNTR   *(unsigned char*)0x5344
+#define TIM4_PSCR   *(unsigned char*)0x5345
+#define TIM4_ARR    *(unsigned char*)0x5346
+#elif defined STM8S003
+#define TIM4_IER    *(unsigned char*)0x5343
+#define TIM4_SR     *(unsigned char*)0x5344
+#define TIM4_EGR    *(unsigned char*)0x5345
+#define TIM4_CNTR   *(unsigned char*)0x5346
+#define TIM4_PSCR   *(unsigned char*)0x5347
+#define TIM4_ARR    *(unsigned char*)0x5348
+#endif
+
+/* ------------------- ADC ------------------- */
+#define ADC_DB0RH   *(unsigned char*)0x53E0
+#define ADC_DB0RL   *(unsigned char*)0x53E1
+#define ADC_DB1RH   *(unsigned char*)0x53E2
+#define ADC_DB1RL   *(unsigned char*)0x53E3
+#define ADC_DB2RH   *(unsigned char*)0x53E4
+#define ADC_DB2RL   *(unsigned char*)0x53E5
+#define ADC_DB3RH   *(unsigned char*)0x53E6
+#define ADC_DB3RL   *(unsigned char*)0x53E7
+#define ADC_DB4RH   *(unsigned char*)0x53E8
+#define ADC_DB4RL   *(unsigned char*)0x53E9
+#define ADC_DB5RH   *(unsigned char*)0x53EA
+#define ADC_DB5RL   *(unsigned char*)0x53EB
+#define ADC_DB6RH   *(unsigned char*)0x53EC
+#define ADC_DB6RL   *(unsigned char*)0x53ED
+#define ADC_DB7RH   *(unsigned char*)0x53EE
+#define ADC_DB7RL   *(unsigned char*)0x53EF
+#define ADC_DB8RH   *(unsigned char*)0x53F0
+#define ADC_DB8RL   *(unsigned char*)0x53F1
+#define ADC_DB9RH   *(unsigned char*)0x53F2
+#define ADC_DB9RL   *(unsigned char*)0x53F3
+#define ADC_CSR     *(unsigned char*)0x5400
+#define ADC_CR1     *(unsigned char*)0x5401
+#define ADC_CR2     *(unsigned char*)0x5402
+#define ADC_CR3     *(unsigned char*)0x5403
+#define ADC_DRH     *(unsigned char*)0x5404
+#define ADC_DRL     *(unsigned char*)0x5405
+#define ADC_TDRH    *(unsigned char*)0x5406
+#define ADC_TDRL    *(unsigned char*)0x5407
+#define ADC_HTRH    *(unsigned char*)0x5408
+#define ADC_HTRL    *(unsigned char*)0x5409
+#define ADC_LTRH    *(unsigned char*)0x540A
+#define ADC_LTRL    *(unsigned char*)0x540B
+#define ADC_AWSRH   *(unsigned char*)0x540C
+#define ADC_AWSRL   *(unsigned char*)0x540D
+#define ADC_AWCRH   *(unsigned char*)0x540E
+#define ADC_AWCRL   *(unsigned char*)0x540F
+
+/* ------------------- swim control ------------------- */
+#define CFG_GCR         *(unsigned char*)0x7F60
+#define SWIM_CSR        *(unsigned char*)0x7F80
+
+/* ------------------- ITC ------------------- */
+#define ITC_SPR1        *(unsigned char*)0x7F70
+#define ITC_SPR2        *(unsigned char*)0x7F71
+#define ITC_SPR3        *(unsigned char*)0x7F72
+#define ITC_SPR4        *(unsigned char*)0x7F73
+#define ITC_SPR5        *(unsigned char*)0x7F74
+#define ITC_SPR6        *(unsigned char*)0x7F75
+#define ITC_SPR7        *(unsigned char*)0x7F76
+#define ITC_SPR8        *(unsigned char*)0x7F77
+
+
+/* -------------------- UNIQUE ID -------------------- */
+#if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too???
+#define U_ID00      (unsigned char*)0x48CD
+#define U_ID01      (unsigned char*)0x48CE
+#define U_ID02      (unsigned char*)0x48CF
+#define U_ID03      (unsigned char*)0x48D0
+#define U_ID04      (unsigned char*)0x48D1
+#define U_ID05      (unsigned char*)0x48D2
+#define U_ID06      (unsigned char*)0x48D3
+#define U_ID07      (unsigned char*)0x48D4
+#define U_ID08      (unsigned char*)0x48D5
+#define U_ID09      (unsigned char*)0x48D6
+#define U_ID10      (unsigned char*)0x48D7
+#define U_ID11      (unsigned char*)0x48D8
+#endif // defined STM8S105 || defined STM8S103
+
+// CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx
+#define CCR         *(unsigned char*)0x7F0A
+
+/* -------------------- OPTION BYTES -------------------- */
+#if defined STM8S105
+// readout protection
+#define OPT0        *(unsigned char*)0x4800
+// user boot code
+#define OPT1        *(unsigned char*)0x4801
+#define NOPT1       *(unsigned char*)0x4802
+// alternate functions remapping
+// | AFR7 | ... | AFR0 |
+// AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1
+// AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN
+// AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3
+// AFR0 - PD3 = ADC_ETR
+#define OPT2        *(unsigned char*)0x4803
+#define NOPT2       *(unsigned char*)0x4804
+// trim, watchdog
+#define OPT3        *(unsigned char*)0x4805
+#define NOPT3       *(unsigned char*)0x4806
+// extclc, awu
+#define OPT4        *(unsigned char*)0x4807
+#define NOPT4       *(unsigned char*)0x4808
+// HSE stab time
+#define OPT5        *(unsigned char*)0x4809
+#define NOPT5       *(unsigned char*)0x480a
+// none
+#define OPT6        *(unsigned char*)0x480b
+#define NOPT6       *(unsigned char*)0x480c
+// none
+#define OPT7        *(unsigned char*)0x480d
+#define NOPT7       *(unsigned char*)0x480e
+// bootloader opt byte
+#define OPTBL       *(unsigned char*)0x487e
+#define NOPTBL      *(unsigned char*)0x487f
+
+#endif
+
+#endif // __STM8L_H__
+
+// #define      *(unsigned char*)0x
diff --git a/LEDS_BT/pseudostars_7groups/uart.c b/LEDS_BT/pseudostars_7groups/uart.c
new file mode 100644
index 0000000..665711e
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/uart.c
@@ -0,0 +1,67 @@
+/*
+ * blinky.c
+ *
+ * Copyright 2018 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#include "ports_definition.h"
+#include "uart.h"
+#include "interrupts.h"
+
+U8 UART_rx_cmd; // command received
+volatile U8 uart_ready = 0;// command ready flag
+
+/**
+ * Send one byte through UART
+ * @param byte - data to send
+ */
+void uart_send_byte(U8 byte){
+    while(!(UART1_SR & UART_SR_TXE)); // wait until previous byte transmitted
+    UART1_DR = byte;
+}
+
+void uart_write(char *str){
+    while(*str){
+        while(!(UART1_SR & UART_SR_TXE));
+        UART1_CR2 |= UART_CR2_TEN;
+        UART1_DR = *str++;
+    }
+}
+
+/**
+ * Read one byte from Rx buffer
+ * @param byte - where to store data read
+ * @return 1 in case of non-empty buffer
+ */
+U8 uart_read_cmd(U8 *byte){
+    if(!uart_ready) // buffer is empty
+        return 0;
+    *byte = UART_rx_cmd;
+    uart_ready = 0;
+    return 1;
+}
+
+void uart_init(){
+    // PD5 - UART1_TX
+    PORT(UART_PORT, DDR) |= UART_TX_PIN;
+    PORT(UART_PORT, CR1) |= UART_TX_PIN;
+// Configure UART
+    // 8 bit, no parity, 1 stop (UART_CR1/3 = 0 - reset value)
+    // 9600 on 16MHz: DIV=0x0693 -> BRR1=0x68, BRR2=0x03
+    UART1_BRR1 = 0x68; UART1_BRR2 = 0x03;
+    UART1_CR2 = UART_CR2_TEN | UART_CR2_REN | UART_CR2_RIEN; // Allow RX/TX, generate ints on rx
+}
diff --git a/LEDS_BT/pseudostars_7groups/uart.h b/LEDS_BT/pseudostars_7groups/uart.h
new file mode 100644
index 0000000..330a93c
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/uart.h
@@ -0,0 +1,46 @@
+/*
+ * blinky.h
+ *
+ * Copyright 2018 Edward V. Emelianoff <eddy@sao.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#pragma once
+#ifndef __MAIN_H__
+#define __MAIN_H__
+
+#include "stm8s.h"
+
+extern volatile unsigned long Global_time; // global time in ms
+
+#define UART_BUF_LEN 8          // max 7 bytes transmited in on operation
+
+extern U8 UART_rx_cmd;
+extern volatile U8 uart_ready;
+
+void uart_send_byte(U8 byte);
+void uart_write(char *str);
+void newline();
+void printUint(U8 *val, U8 len);
+void print_long(long Number);
+void error_msg(char *msg);
+void uart_init();
+U8 uart_read_cmd(U8 *byte);
+void printUHEX(U8 val);
+
+#define check_UART_pointer(x)  do{if(x == UART_BUF_LEN) x = 0;}while(0)
+
+#endif // __MAIN_H__
diff --git a/LEDS_BT/pseudostars_7groups/uart.ihx b/LEDS_BT/pseudostars_7groups/uart.ihx
new file mode 100644
index 0000000..d6cb795
--- /dev/null
+++ b/LEDS_BT/pseudostars_7groups/uart.ihx
@@ -0,0 +1,50 @@
+:2080DD00808080808080808080C6525544241BCE00051C0001C60004A9009097C60003A917
+:2080FD00009095CF000590CF000335005255808080808088C65230A5202741C652316B01FA
+:20811D00725D0002263690CE0005CE000390A300649FA2009EA200240EC60006C60005C63A
+:20813D000004C600032015C60006C60005C60004C600037B01C70001350100028480808076
+:02815D00808020
+:20815F00C652302AFBAE52317B03F7811E03F6260181C652302AFB72165235F65CC7523195
+:20817F0020EC81725D000226024F811E03C60001F7725F0002A60181721A5011721A5012D5
+:0D819F003568523235035233352C5235818C
+:0180D80000A7
+:208000008200806F82000000820080DD820080DE820080DF820080E0820080E1820080E224
+:20802000820080E3820080E48200000082000000820080E5820080E68200810C8200810D83
+:208040008200810E82000000820000008200810F820081108200815B820000008200000084
+:0C8060008200815C8200815D8200815EF4
+:1D806F00AE00012707724F00005A26F9AE00052709D680D7D700015A26F7CC806CC6
+:03806C00CC81AC18
+:2081AC0052555F1F521F50961C001E1F357F1E355C1F4B7F1E355C5C1F3F7F1E351C000338
+:2081CC001F3D7F1E351C00041F337F1E351C00051F2F7F1E351C00061F547F965C5C1F312E
+:2081EC006F036F026F017F1E311C00041F276F036F026F017F1E311C00081F436F036F0262
+:20820C006F017F1E311C000C1F496F036F026F017F1E311C00101F456F036F026F017F1EE3
+:20822C00311C00141F476F036F026F017F1E311C00181F416F036F026F017F0F4E0F4DC665
+:20824C007F60905FAA01C77F60350050C635005260350F52613503526235E8526335015284
+:20826C005435855250350E501135F8500C350E501235F8500D721A5007C65008AA20C75004
+:20828C0008CD81979ACE000572F0521F3BC6000412516B3AC6000312506B39AE01F3133BD9
+:2082AC004F123A4F1239240ECE00051F52CE00031F50901A50057B4D97A613421C808C1F27
+:2082CC00370F4F5F7B4F9772FB35F62603CC83717B4F97A6044272FB311F2D909390EE02E2
+:2082EC00FE90C300059FC200049EC200032503CC83715F7B4E9772FB37F6905F5F9097722C
+:20830C00B900059FC900046B2A9EC900036B291E2DEF021629FF0C4E7B4EA11223020F4EC2
+:20832C007B4FA106223F5F7B4F9758DE833BFC8349834F8355835B83618367836D901650A7
+:20834C000F20229014500F201C9012500F2016901E500A2010901C500A200A901A500A20BE
+:20836C00049018500A0C4F7B4FA1062403CC82CF965C89CD81825B024D2603CC82917B0162
+:20838C00A1312403CC82917B01A1492303CC82917B01A0316B267B4D4C6B255F7B2697581D
+:2083AC00DE83B0FC83E283FB8414842D8446845F8478849184FB82918291829182918291DC
+:2083CC008291829184A384AD84B784C184CB84D584DF84E985337216500F1E35A601F71E6D
+:2083EC003190CE0005EF0290CE0003FFCC82917214500F1E4BA601F71E2790CE0005EF0228
+:20840C0090CE0003FFCC82917212500F1E3FA601F71E4390CE0005EF0290CE0003FFCC82D0
+:20842C0091721E500A1E3DA601F71E4990CE0005EF0290CE0003FFCC8291721C500A1E3389
+:20844C00A601F71E4590CE0005EF0290CE0003FFCC8291721A500A1E2FA601F71E4790CEE8
+:20846C000005EF0290CE0003FFCC82917218500A1E54A601F71E4190CE0005EF0290CE00B6
+:20848C0003FFCC82917B256B4D7B4DA1032203CC82910F4DCC82917217500F1E357FCC82E4
+:2084AC00917215500F1E4B7FCC82917213500F1E3F7FCC8291721F500A1E3D7FCC829172BD
+:2084CC001D500A1E337FCC8291721B500A1E2F7FCC82917219500A1E547FCC82917B256B18
+:2084EC004D7B4DA1032203CC82910F4DCC8291C6500FAA0EC7500FC6500AAAF8C7500A4F43
+:20850C005F9772FB3588A601F7848841A60441428472FB3190CE0005EF0290CE0003FF4CF5
+:20852C00A10625DCCC8291C6500FA4F1C7500FC6500AA407C7500A4F5F9772FB357F4CA189
+:06854C000625F5CC82912A
+:20808C000C0C0310081404030F010F04060F13090A00000C0C0310083204030F640F040630
+:2080AC000F13090A00001716020B0D1C19011D10090711100D151200001E081F05181721D6
+:0C80CC001812231E171D011618190000C1
+:0480D90000000000A3
+:00000001FF