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si7005 next iteration (still doesn't work)

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This commit is contained in:
Edward Emelianov 2015-05-23 09:55:02 +03:00
parent 132ebb5787
commit c4dfed49d5
5 changed files with 272 additions and 179 deletions
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95
si7005/i2c.c
View File

@ -140,9 +140,18 @@
static U8 addr7r = 0, addr7w = 0; static U8 addr7r = 0, addr7w = 0;
extern volatile unsigned long Global_time;
static U16 _c; static U16 _c;
#define I2C_WAIT(evt) do{for(_c = 0; _c < 16000; _c++){ \ static unsigned long wtm;
if(evt) break;} if(_c == 16000) return ret;}while(0) #define I2C_WAIT(evt, tmo) do{wtm = Global_time; \
while(Global_time-wtm<tmo) if(evt) break; \
if(!evt){ret = I2C_SR1; goto eotr;}}while(0)
/*
#define I2C_WAIT(evt) do{for(_c = 0; _c < 60000; _c++){ \
if(evt) break;} if(_c == 60000) return ret;}while(0)
*/
static U8 _d; static U8 _d;
#define I2C_LINEWAIT() do{ for(_d = 0; _d < 16; _d++){\ #define I2C_LINEWAIT() do{ for(_d = 0; _d < 16; _d++){\
@ -181,28 +190,25 @@ i2c_status i2c_7bit_send_onebyte(U8 data){
i2c_status ret = I2C_TMOUT; i2c_status ret = I2C_TMOUT;
//I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C //I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C
I2C_LINEWAIT(); I2C_LINEWAIT();
//I2C_WAIT(!(I2C_SR3 & 2)); // wait for line released
I2C_CR2 |= 1; // send START I2C_CR2 |= 1; // send START
I2C_WAIT(I2C_SR1 & 1); // wait for SB I2C_WAIT(I2C_SR1 & 1, 2); // wait for SB
I2C_DR = addr7w; I2C_DR = addr7w;
ret = I2C_NOADDR; ret = I2C_NOADDR;
I2C_WAIT((I2C_SR1 & 2) || I2C_SR2); // wait for ADDR I2C_WAIT((I2C_SR1 & 2) || I2C_SR2, 2); // wait for ADDR
if(I2C_SR2){ // NACK or other error if(I2C_SR2){ // NACK or other error
ret = I2C_NACK; ret = I2C_NACK;
goto endoftransmission; goto eotr;
} }
ret = I2C_HWPROBLEM; ret = I2C_HWPROBLEM;
if(!(I2C_SR3 & 4)) goto endoftransmission; // interface is in receiver mode // clear ADDR reading SR3
I2C_WAIT((I2C_SR1 & 0x80) || I2C_SR2); // wait for TXE if(!(I2C_SR3 & 4)) goto eotr; // interface is in receiver mode
if(I2C_SR2){ I2C_WAIT(I2C_SR1 & 0x80, 2); // wait for TXE
ret = I2C_NACK;
goto endoftransmission;
}
I2C_DR = data; // send data I2C_DR = data; // send data
I2C_WAIT((I2C_SR1 & 0x84 == 0x84) || I2C_SR2); // wait for TXE & BTF I2C_WAIT(((I2C_SR1 & 0x84) == 0x84) || I2C_SR2, 15); // wait for TXE & BTF
//I2C_WAIT((I2C_SR1 & 4) || I2C_SR2); // wait for TXE & BTF
if(!I2C_SR2) ret = I2C_OK; if(!I2C_SR2) ret = I2C_OK;
else ret = I2C_NACK; else ret = I2C_NACK;
endoftransmission: eotr:
I2C_SR2 = 0; // clear all error flagss I2C_SR2 = 0; // clear all error flagss
I2C_CR2 |= 2; // set STOP I2C_CR2 |= 2; // set STOP
while(I2C_CR2 & 2); // wait for STOP sent while(I2C_CR2 & 2); // wait for STOP sent
@ -216,32 +222,32 @@ endoftransmission:
i2c_status i2c_7bit_send(U8 *data, U8 datalen){ i2c_status i2c_7bit_send(U8 *data, U8 datalen){
i2c_status ret = I2C_TMOUT; i2c_status ret = I2C_TMOUT;
//I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C //I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C
//I2C_WAIT(!(I2C_SR3 & 2)); // wait for line released
I2C_LINEWAIT(); I2C_LINEWAIT();
I2C_CR2 |= 1; // send START I2C_CR2 |= 1; // send START
ret = I2C_TMOUT; ret = I2C_TMOUT;
I2C_WAIT(I2C_SR1 & 1); // wait for SB I2C_WAIT(I2C_SR1 & 1, 2); // wait for SB
I2C_DR = addr7w; I2C_DR = addr7w;
ret = I2C_NOADDR; ret = I2C_NOADDR;
I2C_WAIT((I2C_SR1 & 2) || I2C_SR2); // wait for ADDR I2C_WAIT((I2C_SR1 & 2) || I2C_SR2, 2); // wait for ADDR
if(I2C_SR2){ // NACK or other error if(I2C_SR2){ // NACK or other error
ret = I2C_NACK; ret = I2C_NACK;
goto endoftransmission; goto eotr;
} }
ret = I2C_HWPROBLEM; ret = I2C_HWPROBLEM;
if(!(I2C_SR3 & 4)) goto endoftransmission; // interface is in receiver mode if(!(I2C_SR3 & 4)) goto eotr; // interface is in receiver mode
while(datalen--){ while(datalen--){
I2C_WAIT((I2C_SR1 & 0x80) || I2C_SR2); // wait for TXE I2C_WAIT((I2C_SR1 & 0x80) || I2C_SR2, 2); // wait for TXE
if(I2C_SR2){ if(I2C_SR2){
ret = I2C_NACK; ret = I2C_NACK;
goto endoftransmission; goto eotr;
} }
I2C_DR = *data--; // send data I2C_DR = *data++; // send data
} }
I2C_WAIT((I2C_SR1 & 0x84 == 0x84) || I2C_SR2); // wait for TXE & BTF I2C_WAIT((I2C_SR1 & 0x84 == 0x84) || I2C_SR2, 15); // wait for TXE & BTF
//I2C_WAIT((I2C_SR1 & 0x84) || I2C_SR2);
if(!I2C_SR2) ret = I2C_OK; if(!I2C_SR2) ret = I2C_OK;
else ret = I2C_NACK; else ret = I2C_NACK;
endoftransmission: eotr:
I2C_SR2 = 0; // clear all error flags I2C_SR2 = 0; // clear all error flags
I2C_CR2 |= 2; // set STOP I2C_CR2 |= 2; // set STOP
while(I2C_CR2 & 2); // wait for STOP sent while(I2C_CR2 & 2); // wait for STOP sent
@ -256,36 +262,36 @@ endoftransmission:
i2c_status i2c_7bit_receive_onebyte(U8 *data){ i2c_status i2c_7bit_receive_onebyte(U8 *data){
i2c_status ret = I2C_TMOUT; i2c_status ret = I2C_TMOUT;
//I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C //I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C
//I2C_WAIT(!(I2C_SR3 & 2)); // wait for line released
I2C_LINEWAIT(); I2C_LINEWAIT();
I2C_CR2 |= 1; // send START I2C_CR2 |= 1; // send START
ret = I2C_TMOUT; ret = I2C_TMOUT;
I2C_WAIT(I2C_SR1 & 1); // wait for SB I2C_WAIT(I2C_SR1 & 1, 2); // wait for SB
I2C_DR = addr7r; // send address & read bit I2C_DR = addr7r; // send address & read bit
ret = I2C_NOADDR; ret = I2C_NOADDR;
I2C_WAIT((I2C_SR1 & 2) || I2C_SR2); // wait for ADDR I2C_WAIT((I2C_SR1 & 2) || I2C_SR2, 2); // wait for ADDR
if(I2C_SR2){ // NACK or other error if(I2C_SR2){ // NACK or other error
ret = I2C_NACK; ret = I2C_NACK;
goto endofreceiving; goto eotr;
} }
// clear POS|ACK // clear POS|ACK
I2C_CR2 &= ~0x0c; I2C_CR2 &= ~0x0c;
ret = I2C_HWPROBLEM; ret = I2C_HWPROBLEM;
// read again SR1, SR3 to clear ADDR // read SR3 to clear ADDR
if(!(I2C_SR1 & 2) || (I2C_SR3 & 4)) goto endofreceiving; // interface is in transmitter mode if((I2C_SR3 & 4)) goto eotr; // interface is in transmitter mode
// set STOP // set STOP
I2C_CR2 |= 2; I2C_CR2 |= 2;
// wait for RxNE // wait for RxNE
I2C_WAIT((I2C_SR1 & 0x40) || I2C_SR2); I2C_WAIT((I2C_SR1 & 0x40) || I2C_SR2, 2);
if(I2C_SR2){ if(I2C_SR2){
ret = I2C_NACK; ret = I2C_NACK;
goto endofreceiving; // error goto eotr; // error
} }
ret = I2C_OK; ret = I2C_OK;
// read data clearing RxNE // read data clearing RxNE
*data = I2C_DR; *data = I2C_DR;
endofreceiving: eotr:
I2C_SR2 = 0; // clear all error flags I2C_SR2 = 0; // clear all error flags
if(!I2C_CR2 & 2) I2C_CR2 |= 2;
while(I2C_CR2 & 2); // wait for STOP sent while(I2C_CR2 & 2); // wait for STOP sent
return ret; return ret;
} }
@ -293,39 +299,42 @@ endofreceiving:
i2c_status i2c_7bit_receive_twobyte(U8 *data){ i2c_status i2c_7bit_receive_twobyte(U8 *data){
i2c_status ret = I2C_TMOUT; i2c_status ret = I2C_TMOUT;
//I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C //I2C_CR2 |= 0x80; I2C_CR2 &= ~0x80; // reset I2C
//I2C_WAIT(!(I2C_SR3 & 2)); // wait for line released
I2C_LINEWAIT(); I2C_LINEWAIT();
I2C_CR2 |= 1; // send START I2C_CR2 |= 1; // send START
ret = I2C_TMOUT; ret = I2C_TMOUT;
I2C_WAIT(I2C_SR1 & 1); // wait for SB I2C_WAIT(I2C_SR1 & 1, 2); // wait for SB
I2C_DR = addr7r; // send address & read bit I2C_DR = addr7r; // send address & read bit
// set POS|ACK // set POS|ACK
I2C_CR2 |= 0x0c; I2C_CR2 |= 0x0c;
ret = I2C_NOADDR; ret = I2C_NOADDR;
I2C_WAIT((I2C_SR1 & 2) || I2C_SR2); // wait for ADDR I2C_WAIT((I2C_SR1 & 2) || I2C_SR2, 2); // wait for ADDR
if(I2C_SR2){ // NACK or other error if(I2C_SR2){ // NACK or other error
ret = I2C_NACK; ret = I2C_NACK;
goto endofreceiving; goto eotr;
} }
ret = I2C_HWPROBLEM; ret = I2C_HWPROBLEM;
// read again SR1, SR3 to clear ADDR // read SR3 to clear ADDR
if(!(I2C_SR1 & 2) || (I2C_SR3 & 4)) return 0; // interface is in transmitter mode if(I2C_SR3 & 4) goto eotr; // interface is in transmitter mode
// clear ACK // clear ACK
I2C_CR2 &= ~4; I2C_CR2 &= ~4;
// wait for BTF // wait for BTF
I2C_WAIT((I2C_SR1 & 4) || I2C_SR2); I2C_WAIT((I2C_SR1 & 4) || I2C_SR2, 15);
if(I2C_SR2){ if(I2C_SR2){
ret = I2C_NACK; ret = I2C_NACK;
goto endofreceiving; goto eotr;
} }
// patch from ERRATA
disableInterrupts();
// set STOP // set STOP
I2C_CR2 |= 2; I2C_CR2 |= 2;
ret = 1; ret = I2C_OK;
// read data // read data
data[0] = I2C_DR; data[0] = I2C_DR;
enableInterrupts();
data[1] = I2C_DR; data[1] = I2C_DR;
endofreceiving: eotr:
I2C_SR2 = 0; // clear all error flags I2C_SR2 = 0; // clear all error flags
if(!I2C_CR2 & 2) I2C_CR2 |= 2;
while(I2C_CR2 & 2); // wait for STOP sent while(I2C_CR2 & 2); // wait for STOP sent
return ret; return ret;
} }

2
si7005/i2c.h
View File

@ -32,7 +32,7 @@ typedef enum{
I2C_TMOUT, I2C_TMOUT,
I2C_NOADDR, I2C_NOADDR,
I2C_NACK, I2C_NACK,
I2C_HWPROBLEM I2C_HWPROBLEM,
} i2c_status; } i2c_status;
void i2c_setup(); void i2c_setup();

55
si7005/main.c
View File

@ -26,6 +26,49 @@
volatile unsigned long Global_time = 0L; // global time in ms volatile unsigned long Global_time = 0L; // global time in ms
U16 paused_val = 500; // interval between LED flashing U16 paused_val = 500; // interval between LED flashing
#if defined STM8S105
U8 unlock_EEPROM(){
// unlock memory
FLASH_DUKR = EEPROM_KEY1;
FLASH_DUKR = EEPROM_KEY2;
// check bit DUL=1 in FLASH_IAPSR
if(!(FLASH_IAPSR & 0x08))
return 0;
return 1;
}
void lock_EEPROM(){
while(!(FLASH_IAPSR & 0x04)); // wait till end
// clear DUL to lock write
FLASH_IAPSR &= ~0x08;
}
/**
* check OPT2 bit AFR6 for I2C remapping to PB4/PB5
*/
U8 opt2_default_setup(){
U8 ret = 0;
U8 val = OPT2 | 0x40;
if(OPT2 & 0x40) return 0;
disableInterrupts();
FLASH_CR2 = 0x80; // enable write OPT
FLASH_NCR2 = ~0x80;
if(!unlock_EEPROM()){ret = 1; goto out;}
if(!(FLASH_CR2 & 0x80)){ret = 3; goto out;}
// set AFR6 in OPT2 & reset in NOPT2
OPT2 = val;
NOPT2 = ~val;
lock_EEPROM();
FLASH_CR2 &= ~0x80; // disable write OPT
FLASH_NCR2 |= 0x80;
ret = 2;
out:
enableInterrupts();
return ret;
}
#endif // STM8S105
int main() { int main() {
unsigned long T = 0L, siT = 0L; unsigned long T = 0L, siT = 0L;
U8 rb; U8 rb;
@ -46,6 +89,9 @@ int main() {
PORT(LED_PORT, DDR) |= LED_PIN; PORT(LED_PORT, DDR) |= LED_PIN;
PORT(LED_PORT, CR1) |= LED_PIN; PORT(LED_PORT, CR1) |= LED_PIN;
#if defined STM8S105
opt2_default_setup();
#endif
uart_init(); uart_init();
si7005_setup(); si7005_setup();
@ -67,6 +113,7 @@ int main() {
"I\tread Si7005 device id\n" "I\tread Si7005 device id\n"
"T\tread themperature\n" "T\tread themperature\n"
"P\tread pressure\n" "P\tread pressure\n"
//"O\tread OPT"
); );
break; break;
case '+': case '+':
@ -88,6 +135,14 @@ int main() {
case 'P': case 'P':
si7005_read_P(); si7005_read_P();
break; break;
/* case 'O':
printUHEX(OPT2);
printUHEX(NOPT2);
break;
case 'W':
printUHEX(opt2_default_setup());
break;
*/
} }
} }
if(Global_time != siT){ if(Global_time != siT){

10
si7005/si7005.c
View File

@ -67,12 +67,15 @@ void si7005_read_ID(){
*/ */
void si7005_read_T(){ void si7005_read_T(){
const U8 cmd[2] = {0x03, 0x11}; const U8 cmd[2] = {0x03, 0x11};
i2c_status st = I2C_OK;
if(state != RELAX){ if(state != RELAX){
error_msg("measurements are in process"); error_msg("measurements are in process");
return; return;
} }
if(i2c_7bit_send(cmd, 2) != I2C_OK){ st = i2c_7bit_send(cmd, 2);
if(st != I2C_OK){
error_msg("can't send read sequence "); error_msg("can't send read sequence ");
printUHEX(st);UART_send_byte('\n');
return; return;
} }
state = WAITFORT; state = WAITFORT;
@ -83,12 +86,15 @@ void si7005_read_T(){
*/ */
void si7005_read_P(){ void si7005_read_P(){
const U8 cmd[2] = {0x03, 0x01}; const U8 cmd[2] = {0x03, 0x01};
i2c_status st = I2C_OK;
if(state != RELAX){ if(state != RELAX){
error_msg("measurements are in process"); error_msg("measurements are in process");
return; return;
} }
if(i2c_7bit_send(cmd, 2) != I2C_OK){ st = i2c_7bit_send(cmd, 2);
if(st != I2C_OK){
error_msg("can't send read sequence "); error_msg("can't send read sequence ");
printUHEX(st);UART_send_byte('\n');
return; return;
} }
state = WAITFORP; state = WAITFORP;

285
si7005/uart.ihx
View File

@ -1,154 +1,177 @@
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