From c062eaa03863b00398e368c74ca21864631afe69 Mon Sep 17 00:00:00 2001 From: eddyem Date: Tue, 3 Jul 2018 20:54:21 +0300 Subject: [PATCH] fix ADC & change protocol in 220v socket --- 220controlled_socket/src/220socket.bin | Bin 4221 -> 3718 bytes 220controlled_socket/src/220socket.geany | 31 +- 220controlled_socket/src/220socket.ihx | 259 +++++------ 220controlled_socket/src/Readme | 22 + 220controlled_socket/src/hardware.c | 10 +- 220controlled_socket/src/interrupts.c | 52 +-- 220controlled_socket/src/main.c | 261 ++++++----- 220controlled_socket/src/stm8s.h | 540 +++++++++++------------ 220controlled_socket/src/uart.c | 17 +- 220controlled_socket/src/uart.h | 8 +- stm8l.h | 540 +++++++++++------------ 11 files changed, 885 insertions(+), 855 deletions(-) create mode 100644 220controlled_socket/src/Readme diff --git a/220controlled_socket/src/220socket.bin b/220controlled_socket/src/220socket.bin index 50d1965f0e4b45a12ea593a24a1ad25aa00dbdcf..36fff75bf546f0b04dc44bffa6e240ff199267aa 100644 GIT binary patch delta 2022 zcmZvdZ)_7~9LIlm*Ojhz|89T`w%)DG-mHafFc2Y)%t6T5pQ~dK*wCgMM3x&HX$J}y z)3srYwUx|VbcrUCChKDM;$q+}35FN#o3=B&&{u{S6MZMfm{x*j{+{Q0tQed0c|Q01 zJ-_es=bnE1k9ezP=}ctquNVLr-??Woh*sg(yBRZc0J(*SIyj{*AsJxQ{Y-}zsrvgn zmwo`}sJoP#`_E^X(}z2YX;Jd&!(By%(Sa4%474tX&O@vGS?D>dGNlZB`b#UrX*TA5 zLsa#oI5(GzMQc2?({fCV{p7CZXPxYwI_(N8RGk=O$6nJeS(>#ai&y*B(p(iDVGe}v z|6~cU5l*!#tjeZ(u=-Xb!aD>y5PAvpBlHnSA@mdY6JY>hp&nt7fEQtizzGDIz&OG= z0v{uc5?DqEN~740OINU+z#tKiq$UXwb%g*?pCScB{W1ZfK23nA&k!K$*9j2y8w8ef z3lH?flf`@#_p1BrifM~vS?vZCX3kzrAFaqmNb;$XRIRuy>nfu#B3sAQ zFgUCeCAx0sqkC@l`$&tyM%`~Mrt94=>HC>tnteHx_@g`}F#Rmzmt&ls_}h#fEXN|8 zp0t?3LoWs<9Y(AGhs_w-Vv;Wp^;h8~d3nBMlbORUiWOVL9VW$!oNY5FDiJ*?nK>w? zD|3E5xu+skaiZb@J-OdZ*^7go7iS^v(vwFvGwJ$@xj^OUN#>(R#<=M4?ttJB>=Auq zLtp}eEg)F+WUpY!$L{81H@^tI2ZD4=hZ>S8aMXpe+Olv^WwY>>%4FdXE|o610PXIo0=Oj~ zncy2}7q;UJk3dqk;S`U+t!&ldLgRLs-zM{0+g=TJ;$@sj#6! z>>~a%HH*ZlTp~k`Va-y);_`t|!dG+Dh|%5ASXFW5NlC}w+nQ*mHVIQ^p)F$KO35H7 zuGvhgh?Qpr@*1$%X(^HuOFTZmcsoCT^5(qwv}|BoLQcP(%G0&t?Qg>?x@6oVa{cP? z`nl~oFc=D~H-LLJh;CFx9Z?Yn%?Hw`_ zoIdU&G}v?2==+9zFytRO<*S z6E#=4$&NnlVa@wZ(;YM79x*sEJ9#ZQdr_RZI@{UNWgqI0HL-RVAHFp6p%|Q+62r5> f*~#$i4c=tb1Et_BaGX9wY=t;GIia zs*_ca?)~mL=lkxtKZoK+dmoGC9~!3bDniKlne5+wEvhUmSJO4!d8L4&e%2OZJWvR)gM(X5>D8Fi{!%dCQ$@-O(@?#k2M9V^?K-~$T zzUBNh>Qk2To79cJON8r2>+9}M^hAx4sC!pGVG?#%`7?2qEIp{aO!DOQ`AU`)jMEu1 zGhnJAmiTOXT3~s05AqvKI1!2Vl+y|qSys64QmjV^uM!%u>eqr3bhbEw_}(IX8>PQy zyj41w9n*tj`Azm#vh{@f`db;V&=U*m!5SK(6p>sd_#Vl{hh^%d^e0R*PRbF6kVAU# z)#Y+FSIy-gv8xBlExZu6*f39LI8%+SqqyK(NBaa%R&Wax8)O5l|Fb=afr!f)Qj0M$ z`J&F$4oE@XEzvwBbwRp8@hsSq10O*9!oFFs1bBB5zD|yf>-RHW!%mN3yR+qGy}P`W zf7Da$jgY{d9J!cp<M1Z6i*qy>V1CQ59r5}BA`T7`nWPLijbeu8e8 zhYO}o)me?wsRi9tqYLq_TS<))UANxAHXtoJ!8-L?on2@Y1~S9~ra}C71Jg=(H`m0L zmF93a`mQ=MN~zC{4ymIieOy%)^+mUcl9y4XN)A!Uw72p%ag=z_z?xmjtp z2|n+d3s6gZvA${dBRk`d?~FInbaO%Ps?8K6@7fV7O}E6Z`fc1d%*hOCs)Jb}Akfy< z7QPt$S%J$6R8}Awg>s|t-mmj#kpMM=7$K6qg96K^^P3SkGGYq`lXp>|=9A+2EDG?% zH0JzUaO?46H#x8O7dc`+4#m+Q_CV)>AYl}?1t0f+141u8aKE+-pE#|>EOa;At8lv% zE*6jDn;O73m5vfIoD1JCd!qgMhn^TD*Ken~js_+7I+ElR7W@hg3VT8E8zgIcK=KOqa0AR6S`T?leG6P_$4c^2q z6D(&icnlyXzX9!x`~zs;2BSUAyYeIqHO#64IEMjNK95;gIgc#^0A?LvL~9>l-x!#F zhQVL#7^TvL-#?B zuGJ(|*sxvn6Dhm&eFoS=R=TUX5(59Q$U#idN)yc$(jG%a+VPGa$jr87tkS1D3$OI6 z&P=lsZKY9j&D+8$VC2FG$W#AEHb}e7OJ8)@Qx3b{YO~?O*h~3sCq#Q9HPF>0pOtnu z>-Srt2LpI=wKw2*9oD(0S?7R-pBE5~X>i5vcW73JcK&JFc{~}gylqyi&4Sy#;*w$U zcF{r76FGd2_?Zv&U3N;cQ_A?_T46+h8LCynBM^YSswDjT&e-`FEvxiLCllLEH&>2q z>xb~BOw2r~k88D4;j4Ni+U1Nqns(0i#u_n^dRHaDcfaM zs>}sxr*|iAT%X60yBwKHFqkp2#iC9x>%pS}rTcK7-y{W6`8|SvA+R&s<6d|t!Q%jo z34y?&*oC3jVPWXOu)2FY*1ruQHn0sLmT_Qte%>rkofTwiYT7JMoA6HeeV_jUp{R2f diff --git a/220controlled_socket/src/220socket.geany b/220controlled_socket/src/220socket.geany index cd6c660..11cf2a7 100644 --- a/220controlled_socket/src/220socket.geany +++ b/220controlled_socket/src/220socket.geany @@ -28,20 +28,23 @@ long_line_behaviour=1 long_line_column=100 [files] -current_page=5 -FILE_NAME_0=333;Make;0;EUTF-8;1;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2FMakefile;0;4 -FILE_NAME_1=6281;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Finterrupts.c;0;4 -FILE_NAME_2=953;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Finterrupts.h;0;4 -FILE_NAME_3=3048;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fhardware.c;0;4 -FILE_NAME_4=2353;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fhardware.h;0;4 -FILE_NAME_5=964;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fmain.c;0;4 -FILE_NAME_6=1897;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fuart.c;0;4 -FILE_NAME_7=1275;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fuart.h;0;4 -FILE_NAME_8=880;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fstm8s.h;0;4 -FILE_NAME_9=2641;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDropbox%2FProjects%2FSTM8_samples%2Fvoltmeters%2Fsrc%2F3-digit%2Fmain.c;0;4 -FILE_NAME_10=1285;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDropbox%2FProjects%2FSTM8_samples%2Fvoltmeters%2Fsrc%2F3-digit%2Finterrupts.c;0;4 -FILE_NAME_11=887;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDropbox%2FProjects%2FSTM8_samples%2Fvoltmeters%2Fsrc%2F3-digit%2Finterrupts.h;0;4 -FILE_NAME_12=1968;C;0;EUTF-8;0;1;0;%2Fhome%2Feddy%2FDropbox%2FProjects%2FSTM8_samples%2Fstepper_independent_bin%2Fmain.c;0;4 +current_page=3 +FILE_NAME_0=743;Make;0;EUTF-8;1;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2FMakefile;0;4 +FILE_NAME_1=5974;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Finterrupts.c;0;4 +FILE_NAME_2=4438;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Finterrupts.h;0;4 +FILE_NAME_3=3065;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fhardware.c;0;4 +FILE_NAME_4=2430;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fhardware.h;0;4 +FILE_NAME_5=4806;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fmain.c;0;4 +FILE_NAME_6=4205;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fuart.c;0;4 +FILE_NAME_7=1322;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fuart.h;0;4 +FILE_NAME_8=8347;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2F220controlled_socket%2Fsrc%2Fstm8s.h;0;4 +FILE_NAME_9=4012;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2Fmicrodrill%2Finterrupts.c;0;4 +FILE_NAME_10=5430;C;0;EUTF-8;0;1;0;%2FBig%2FData%2F00__Electronics%2FSTM8%2Fmicrodrill%2Fmain.c;0;4 +FILE_NAME_11=4138;C;0;EUTF-8;0;1;0;%2Ftmp%2Fuart_SPI%2Fuart.c;0;4 +FILE_NAME_12=1237;C;0;EUTF-8;0;1;0;%2Ftmp%2Fuart_SPI%2Fports_definition.h;0;4 +FILE_NAME_13=1552;C;0;EUTF-8;0;1;0;%2Ftmp%2Fuart_SPI%2Fmain.c;0;4 +FILE_NAME_14=43;Make;0;EUTF-8;1;1;0;%2Ftmp%2Fuart_SPI%2FMakefile;0;4 +FILE_NAME_15=3619;C;0;EUTF-8;0;1;0;%2Ftmp%2Fuart_SPI%2Finterrupts.c;0;4 [VTE] last_dir=/home/eddy/Docs/SAO/Cameras/FLI_camera/my/Mytakepic diff --git a/220controlled_socket/src/220socket.ihx b/220controlled_socket/src/220socket.ihx index e66604b..4efdffc 100644 --- a/220controlled_socket/src/220socket.ihx +++ b/220controlled_socket/src/220socket.ihx @@ -1,138 +1,123 @@ -:2080A00080808080808080808080808080805204AE5230F66B027B02A520274AAE5231F6FD -:2080C0006B017B02A4804D27FDAE52317B01F7AE00021F03C6002197725C00214F9572FBEE -:2080E000037B01F7C60020C10021260FC600204CC70020A1082604725F0020C60021A108A0 -:208100002604725F00215B0480803501001FAE5400F6A43FF780AE5344F644241B90CE0021 -:1E8120002472A90001C60023A90097C60022A9009590CF0024CF002235005344808072 -:019066000009 -:20813E00AE5230F64D2AF9AE52317B03F781AE5230F64D2AF9350A523181160390F64D2778 -:20815E0018AE5230F64D2AF9AE5235F6AA08F790F6905CAE5231F720E3815202C60021C165 -:20817E00002026034F20241605AE00021F01C6002097725C00204F9572FB01F690F7C6001A -:20819E0020A1082604725F0020A6015B028152255F1F031F017B2AA1042303CC82927B2A4B -:2081BE00A1032603CC82920D2A2603CC8292961C00051F124F5F9772FB127F4CA10C25F576 -:2081DE001E12A60AE70A7B2AA101270E7B2AA10227197B2AA104272E20451E28F66B1F4F93 -:2081FE005F6B031F017B1F6B042034162817201E20FE1F18161817240F230F22162417030F -:20821E001622170120191628171A1E1AE6036B17E6026B16FE1F141616170316141701A6DD -:20823E00096B114B0A5F894B001E07891E0789CD8EEE5B08517B110A115F9772FB12909F6F -:20825E00AB30F74B0A5F894B001E07891E0789CD8F855B081F0317011E0326041E01270635 -:20827E007B11A1FF2CBD7B114C5F9772FB1289CD81585B025B258152100F01965C5C1F0F03 -:20829E001E0F1C000B7F0D132A14161590504F1214974F12139517151F13A6016B01A60B4D -:2082BE006B0E4B0A5F894B001E19891E1989CD8EC95B089F0A0E5F417B0E4172FB0FAB3020 -:2082DE00F74B0A5F894B001E19891E1989CD8F5E5B081F1517137B0EA1002C034F2002A696 -:2082FE00011E1526041E1327034D26B6417B0E414D27140D0127107B0E4A97905F619F61EC -:20831E0072F90FA62D90F74F9572FB0F89CD81585B12815217CE00241F09CE00221F075FF6 -:20833E001F051F030F0E0F0C0F0B961C000D89CD81785B026B170D1727717B0DA12D260E54 -:20835E001E05260A1E032606A6016B0E205D7B0DA13025797B0DA1392273A6016B0C1E0593 -:20837E00891E05894B0A5F894B00CD8FDF5B081F1517137B0D0F115F90977B11909572F9DC -:20839E00159F19140219139572A200309FA20002A2009517051F03AE7FFF13054F12044F27 -:2083BE00120324075F1F051F030F0B90CE002472F209C60023120895C6002212079790A34E -:2083DE0027109EA2009FA2002403CC83480D0B26040D0C26034F2014160517010D0E270588 -:2083FE001E01501F011E1A1601FFA6015B1781AE848489CD81585B021E0389CD81585B02F9 -:20841E004B0ACD813E84817B03A40F6B037B03887B04A10A842406AB306B032004AB576B01 -:20843E00037B0381AE848D89CD81585B027B034EA40F88CD84255B0188CD813E847B03885A -:20845E00CD84255B0188CD813E8481AE5011F6AA20F7AE5012F6AA20F735685232350352DB -:12847E0033352C5235810A4552524F523A2000307800BA -:02906700000007 -:2084900072107F60350050C635075347357D53483501534335855340AE5005F6AA20F735F5 -:2084B0000C5002350E5003352050073530500835F8500C35F8500D350450113504501235D2 -:1484D000245400351054073508540235715401357154018176 -:208000008200808382000000820080A0820080A1820080A2820080A3820080A4820080A57E -:20802000820080A6820080A78200000082000000820080A8820080A9820080AA820080AB3D -:20804000820080AC8200000082000000820080AD820080AE820081098200000082000000FF -:208060008200810A820081168200813D820000008200000082000000820000008200000010 -:1D808300AE001E2707724F00005A26F9AE00172709D69065D7001E5A26F7CC8080B4 -:03808000CC87DECC -:2084E4005238AE000D1F0F1E0F5C5C1F371E37FE160F72A90004170D160D90FE17271327E6 -:20850400230FCF000A1E371627FF1E0D90CE000AFF1E0F1C00081F0B1E0BFE160F72A90047 -:208524000A172B162B90FE17211321230FCF000A1E0B1621FF1E2B90CE000AFF1E0F1C004D -:208544000E1F171E17FE160F72A90010171F161F90FE17111311230FCF000A1E171611FFA5 -:208564001E1F90CE000AFF1E0FFE163790FE17011301230FCF000A1E0F1601FF1E3790CE20 -:20858400000AFF1E0F1C00061F091E09FE160B90FE171B131B230FCF000A1E09161BFF1EA3 -:2085A4000B90CE000AFF1E0F1C000C1F2D1E2DFE161790FE17031303230FCF000A1E2D1604 -:2085C40003FF1E1790CE000AFF1E37FE160D90FE17351335230FCF000A1E371635FF1E0D8C -:2085E40090CE000AFF1E0BFE162B90FE17131313230FCF000A1E0B1613FF1E2B90CE000ABD -:20860400FF1E17FE161F90FE17231323230FCF000A1E171623FF1E1F90CE000AFF1E0FFEAA -:20862400160990FE17051305230FCF000A1E0F1605FF1E0990CE000AFF1E2BFE161F90FE6B -:20864400172F132F230FCF000A1E2B162FFF1E1F90CE000AFF1E0BFE161790FE17311331E4 -:20866400230FCF000A1E0B1631FF1E1790CE000AFF1E09FE162D90FE17191319230FCF008D -:208684000A1E091619FF1E2D90CE000AFF1E37FE160B90FE17291329230FCF000A1E3716D1 -:2086A40029FF1E0B90CE000AFF1E0DFE162B90FE17251325230FCF000A1E0D1625FF1E2BD9 -:2086C40090CE000AFF1E0BFE161790FE171D131D230FCF000A1E0B161DFF1E1790CE000AE6 -:2086E400FF1E0BFE160D90FE17331333230FCF000A1E0B1633FF1E0D90CE000AFF1E2DFEB8 -:20870400160B90FE17071307230FCF000A1E2D1607FF1E0B90CE000AFF1E0BFE160D90FE94 -:2087240017151315230FCF000A1E0B1615FF1E0D90CE000AFF1E0BFE5B38815202AE8D3CEB -:2087440089CD81585B027B056B017B05A1612606A6016B0220020F027B01A14127147B0193 -:20876400A142273E7B01A16127087B01A162273220620D022704A6312002A630AE8D428898 -:2087840089CD81585B02CD813E84AE500FF60D022708AA04AE500FF7203AA4FBAE500FF749 -:2087A40020320D022704A6312002A630AE8D458889CD81585B02CD813E84AE500AF6887BB5 -:2087C40006A162842608AA40AE500AF72006A4BFAE500AF7CD814C5B028152285F1F0C1FCE -:2087E4000AAEFFFF1F075F1F235F1F125F1F035F1F01CD8490CD84699A725D001F274AAE26 -:20880400000D1F145FC6000C975872FB1490CE0001FFC6000C4CC7000CA1092624725F005F -:208824000C1E015C1F01CD84E41F057B24891102857B238912018524021F23130724021FEE -:2088440007725F001F35715401CE002472F00C1F19C60023120B6B18C60022120A6B17AECD -:2088640000C713194F12184F12172424CE00241F0CCE00221F0A160117035F1F011E23277A -:2088840007162372F20717125F1F23AEFFFF1F07CE00282605CE0026273DCE002472B00000 -:2088A400281F1DC60023C200276B1CC60022C200266B1BAE0064131D4F121C4F121B24172B -:2088C4005FCF0028CF0026AE500AF6AA80F7AE8D4889CD81585B02CE002C2605CE002A27D7 -:2088E4003DCE002472B0002C1F21C60023C2002B6B20C60022C2002A6B1FAE006413214F63 -:2089040012204F121F24175FCF002CCF002AAE500AF6AA10F7AE8D5289CD81585B02CE007D -:20892400302605CE002E273DCE002472B000301F10C60023C2002F6B0FC60022C2002E6B6E -:208944000EAE006413104F120F4F120E24175FCF0030CF002EAE500FF6A4FBF7AE8D5C89A2 -:20896400CD81585B02CE00342605CE0032273DCE002472B000341F27C60023C200336B2662 -:20898400C60022C200326B25AE006413274F12264F122524175FCF0034CF0032AE500AF672 -:2089A400A4BFF7AE8D6689CD81585B02961C000989CD81785B024D2603CC87FD7B096B16FA -:2089C4007B16A1412603CC8A8D7B16A1422603CC8A8D7B16A1432603CC8AD67B16A148262A -:2089E40003CC8A977B16A1492603CC8AA37B16A14B2603CC8B9F7B16A14C2603CC8BD57BFC -:208A040016A14D2603CC8C0B7B16A1522603CC8B627B16A1532603CC8B627B16A159260341 -:208A2400CC8C817B16A15A2603CC8CFD7B16A16127577B16A16227517B16A1632603CC8A1E -:208A4400D67B16A168274C7B16A16B2603CC8B9F7B16A16C2603CC8BD57B16A16D2603CCEC -:208A64008C0B7B16A1722603CC8B257B16A1732603CC8B257B16A1792603CC8C417B16A129 -:208A84007A2603CC8CBDCC87FD7B0988CD873F84CC87FDAE8D7089CD81585B02CC87FD1EB2 -:208AA40012541F05AE8E7E89CD81585B02961C00054B0289CD81AC5B03AE8E8989CD815809 -:208AC4005B021E034B0289CD81AC5B03CD814CCC87FDAE8E9189CD81585B027B09A16326F5 -:208AE40004A6302002A63188CD813E844B3DCD813E847B09A1632610AE5006F6A5102604D8 -:208B0400A6312012A630200EAE5001F6A5022604A6312002A63088CD813E84CD814CCC872A -:208B2400FD7B09A1732604A6302002A631AE8E948889CD81585B02CD813E84AE8E9889CD85 -:208B440081585B027B09A173260AAE5000F6AA08F7CC87FDAE5000F6AA04F7CC87FD7B09B9 -:208B6400A1532604A6302002A631AE8E948889CD81585B02CD813E84AE8E9C89CD81585BAE -:208B8400027B09A153260AAE5000F6A4F7F7CC87FDAE5000F6A4FBF7CC87FDAE8EA089CD45 -:208BA40081585B027B09A16B2604A6312002A63088CD813E847B09A16B2609AE5005F6A4FE -:208BC400DFF72007AE5005F6AA20F7CD814CCC87FDAE8EA789CD81585B027B09A16C2604C6 -:208BE400A6312002A63088CD813E847B09A16C2609AE500AF6AA20F72007AE500AF6A4DFE3 -:208C0400F7CD814CCC87FDAE8EAE89CD81585B027B09A16D2604A6312002A63088CD813E5A -:208C2400847B09A16D2609AE500AF6AA08F72007AE500AF6A4F7F7CD814CCC87FDAE500F96 -:208C4400F6A504270AAE500AF6AA80F7CC87FD4B61CD873F8490CE0024CE002290CF002815 -:208C6400CF0026CE00282605CE00262703CC87FDAE0001CF00285FCF0026CC87FDAE500F15 -:208C8400F6AA04F790CE0024CE002290CF0030CF002ECE0030260FCE002E260AAE0001CF5A -:208CA40000305FCF002EAE500AF6A47FF7AE8EB589CD81585B02CC87FDAE500AF6A5402735 -:208CC4000AAE500AF6AA10F7CC87FD4B62CD873F8490CE0024CE002290CF002CCF002ACEFF -:208CE400002C2605CE002A2703CC87FDAE0001CF002C5FCF002ACC87FDAE500AF6AA40F776 -:208D040090CE0024CE002290CF0034CF0032CE0034260FCE0032260AAE0001CF00345FCF02 -:208D24000032AE500AF6A4EFF7AE8EBF89CD81585B02CC87FD5B2881545249414300303DBA -:208D440000313D0052454C4159303D310A0052454C4159313D310A005452494143303D3046 -:208D64000A005452494143313D300A000A50524F544F3A0A612F41202D207475726E206F52 -:208D84006E2F6F6666207472696163300A622F42202D207475726E206F6E2F6F6666207486 -:208DA40072696163310A632F43202D20636865636B20696E302F310A492020202D20736833 -:208DC4006F772063757272656E7420616D706C2E2028414455290A6B2F4B202D207365749B -:208DE4002F726573657420504B4559310A6C2F4C202D207365742F7265736574204E4B4599 -:208E040059310A6D2F4D202D207365742F7265736574204E4B4559320A722F52202D20646F -:208E2400656163746976617465206F7574302F310A732F53202D2061637469766174652093 -:208E44006F7574302F310A792F59202D207475726E206F6E2F6F66662072656C6179300A07 -:208E64007A2F5A202D207475726E206F6E2F6F66662072656C6179310A00496D61782841DE -:208E84004455293D002C204E7074733D00496E004F7574003D310A003D300A00504B45598A -:208EA400313D004E4B4559313D004E4B4559323D0052454C4159303D300A0052454C415954 -:058EC400313D300A0001 -:149069000000000000000000000000000000000000000000F3 -:208EC9001E0916072A03CD905B8990891E0916072A03CD905B899089CD8EEE5B087B032A9F -:208EE90003CD905B8152030F030F017B0A484F494D262E160C1E0A905859170C1F0A1E08B3 -:208F0900130C7B07120B7B06120A240D160C1E0A549056170C1F0A20080C017B016B0320AD -:208F2900CA7B036B021E0872F00C7B07120B90977B06120A25061F0890951706160C1E0A9E -:208F4900549056170C1F0A7B020A024D26D71E0816065B03811E0916072A03CD905B89904C -:208F6900891E0916072A03CD905B899089CD8F855B087B0318072A03CD905B8152065F1F77 -:208F8900051F03A6206B027B09484F496B01160B1E09905859170B1F0916051E039058594E -:208FA90017051F030D0127067B06AA016B061E0572F00F7B04120E90977B03120D250C1F4B -:208FC90005909517037B0CAA016B0C0A0226B81E0B16095B06815F89897B0A977B0E421F10 -:208FE900037B09977B0E4272FB021F024FA9006B017B0A977B0D4272FB021F024F19016B41 -:20900900017B0A977B0C4272FB011F017B09977B0D4272FB011F017B08977B0E4272FB010D -:209029001F017B07977B0E429F1B016B017B0A977B0B429F1B016B017B09977B0C429F1B53 -:1D904900016B017B08977B0D429F1B016B019085858190535D2703535C81905C8170 +:04808300725F000127 +:2080A4008080808080808080808080808080AE5230F6A520272BAE5231F6725D001B262127 +:2080C400725D0001260AA13A2617350100012011A1232705C700042008725F000135010031 +:2080E4001B8080AE5405F65F97CF0002AE5404F6954F4FCA000302CA000295CF0002350137 +:20810400001AAE5400F6A43FF780AE5344F644241B90CE001E72A90001C6001DA90097C6B0 +:12812400001CA9009590CF001ECF001C350053448080BB +:018E5400001D +:20813600AE5230F64D2AF9AE52317B03F781AE5230F64D2AF9350A523181160390F64D2780 +:2081560018AE5230F64D2AF9AE5235F6AA08F790F6905CAE5231F720E381725D001B260356 +:208176004F200C1E03C60004F7725F001BA6018152255F1F031F017B2AA1042303CC826C36 +:208196007B2AA1032603CC826C0D2A2603CC826C961C00051F244F5F9772FB247F4CA10C3B +:2081B60025F51E24A60AE70A7B2AA101270E7B2AA10227197B2AA104272E20451E28F66BFD +:2081D600234F5F6B031F017B236B0420341628171A1E1AFE1F12161217180F170F16161823 +:2081F6001703161617012019162817141E14E6036B1FE6026B1EFE1F1C161E1703161C1783 +:2082160001A6096B114B0A5F894B001E07891E0789CD8D8A5B08517B110A115F9772FB2472 +:20823600909FAB30F74B0A5F894B001E07891E0789CD8DFA5B081F0317011E0326041E01E8 +:2082560027067B11A1FF2CBD7B114C5F9772FB2489CD81505B025B2581AE5011F6AA20F71C +:14827600AE5012F6AA20F73568523235035233352C523581E6 +:018E5500001C +:20828A0072107F60350050C635075347357D53483501534335855340AE5005F6AA20F735FD +:2082AA000C5002350E50033520500735F8500C35F8500D35045011350450123524540035EA +:1082CA00105407350854023573540135735401812B +:208000008200808382000000820080A4820080A5820080A6820080A7820080A8820080A966 +:20802000820080AA820080AB8200000082000000820080AC820080AD820080AE820080AF25 +:20804000820080B08200000082000000820080B1820080B2820080E6820000008200000017 +:20806000820080E78200810E82008135820000008200000082000000820000008200000044 +:1D808700AE00192707724F00005A26F9AE001C2709D68E53D700195A26F7CC8080C9 +:03808000CC87AA00 +:2082DA005238AE00081F0F1E0F5C5C1F371E37FE160F72A90004170D160D90FE17271327F7 +:2082FA00230FCF00051E371627FF1E0D90CE0005FF1E0F1C00081F0B1E0BFE160F72A9005E +:20831A000A172B162B90FE17211321230FCF00051E0B1621FF1E2B90CE0005FF1E0F1C0063 +:20833A000E1F171E17FE160F72A90010171F161F90FE17111311230FCF00051E171611FFB6 +:20835A001E1F90CE0005FF1E0FFE163790FE17011301230FCF00051E0F1601FF1E3790CE36 +:20837A000005FF1E0F1C00061F091E09FE160B90FE171B131B230FCF00051E09161BFF1EB9 +:20839A000B90CE0005FF1E0F1C000C1F2D1E2DFE161790FE17031303230FCF00051E2D161A +:2083BA0003FF1E1790CE0005FF1E37FE160D90FE17351335230FCF00051E371635FF1E0DA2 +:2083DA0090CE0005FF1E0BFE162B90FE17131313230FCF00051E0B1613FF1E2B90CE0005D8 +:2083FA00FF1E17FE161F90FE17231323230FCF00051E171623FF1E1F90CE0005FF1E0FFEC1 +:20841A00160990FE17051305230FCF00051E0F1605FF1E0990CE0005FF1E2BFE161F90FE81 +:20843A00172F132F230FCF00051E2B162FFF1E1F90CE0005FF1E0BFE161790FE17311331FA +:20845A00230FCF00051E0B1631FF1E1790CE0005FF1E09FE162D90FE17191319230FCF00A3 +:20847A00051E091619FF1E2D90CE0005FF1E37FE160B90FE17291329230FCF00051E3716EC +:20849A0029FF1E0B90CE0005FF1E0DFE162B90FE17251325230FCF00051E0D1625FF1E2BEF +:2084BA0090CE0005FF1E0BFE161790FE171D131D230FCF00051E0B161DFF1E1790CE000501 +:2084DA00FF1E0BFE160D90FE17331333230FCF00051E0B1633FF1E0D90CE0005FF1E2DFECE +:2084FA00160B90FE17071307230FCF00051E2D1607FF1E0B90CE0005FF1E0BFE160D90FEAB +:20851A0017151315230FCF00051E0B1615FF1E0D90CE0005FF1E0BFE5B388152037B066B8B +:20853A00037B03A1412603CC85FE7B03A1422603CC861A7B03A1432603CC86367B03A149D5 +:20855A002603CC868C7B03A14B2603CC86DF7B03A14C2603CC86FB7B03A14D2603CC871756 +:20857A007B03A14E2603CC87327B03A14F2603CC874D7B03A1592603CC87687B03A15A2694 +:20859A0003CC87827B03A161275A7B03A16227707B03A1632603CC86367B03A1692603CC20 +:2085BA00868C7B03A16B2603CC86DF7B03A16C2603CC86FB7B03A16D2603CC87177B03A16C +:2085DA006E2603CC87327B03A16F2603CC874D7B03A1792603CC87687B03A17A2603CC877D +:2085FA0082CC87A7AE8BCA89CD81505B02AE500FF6A5042704A6312002A6306B01CC879D5C +:20861A00AE8BD289CD81505B02AE500AF6A5402704A6312002A6306B01CC879DAE8BDA89DC +:20863A00CD81505B027B06A1632606A6016B0220020F020D022704A6302002A63188CD814E +:20865A0036844B3DCD8136840D022713AE5006F6A5102604A6312002A6306B01CC879DAEBB +:20867A005001F6A5022604A6312002A6306B01CC879DAE8BDD89CD81505B02AE00024B0206 +:20869A0089CD81865B03AE8BE789CD81505B02AE00304B0289CD81865B03AE8BEF89CD817C +:2086BA00505B02AE00324B0289CD81865B03AE8BF789CD81505B02CE00344B0289CD8186AB +:2086DA005B03CC87A7AE8BFD89CD81505B02AE5005F6A5202604A6312002A6306B01CC87F8 +:2086FA009DAE8C0489CD81505B02AE500AF6A5202704A6312002A6306B01CC879DAE8C0BA3 +:20871A0089CD81505B02AE500AF6A5082704A6312002A6306B01206BAE8C1289CD81505B51 +:20873A0002AE5000F6A5082704A6312002A6306B012050AE8C1889CD81505B02AE5000F6DC +:20875A00A5042704A6312002A6306B012035AE8C1E89CD81505B02AE500AF64D2A04A6316F +:20877A002002A6306B01201BAE8C2689CD81505B02AE500AF6A5102704A6312002A6306B44 +:20879A000120007B0188CD813684CD81445B038152235F1F0B1F09AEFFFF1F075F1F055F47 +:2087BA001F03AE8C2E1F01CD828ACD826F9A725D001A2744AE00081F0E5FC6000797587200 +:2087DA00FB0E90CE0002FFC600074CC70007A1092622725F00071E035C1F03CD82DA7B061D +:2087FA00891102857B058912018524021F05130724021F07725F001ACE001E72F00B1F1278 +:20881A00C6001D120A6B11C6001C12096B10AE00C713124F12114F12102433CE001E1F0B61 +:20883A00CE001C1F097B04C700357B03C700345F1F037B06C700317B05C700307B08C7005D +:20885A00337B07C700325F1F05AEFFFF1F07CE00222605CE0020273DCE001E72B000221F3F +:20887A0016C6001DC200216B15C6001CC200206B14AE006413164F12154F121424175FCFB0 +:20889A000022CF0020AE500AF6AA80F7AE8C3B89CD81505B02CE00262605CE0024273DCE52 +:2088BA00001E72B000261F1AC6001DC200256B19C6001CC200246B18AE0064131A4F1219AD +:2088DA004F121824175FCF0026CF0024AE500AF6AA10F7AE8C4589CD81505B02CE002A26B3 +:2088FA0005CE0028273DCE001E72B0002A1F1EC6001DC200296B1DC6001CC200286B1CAE33 +:20891A000064131E4F121D4F121C24175FCF002ACF0028AE500FF6A4FBF7AE8C4F89CD812A +:20893A00505B02CE002E2605CE002C273DCE001E72B0002E1F22C6001DC2002D6B21C6004A +:20895A001CC2002C6B20AE006413224F12214F122024175FCF002ECF002CAE500AF6A4BF2B +:20897A00F7AE8C5989CD81505B02961C000D89CD81705B024D2603CC87C87B0DA141260348 +:20899A00CC8A3CA1422603CC8A50A1432603CC8BBDA1492603CC8BBDA14B2603CC8A61A1C4 +:2089BA004C2603CC8A75A14D2603CC8A89A14E2603CC8A9DA14F2603CC8AB1A1532603CC53 +:2089DA008ABBA1592603CC8B0DA15A2603CC8B7EA1612744A1622754A1632603CC8BBDA1EB +:2089FA00692603CC8BBDA16B2756A16C2763A16D2773A16E2603CC8A93A16F2603CC8AA798 +:208A1A00A1732603CC8ABBA1792603CC8ACEA17A2603CC8B3ECC8BB1AE500FF6AA04F7CC32 +:208A3A008BBDAE500FF6A4FBF7CC8BBDAE500AF6AA40F7CC8BBDAE500AF6A4BFF7CC8BBDC8 +:208A5A00AE5005F6A4DFF7AE5005F6AA20F7CC8BBDAE500AF6AA20F7CC8BBDAE500AF6A446 +:208A7A00DFF7CC8BBDAE500AF6AA08F7CC8BBDAE500AF6A4F7F7CC8BBDAE5000F6AA08F7F6 +:208A9A00CC8BBDAE5000F6A4F7F7CC8BBDAE5000F6AA04F7CC8BBDAE5000F6A4FBF7CC8B80 +:208ABA00BD1E01F64D2603CC8BBD5C8988CD8535848520EFAE500FF6A5042707721E500A70 +:208ADA00CC8BBDAE500FF6AA04F790CE001ECE001C90CF0022CF0020CE0022260FCE0020D7 +:208AFA00260AAE0001CF00225FCF0020A6616B0DCC8BBDAE500FF6A504272290CE001ECE6C +:208B1A00001C90CF002ACF0028CE002A260FCE0028260AAE0001CF002A5FCF0028721F506D +:208B3A000ACC8BBDAE500AF6A5402709AE500AF6AA10F7206EAE500AF6AA40F790CE001E52 +:208B5A00CE001C90CF0026CF0024CE0026260FCE0024260AAE0001CF00265FCF0024A66250 +:208B7A006B0D203FAE500AF6A540272290CE001ECE001C90CF002ECF002CCE002E260FCEEB +:208B9A00002C260AAE0001CF002E5FCF002CAE500AF6A4EFF7200CAE8C6389CD81505B0284 +:208BBA00CC87C87B0D88CD853584CC87C85B23815452494143303D005452494143313D008A +:208BDA00496E0041444356414C55453D004144434D41583D004144434D494E3D004E50547C +:208BFA00533D00504B4559313D004E4B4559313D004E4B4559323D004F5554303D004F55D0 +:208C1A0054313D0052454C4159303D0052454C4159313D0061626343696B6C6D6E6F797ABD +:208C3A000052454C4159303D310A0052454C4159313D310A005452494143303D300A005461 +:208C5A0052494143313D300A000A50524F544F3A0A612F41202D207475726E206F6E2F6FAF +:208C7A006666207472696163300A622F42202D207475726E206F6E2F6F6666207472696161 +:208C9A0063310A632F43202D20636865636B20696E302F310A692F49202D2073686F77201C +:208CBA0063757272656E7420616D706C2E2028414455290A6B2F4B202D207365742F7265A6 +:208CDA0073657420504B4559310A6C2F4C202D207365742F7265736574204E4B4559310A16 +:208CFA006D2F4D202D207365742F7265736574204E4B4559320A6E2F6F202D2061637469B9 +:208D1A0076617465206F7574302F310A4E2F4F202D2064656163746976617465206F7574AC +:208D3A00302F310A732F53202D2073686F7720616C6C207374617469737469630A792F5900 +:208D5A00202D207475726E206F6E2F6F66662072656C6179300A7A2F5A202D207475726EAC +:108D7A00206F6E2F6F66662072656C6179310A000A +:1A8E560000000000000000000000000000000000000000000000FFFF000004 +:208D8A0052030F030F017B0A484F494D262E160C1E0A905859170C1F0A1E08130C7B07129C +:208DAA000B7B06120A240D160C1E0A549056170C1F0A20080C017B016B0320CA7B036B020C +:208DCA001E0872F00C7B07120B90977B06120A25061F0890951706160C1E0A549056170C57 +:208DEA001F0A7B020A024D26D71E0816065B038152065F1F051F03A6206B027B09484F49B8 +:208E0A006B01160B1E09905859170B1F0916051E0390585917051F030D0127067B06AA01E7 +:208E2A006B061E0572F00F7B04120E90977B03120D250C1F05909517037B0CAA016B0C0A79 +:0A8E4A000226B81E0B16095B068114 :00000001FF diff --git a/220controlled_socket/src/Readme b/220controlled_socket/src/Readme new file mode 100644 index 0000000..7056010 --- /dev/null +++ b/220controlled_socket/src/Readme @@ -0,0 +1,22 @@ +Protocol: +:B# +where B is a command +Commands: +a/A - turn on/off triac0 +b/B - turn on/off triac1 +c/C - check in0/1 +i/I - show current ampl. (ADU) +k/K - set/reset PKEY1 +l/L - set/reset NKEY1 +m/M - set/reset NKEY2 +n/o - activate out0/1 +N/O - deactivate out0/1 +s/S - show all statistic +y/Y - turn on/off relay0 +z/Z - turn on/off relay1 + + + + +Current sense: near 38ADU per 1A +Current error: near 20ADU @0A (difference between max & min ADU value) diff --git a/220controlled_socket/src/hardware.c b/220controlled_socket/src/hardware.c index 8836aba..6c479bd 100644 --- a/220controlled_socket/src/hardware.c +++ b/220controlled_socket/src/hardware.c @@ -58,12 +58,12 @@ void hw_init(){ // default state RESET_PKEY1(); + // PA: 1 - PU IN, 2,3 - PP OUT PA_DDR = GPIO_PIN2 | GPIO_PIN3; PA_CR1 = GPIO_PIN1 | GPIO_PIN2 | GPIO_PIN3; - // PB: 4 - PU IN, 5 - PP OUT with 1 in default state + // PB: 4 - IN with external pullup (have no int. PU), 5 - [true opendrain] OUT with 1 in default state PB_DDR = GPIO_PIN5; - PB_CR1 = GPIO_PIN4 | GPIO_PIN5; // PC: 3-7 - PP OUT PC_DDR = GPIO_PIN3 | GPIO_PIN4 | GPIO_PIN5 | GPIO_PIN6 | GPIO_PIN7; PC_CR1 = GPIO_PIN3 | GPIO_PIN4 | GPIO_PIN5 | GPIO_PIN6 | GPIO_PIN7; @@ -72,11 +72,11 @@ void hw_init(){ PD_CR1 = GPIO_PIN2; // configure ADC // select PD3[AIN4] & enable interrupt for EOC - ADC_CSR = 0x24; // 0x24 - AIN4 + ADC_CSR = 0x24; // EOCIE = 1; CH[3:0] = 4 - AIN4 ADC_TDRL = 0x10; // disable Schmitt triger for AIN4 // right alignment ADC_CR2 = 0x08; // don't forget: first read ADC_DRL! // f_{ADC} = f/18 & continuous non-buffered conversion & wake it up - ADC_CR1 = 0x71; // 0x71 - single, 0x73 - continuous - ADC_CR1 = 0x71; // turn on ADC (this needs second write operation) + ADC_CR1 = 0x73; // 0x71 - single, 0x73 - continuous + ADC_CR1 = 0x73; // turn on ADC (this needs second write operation) } diff --git a/220controlled_socket/src/interrupts.c b/220controlled_socket/src/interrupts.c index 58bc219..c31e52e 100644 --- a/220controlled_socket/src/interrupts.c +++ b/220controlled_socket/src/interrupts.c @@ -85,34 +85,7 @@ INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){ } // Timer2 Capture/Compare Interrupt -// manage with sending/receiving INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){ -/* TIM2_SR1 &= ~TIM_SR1_CC1IF; - onewire_gotlen = TIM2_CCR1H << 8; - onewire_gotlen |= TIM2_CCR1L; - if(onewire_tick_ctr){ // there's some more data to transmit / receive - --onewire_tick_ctr; - if(is_receiver){// receive bits - ow_data >>= 1; - if(onewire_gotlen < ONE_ZERO_BARRIER){ // this is 1 - ow_data |= 0x80; // LSbit first! - } - // in receiver mode we don't need to send byte after ctr is zero! - if(onewire_tick_ctr == 0){ - TIM2_CR1 &= ~TIM_CR1_CEN; - } - }else{// transmit bits - // update CCR2 registers with new values - if(ow_data & 1){ // transmit 1 - TIM2REG(CCR2, BIT_ONE_P); - }else{ // transmit 0 - TIM2REG(CCR2, BIT_ZERO_P); - } - ow_data >>= 1; - } - }else{ // end: turn off timer - TIM2_CR1 &= ~TIM_CR1_CEN; - }*/ } #endif // STM8S903 @@ -133,16 +106,19 @@ INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){} // UART1 RX Interrupt INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){ U8 rb; + static U8 cmd_begin = 0; if(UART1_SR & UART_SR_RXNE){ // data received rb = UART1_DR; // read received byte & clear RXNE flag - while(!(UART1_SR & UART_SR_TXE)); - UART1_DR = rb; // echo received symbol - UART_rx[UART_rx_cur_i++] = rb; // put received byte into cycled buffer - if(UART_rx_cur_i == UART_rx_start_i){ // Oops: buffer overflow! Just forget old data - UART_rx_start_i++; - check_UART_pointer(UART_rx_start_i); + if(uart_ready) return; // omit everything before command read + if(!cmd_begin){ + if(rb == ':') cmd_begin = 1; + return; + } + if(rb != '#') UART_rx_cmd = rb; // put received byte into cycled buffer + else{ + cmd_begin = 0; + uart_ready = 1; } - check_UART_pointer(UART_rx_cur_i); } } #endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax @@ -173,12 +149,12 @@ INTERRUPT_HANDLER(ADC2_IRQHandler, 22){} #else // ADC1 interrupt volatile U8 ADC_ready = 0; -volatile U8 ADC_value; -INTERRUPT_HANDLER(ADC1_IRQHandler, 22){ // fill circular buffer - int ADC_value = ADC_DRL; // in right-alignment mode we should first read LSB +volatile int ADC_value; +INTERRUPT_HANDLER(ADC1_IRQHandler, 22){ // read ADC value + ADC_value = ADC_DRL; // in right-alignment mode we should first read LSB ADC_value |= ADC_DRH << 8; ADC_ready = 1; - ADC_CSR &= 0x3f; // clear EOC & AWD flags + ADC_CSR &= 0x3f; // clear EOC flag } #endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax diff --git a/220controlled_socket/src/main.c b/220controlled_socket/src/main.c index 0e85b0e..941de1a 100644 --- a/220controlled_socket/src/main.c +++ b/220controlled_socket/src/main.c @@ -26,7 +26,8 @@ volatile unsigned long Global_time = 0L; // global time in ms unsigned long Relay0 = 0L, Relay1 = 0L; // timer for relay ON (after triac is on) unsigned long Triac0 = 0L, Triac1 = 0L; // timer for triac OFF (after relay is off) - +U16 lastMax = 0, lastMin = 0xffff; // min & max of current in ADU +U16 npts = 0; // number of ADC measurement points U16 temp; U8 pidx; @@ -43,42 +44,94 @@ U16 opt_med9(){ PIX_SORT(p[4], p[2]) ; return(p[4]) ; } -static void triac_ONOFF(U8 cmd){ +// show current values of in/out +static void show_stat(U8 cmd){ U8 ch; - uart_write("TRIAC"); - switch (cmd){ - case 'a': // turn ON triac0 - case 'A': // turn OFF triac0 - ch = (cmd == 'a') ? '1' : '0'; - uart_write("0="); - uart_send_byte(ch); - if(cmd == 'a') SET_TRIAC0(); - else RESET_TRIAC0(); + switch(cmd){ + case 'a': + case 'A': + uart_write("TRIAC0="); + ch = CHK_TRIAC0() ? '1' : '0'; break; - case 'b': // turn ON triac1 - case 'B': // turn OFF triac1 - ch = (cmd == 'a') ? '1' : '0'; - uart_write("1="); - uart_send_byte(ch); - if(cmd == 'b') SET_TRIAC1(); - else RESET_TRIAC1(); + case 'b': + case 'B': + uart_write("TRIAC1="); + ch = CHK_TRIAC1() ? '1' : '0'; break; + case 'c': + case 'C': + uart_write("In"); + ch = (cmd == 'c') ? '0' : '1'; + uart_send_byte(ch); + uart_send_byte('='); + if(cmd == 'c') ch = CHK_IN0() ? '1' : '0'; + else ch = CHK_IN1() ? '1' : '0'; + break; + case 'i': + case 'I': + uart_write("ADCVALUE="); + printUint((U8*)&ADC_value, 2); + uart_write("ADCMAX="); + printUint((U8*)&lastMax, 2); + uart_write("ADCMIN="); + printUint((U8*)&lastMin, 2); + uart_write("NPTS="); + printUint((U8*)npts, 2); + return; + break; + case 'k': + case 'K': + uart_write("PKEY1="); + ch = CHK_PKEY1() ? '1' : '0'; + break; + case 'l': + case 'L': + uart_write("NKEY1="); + ch = CHK_NKEY1() ? '1' : '0'; + break; + case 'm': + case 'M': + uart_write("NKEY2="); + ch = CHK_NKEY2() ? '1' : '0'; + break; + case 'n': + case 'N': + uart_write("OUT0="); + ch = CHK_OUT0() ? '1' : '0'; + break; + case 'o': + case 'O': + uart_write("OUT1="); + ch = CHK_OUT1() ? '1' : '0'; + break; + case 'y': + case 'Y': + uart_write("RELAY0="); + ch = CHK_RELAY0() ? '1' : '0'; + break; + case 'z': + case 'Z': + uart_write("RELAY1="); + ch = CHK_RELAY1() ? '1' : '0'; + break; + default: + return; } + uart_send_byte(ch); newline(); } int main() { unsigned long Tmeas = 0L; // I measurement time - U16 curMin = 0xffff, curMax = 0, curRange = 0; // min, max & range measured of current in ADU - U8 rb, ch; - U16 curval, npts = 0, nmeas = 0; + U16 curMin = 0xffff, curMax = 0; // min & max of current in ADU + U8 rb; + U16 curval, nmeas = 0; + const char * const allstatcmds = "abcCiklmnoyz"; + const char *ch; hw_init(); - uart_init(); - // enable all interrupts enableInterrupts(); - // Loop do{ if(ADC_ready){ @@ -92,13 +145,14 @@ int main() { if(curMin > curval) curMin = curval; } ADC_ready = 0; - ADC_CR1 = 0x71; + //ADC_CR1 = 0x71; // start measurement again } if(Global_time - Tmeas > 199){ // 10 periods past, make current measurement Tmeas = Global_time; npts = nmeas; nmeas = 0; - if(curMax) curRange = curMax - curMin; + lastMax = curMax; + lastMin = curMin; curMax = 0; curMin = 0xffff; } if(Relay0){ @@ -130,127 +184,120 @@ int main() { } } - if(uart_read_byte(&rb)){ // buffer isn't empty + if(uart_read_cmd(&rb)){ // buffer isn't empty switch(rb){ case 'a': // turn ON triac0 + SET_TRIAC0(); + break; case 'A': // turn OFF triac0 + RESET_TRIAC0(); + break; case 'b': // turn ON triac1 + SET_TRIAC1(); + break; case 'B': // turn OFF triac1 - triac_ONOFF(rb); - break; - case 'h': // help - case 'H': - uart_write( "\nPROTO:\n" - "a/A - turn on/off triac0\n" - "b/B - turn on/off triac1\n" - "c/C - check in0/1\n" - "I - show current ampl. (ADU)\n" - "k/K - set/reset PKEY1\n" - "l/L - set/reset NKEY1\n" - "m/M - set/reset NKEY2\n" - "r/R - deactivate out0/1\n" - "s/S - activate out0/1\n" - "y/Y - turn on/off relay0\n" - "z/Z - turn on/off relay1\n" - ); - break; - case 'I': // current amplitude in ADU - curval = curRange / 2; - uart_write("Imax(ADU)="); - printUint((U8*)&curval, 2); - uart_write(", Npts="); - printUint((U8*)npts, 2); - newline(); + RESET_TRIAC1(); break; case 'c': // check IN0 case 'C': // check IN1 - uart_write("In"); - ch = (rb == 'c') ? '0' : '1'; - uart_send_byte(ch); - uart_send_byte('='); - if(rb == 'c') ch = CHK_IN0() ? '1' : '0'; - else ch = CHK_IN1() ? '1' : '0'; - uart_send_byte(ch); - newline(); - break; - case 's': // activate OUT0 - case 'r': // activate OUT1 - ch = (rb == 's') ? '0' : '1'; - uart_write("Out"); - uart_send_byte(ch); - uart_write("=1\n"); - if(rb == 's') SET_OUT0(); - else SET_OUT1(); - break; - case 'S': // deactivate OUT0 - case 'R': // deactivate OUT1 - ch = (rb == 'S') ? '0' : '1'; - uart_write("Out"); - uart_send_byte(ch); - uart_write("=0\n"); - if(rb == 'S') RESET_OUT0(); - else RESET_OUT1(); - break; + case 'I': // current amplitude in ADU + case 'i': // --//-- + break; // this is OK: show later case 'k': // activate PKEY1 + SET_PKEY1(); case 'K': // deactivate PKEY1 - uart_write("PKEY1="); - ch = (rb == 'k') ? '1' : '0'; - uart_send_byte(ch); - if(rb == 'k') SET_PKEY1(); - else RESET_PKEY1(); - newline(); + RESET_PKEY1(); break; case 'l': // activate NKEY1 + SET_NKEY1(); + break; case 'L': // deactivate NKEY1 - uart_write("NKEY1="); - ch = (rb == 'l') ? '1' : '0'; - uart_send_byte(ch); - if(rb == 'l') SET_NKEY1(); - else RESET_NKEY1(); - newline(); + RESET_NKEY1(); break; case 'm': // activate NKEY2 + SET_NKEY2(); + break; case 'M': // deactivate NKEY2 - uart_write("NKEY2="); - ch = (rb == 'm') ? '1' : '0'; - uart_send_byte(ch); - if(rb == 'm') SET_NKEY2(); - else RESET_NKEY2(); - newline(); + RESET_NKEY2(); + break; + case 'n': // activate OUT0 + SET_OUT0(); + break; + case 'N': // deactivate OUT0 + RESET_OUT0(); + break; + case 'o': // activate OUT1 + SET_OUT1(); + break; + case 'O': // deactivate OUT1 + RESET_OUT1(); + break; + case 's': // all statistics + case 'S': + ch = allstatcmds; + while(*ch){ + show_stat(*ch++); + } break; case 'y': // relay 0 ON if(CHK_TRIAC0()) SET_RELAY0(); else{ - triac_ONOFF('a'); + SET_TRIAC0(); Relay0 = Global_time; if(!Relay0) Relay0 = 1; + rb = 'a'; // change value to display triac state } break; case 'Y': // relay 0 OFF - SET_TRIAC0(); - Triac0 = Global_time; - if(!Triac0) Triac0 = 1; + if(CHK_TRIAC0()){ // triac ON - turn it off after small delay + Triac0 = Global_time; + if(!Triac0) Triac0 = 1; + } RESET_RELAY0(); - uart_write("RELAY0=0\n"); break; case 'z': // relay 1 ON if(CHK_TRIAC1()) SET_RELAY1(); else{ - triac_ONOFF('b'); + SET_TRIAC1(); Relay1 = Global_time; if(!Relay1) Relay1 = 1; + rb = 'b'; } break; case 'Z': // relay 1 OFF - SET_TRIAC1(); - Triac1 = Global_time; - if(!Triac1) Triac1 = 1; + if(CHK_TRIAC1()){ + Triac1 = Global_time; + if(!Triac1) Triac1 = 1; + } RESET_RELAY1(); - uart_write("RELAY1=0\n"); break; + default: + uart_write( "\nPROTO:\n" + "a/A - turn on/off triac0\n" + "b/B - turn on/off triac1\n" + "c/C - check in0/1\n" + "i/I - show current ampl. (ADU)\n" + "k/K - set/reset PKEY1\n" + "l/L - set/reset NKEY1\n" + "m/M - set/reset NKEY2\n" + "n/o - activate out0/1\n" + "N/O - deactivate out0/1\n" + "s/S - show all statistic\n" + "y/Y - turn on/off relay0\n" + "z/Z - turn on/off relay1\n" + ); + continue; } + show_stat(rb); } }while(1); } + +/* + * errors: + * IN1 = 0 - need 2 add ext.PU (no int) + * ADCMAX=99, ADCMIN=99, NPTS=25706 + * k/K pkey1=0 - need 2 add ext.PU (true opendrain) + */ diff --git a/220controlled_socket/src/stm8s.h b/220controlled_socket/src/stm8s.h index cee5f59..b52bc7d 100644 --- a/220controlled_socket/src/stm8s.h +++ b/220controlled_socket/src/stm8s.h @@ -103,74 +103,74 @@ typedef unsigned long U32; #endif // STM8S105 /* GPIO bits */ -#define GPIO_PIN0 (1 << 0) -#define GPIO_PIN1 (1 << 1) -#define GPIO_PIN2 (1 << 2) -#define GPIO_PIN3 (1 << 3) -#define GPIO_PIN4 (1 << 4) -#define GPIO_PIN5 (1 << 5) -#define GPIO_PIN6 (1 << 6) -#define GPIO_PIN7 (1 << 7) +#define GPIO_PIN0 (1 << 0) +#define GPIO_PIN1 (1 << 1) +#define GPIO_PIN2 (1 << 2) +#define GPIO_PIN3 (1 << 3) +#define GPIO_PIN4 (1 << 4) +#define GPIO_PIN5 (1 << 5) +#define GPIO_PIN6 (1 << 6) +#define GPIO_PIN7 (1 << 7) /* -------------------- FLASH/EEPROM -------------------- */ -#define FLASH_CR1 *(unsigned char*)0x505A -#define FLASH_CR2 *(unsigned char*)0x505B -#define FLASH_NCR2 *(unsigned char*)0x505C -#define FLASH_FPR *(unsigned char*)0x505D -#define FLASH_NFPR *(unsigned char*)0x505E -#define FLASH_IAPSR *(unsigned char*)0x505F -#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection -#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection +#define FLASH_CR1 *(unsigned char*)0x505A +#define FLASH_CR2 *(unsigned char*)0x505B +#define FLASH_NCR2 *(unsigned char*)0x505C +#define FLASH_FPR *(unsigned char*)0x505D +#define FLASH_NFPR *(unsigned char*)0x505E +#define FLASH_IAPSR *(unsigned char*)0x505F +#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection +#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection -#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access -#define EEPROM_KEY2 0x56 +#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access +#define EEPROM_KEY2 0x56 #define EEPROM_START_ADDR (unsigned char*)0x4000 /* ------------------- interrupts ------------------- */ -#define EXTI_CR1 *(unsigned char*)0x50A0 -#define EXTI_CR2 *(unsigned char*)0x50A1 -#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num) -#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num) +#define EXTI_CR1 *(unsigned char*)0x50A0 +#define EXTI_CR2 *(unsigned char*)0x50A1 +#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num) +#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num) // Reset status register -#define RST_SR *(unsigned char*)0x50B3 +#define RST_SR *(unsigned char*)0x50B3 /* ------------------- CLOCK ------------------- */ -#define CLK_ICKR *(unsigned char*)0x50C0 -#define CLK_ECKR *(unsigned char*)0x50C1 -#define CLK_CMSR *(unsigned char*)0x50C3 -#define CLK_SWR *(unsigned char*)0x50C4 -#define CLK_SWCR *(unsigned char*)0x50C5 -#define CLK_CKDIVR *(unsigned char*)0x50C6 -#define CLK_SPCKENR1 *(unsigned char*)0x50C7 -#define CLK_CSSR *(unsigned char*)0x50C8 -#define CLK_CCOR *(unsigned char*)0x50C9 -#define CLK_PCKENR2 *(unsigned char*)0x50CA -#define CLK_HSITRIMR *(unsigned char*)0x50CC -#define CLK_SWIMCCR *(unsigned char*)0x50CD +#define CLK_ICKR *(unsigned char*)0x50C0 +#define CLK_ECKR *(unsigned char*)0x50C1 +#define CLK_CMSR *(unsigned char*)0x50C3 +#define CLK_SWR *(unsigned char*)0x50C4 +#define CLK_SWCR *(unsigned char*)0x50C5 +#define CLK_CKDIVR *(unsigned char*)0x50C6 +#define CLK_SPCKENR1 *(unsigned char*)0x50C7 +#define CLK_CSSR *(unsigned char*)0x50C8 +#define CLK_CCOR *(unsigned char*)0x50C9 +#define CLK_PCKENR2 *(unsigned char*)0x50CA +#define CLK_HSITRIMR *(unsigned char*)0x50CC +#define CLK_SWIMCCR *(unsigned char*)0x50CD /* ------------------- Watchdog ------------------ */ -#define WWDG_CR *(unsigned char*)0x50D1 -#define WWDG_WR *(unsigned char*)0x50D2 -#define IWDG_KR *(unsigned char*)0x50E0 -#define IWDG_PR *(unsigned char*)0x50E1 -#define IWDG_RLR *(unsigned char*)0x50E2 +#define WWDG_CR *(unsigned char*)0x50D1 +#define WWDG_WR *(unsigned char*)0x50D2 +#define IWDG_KR *(unsigned char*)0x50E0 +#define IWDG_PR *(unsigned char*)0x50E1 +#define IWDG_RLR *(unsigned char*)0x50E2 /* ------------------- AWU, BEEP ------------------- */ -#define AWU_CSR1 *(unsigned char*)0x50F0 -#define AWU_APR *(unsigned char*)0x50F1 -#define AWU_TBR *(unsigned char*)0x50F2 -#define BEEP_CSR *(unsigned char*)0x50F3 +#define AWU_CSR1 *(unsigned char*)0x50F0 +#define AWU_APR *(unsigned char*)0x50F1 +#define AWU_TBR *(unsigned char*)0x50F2 +#define BEEP_CSR *(unsigned char*)0x50F3 /* ------------------- SPI ------------------- */ -#define SPI_CR1 *(unsigned char*)0x5200 -#define SPI_CR2 *(unsigned char*)0x5201 -#define SPI_ICR *(unsigned char*)0x5202 -#define SPI_SR *(unsigned char*)0x5203 -#define SPI_DR *(unsigned char*)0x5204 -#define SPI_CRCPR *(unsigned char*)0x5205 -#define SPI_RXCRCR *(unsigned char*)0x5206 -#define SPI_TXCRCR *(unsigned char*)0x5207 +#define SPI_CR1 *(unsigned char*)0x5200 +#define SPI_CR2 *(unsigned char*)0x5201 +#define SPI_ICR *(unsigned char*)0x5202 +#define SPI_SR *(unsigned char*)0x5203 +#define SPI_DR *(unsigned char*)0x5204 +#define SPI_CRCPR *(unsigned char*)0x5205 +#define SPI_RXCRCR *(unsigned char*)0x5206 +#define SPI_TXCRCR *(unsigned char*)0x5207 // SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA | #define SPI_CR1_LSBFIRST (1<<7) #define SPI_CR1_SPE (1<<6) @@ -201,48 +201,48 @@ typedef unsigned long U32; #define SPI_SR_RXNE (1) /* ------------------- I2C ------------------- */ -#define I2C_CR1 *(unsigned char*)0x5210 -#define I2C_CR2 *(unsigned char*)0x5211 -#define I2C_FREQR *(unsigned char*)0x5212 -#define I2C_OARL *(unsigned char*)0x5213 -#define I2C_OARH *(unsigned char*)0x5214 -#define I2C_DR *(unsigned char*)0x5216 -#define I2C_SR1 *(unsigned char*)0x5217 -#define I2C_SR2 *(unsigned char*)0x5218 -#define I2C_SR3 *(unsigned char*)0x5219 -#define I2C_ITR *(unsigned char*)0x521A -#define I2C_CCRL *(unsigned char*)0x521B -#define I2C_CCRH *(unsigned char*)0x521C -#define I2C_TRISER *(unsigned char*)0x521D -#define I2C_PECR *(unsigned char*)0x521E +#define I2C_CR1 *(unsigned char*)0x5210 +#define I2C_CR2 *(unsigned char*)0x5211 +#define I2C_FREQR *(unsigned char*)0x5212 +#define I2C_OARL *(unsigned char*)0x5213 +#define I2C_OARH *(unsigned char*)0x5214 +#define I2C_DR *(unsigned char*)0x5216 +#define I2C_SR1 *(unsigned char*)0x5217 +#define I2C_SR2 *(unsigned char*)0x5218 +#define I2C_SR3 *(unsigned char*)0x5219 +#define I2C_ITR *(unsigned char*)0x521A +#define I2C_CCRL *(unsigned char*)0x521B +#define I2C_CCRH *(unsigned char*)0x521C +#define I2C_TRISER *(unsigned char*)0x521D +#define I2C_PECR *(unsigned char*)0x521E /* ------------------- UART ------------------- */ -#ifdef STM8S003 -#define UART1_SR *(unsigned char*)0x5230 -#define UART1_DR *(unsigned char*)0x5231 -#define UART1_BRR1 *(unsigned char*)0x5232 -#define UART1_BRR2 *(unsigned char*)0x5233 -#define UART1_CR1 *(unsigned char*)0x5234 -#define UART1_CR2 *(unsigned char*)0x5235 -#define UART1_CR3 *(unsigned char*)0x5236 -#define UART1_CR4 *(unsigned char*)0x5237 -#define UART1_CR5 *(unsigned char*)0x5238 -#define UART1_GTR *(unsigned char*)0x5239 -#define UART1_PSCR *(unsigned char*)0x523A +#if defined STM8S003 || defined STM8S103 +#define UART1_SR *(unsigned char*)0x5230 +#define UART1_DR *(unsigned char*)0x5231 +#define UART1_BRR1 *(unsigned char*)0x5232 +#define UART1_BRR2 *(unsigned char*)0x5233 +#define UART1_CR1 *(unsigned char*)0x5234 +#define UART1_CR2 *(unsigned char*)0x5235 +#define UART1_CR3 *(unsigned char*)0x5236 +#define UART1_CR4 *(unsigned char*)0x5237 +#define UART1_CR5 *(unsigned char*)0x5238 +#define UART1_GTR *(unsigned char*)0x5239 +#define UART1_PSCR *(unsigned char*)0x523A #endif // STM8S003 #ifdef STM8S105 -#define UART2_SR *(unsigned char*)0x5240 -#define UART2_DR *(unsigned char*)0x5241 -#define UART2_BRR1 *(unsigned char*)0x5242 -#define UART2_BRR2 *(unsigned char*)0x5243 -#define UART2_CR1 *(unsigned char*)0x5244 -#define UART2_CR2 *(unsigned char*)0x5245 -#define UART2_CR3 *(unsigned char*)0x5246 -#define UART2_CR4 *(unsigned char*)0x5247 -#define UART2_CR5 *(unsigned char*)0x5248 -#define UART2_CR6 *(unsigned char*)0x5249 -#define UART2_GTR *(unsigned char*)0x524A -#define UART2_PSCR *(unsigned char*)0x524B +#define UART2_SR *(unsigned char*)0x5240 +#define UART2_DR *(unsigned char*)0x5241 +#define UART2_BRR1 *(unsigned char*)0x5242 +#define UART2_BRR2 *(unsigned char*)0x5243 +#define UART2_CR1 *(unsigned char*)0x5244 +#define UART2_CR2 *(unsigned char*)0x5245 +#define UART2_CR3 *(unsigned char*)0x5246 +#define UART2_CR4 *(unsigned char*)0x5247 +#define UART2_CR5 *(unsigned char*)0x5248 +#define UART2_CR6 *(unsigned char*)0x5249 +#define UART2_GTR *(unsigned char*)0x524A +#define UART2_PSCR *(unsigned char*)0x524B #endif // STM8S105 /* UART_CR1 bits */ @@ -287,38 +287,38 @@ typedef unsigned long U32; /* ------------------- TIMERS ------------------- */ /* TIM1 */ -#define TIM1_CR1 *(unsigned char*)0x5250 -#define TIM1_CR2 *(unsigned char*)0x5251 -#define TIM1_SMCR *(unsigned char*)0x5252 -#define TIM1_ETR *(unsigned char*)0x5253 -#define TIM1_IER *(unsigned char*)0x5254 -#define TIM1_SR1 *(unsigned char*)0x5255 -#define TIM1_SR2 *(unsigned char*)0x5256 -#define TIM1_EGR *(unsigned char*)0x5257 -#define TIM1_CCMR1 *(unsigned char*)0x5258 -#define TIM1_CCMR2 *(unsigned char*)0x5259 -#define TIM1_CCMR3 *(unsigned char*)0x525A -#define TIM1_CCMR4 *(unsigned char*)0x525B -#define TIM1_CCER1 *(unsigned char*)0x525C -#define TIM1_CCER2 *(unsigned char*)0x525D -#define TIM1_CNTRH *(unsigned char*)0x525E -#define TIM1_CNTRL *(unsigned char*)0x525F -#define TIM1_PSCRH *(unsigned char*)0x5260 -#define TIM1_PSCRL *(unsigned char*)0x5261 -#define TIM1_ARRH *(unsigned char*)0x5262 -#define TIM1_ARRL *(unsigned char*)0x5263 -#define TIM1_RCR *(unsigned char*)0x5264 -#define TIM1_CCR1H *(unsigned char*)0x5265 -#define TIM1_CCR1L *(unsigned char*)0x5266 -#define TIM1_CCR2H *(unsigned char*)0x5267 -#define TIM1_CCR2L *(unsigned char*)0x5268 -#define TIM1_CCR3H *(unsigned char*)0x5269 -#define TIM1_CCR3L *(unsigned char*)0x526A -#define TIM1_CCR4H *(unsigned char*)0x526B -#define TIM1_CCR4L *(unsigned char*)0x526C -#define TIM1_BKR *(unsigned char*)0x526D -#define TIM1_DTR *(unsigned char*)0x526E -#define TIM1_OISR *(unsigned char*)0x526F +#define TIM1_CR1 *(unsigned char*)0x5250 +#define TIM1_CR2 *(unsigned char*)0x5251 +#define TIM1_SMCR *(unsigned char*)0x5252 +#define TIM1_ETR *(unsigned char*)0x5253 +#define TIM1_IER *(unsigned char*)0x5254 +#define TIM1_SR1 *(unsigned char*)0x5255 +#define TIM1_SR2 *(unsigned char*)0x5256 +#define TIM1_EGR *(unsigned char*)0x5257 +#define TIM1_CCMR1 *(unsigned char*)0x5258 +#define TIM1_CCMR2 *(unsigned char*)0x5259 +#define TIM1_CCMR3 *(unsigned char*)0x525A +#define TIM1_CCMR4 *(unsigned char*)0x525B +#define TIM1_CCER1 *(unsigned char*)0x525C +#define TIM1_CCER2 *(unsigned char*)0x525D +#define TIM1_CNTRH *(unsigned char*)0x525E +#define TIM1_CNTRL *(unsigned char*)0x525F +#define TIM1_PSCRH *(unsigned char*)0x5260 +#define TIM1_PSCRL *(unsigned char*)0x5261 +#define TIM1_ARRH *(unsigned char*)0x5262 +#define TIM1_ARRL *(unsigned char*)0x5263 +#define TIM1_RCR *(unsigned char*)0x5264 +#define TIM1_CCR1H *(unsigned char*)0x5265 +#define TIM1_CCR1L *(unsigned char*)0x5266 +#define TIM1_CCR2H *(unsigned char*)0x5267 +#define TIM1_CCR2L *(unsigned char*)0x5268 +#define TIM1_CCR3H *(unsigned char*)0x5269 +#define TIM1_CCR3L *(unsigned char*)0x526A +#define TIM1_CCR4H *(unsigned char*)0x526B +#define TIM1_CCR4L *(unsigned char*)0x526C +#define TIM1_BKR *(unsigned char*)0x526D +#define TIM1_DTR *(unsigned char*)0x526E +#define TIM1_OISR *(unsigned char*)0x526F /* TIM_IER bits */ @@ -363,199 +363,199 @@ typedef unsigned long U32; /* TIM2 */ -#define TIM2_CR1 *(unsigned char*)0x5300 +#define TIM2_CR1 *(unsigned char*)0x5300 #if defined STM8S105 || defined STM8S103 -#define TIM2_IER *(unsigned char*)0x5301 -#define TIM2_SR1 *(unsigned char*)0x5302 -#define TIM2_SR2 *(unsigned char*)0x5303 -#define TIM2_EGR *(unsigned char*)0x5304 -#define TIM2_CCMR1 *(unsigned char*)0x5305 -#define TIM2_CCMR2 *(unsigned char*)0x5306 -#define TIM2_CCMR3 *(unsigned char*)0x5307 -#define TIM2_CCER1 *(unsigned char*)0x5308 -#define TIM2_CCER2 *(unsigned char*)0x5309 -#define TIM2_CNTRH *(unsigned char*)0x530A -#define TIM2_CNTRL *(unsigned char*)0x530B -#define TIM2_PSCR *(unsigned char*)0x530C -#define TIM2_ARRH *(unsigned char*)0x530D -#define TIM2_ARRL *(unsigned char*)0x530E -#define TIM2_CCR1H *(unsigned char*)0x530F -#define TIM2_CCR1L *(unsigned char*)0x5310 -#define TIM2_CCR2H *(unsigned char*)0x5311 -#define TIM2_CCR2L *(unsigned char*)0x5312 -#define TIM2_CCR3H *(unsigned char*)0x5313 -#define TIM2_CCR3L *(unsigned char*)0x5314 +#define TIM2_IER *(unsigned char*)0x5301 +#define TIM2_SR1 *(unsigned char*)0x5302 +#define TIM2_SR2 *(unsigned char*)0x5303 +#define TIM2_EGR *(unsigned char*)0x5304 +#define TIM2_CCMR1 *(unsigned char*)0x5305 +#define TIM2_CCMR2 *(unsigned char*)0x5306 +#define TIM2_CCMR3 *(unsigned char*)0x5307 +#define TIM2_CCER1 *(unsigned char*)0x5308 +#define TIM2_CCER2 *(unsigned char*)0x5309 +#define TIM2_CNTRH *(unsigned char*)0x530A +#define TIM2_CNTRL *(unsigned char*)0x530B +#define TIM2_PSCR *(unsigned char*)0x530C +#define TIM2_ARRH *(unsigned char*)0x530D +#define TIM2_ARRL *(unsigned char*)0x530E +#define TIM2_CCR1H *(unsigned char*)0x530F +#define TIM2_CCR1L *(unsigned char*)0x5310 +#define TIM2_CCR2H *(unsigned char*)0x5311 +#define TIM2_CCR2L *(unsigned char*)0x5312 +#define TIM2_CCR3H *(unsigned char*)0x5313 +#define TIM2_CCR3L *(unsigned char*)0x5314 #elif defined STM8S003 -#define TIM2_IER *(unsigned char*)0x5303 -#define TIM2_SR1 *(unsigned char*)0x5304 -#define TIM2_SR2 *(unsigned char*)0x5305 -#define TIM2_EGR *(unsigned char*)0x5306 -#define TIM2_CCMR1 *(unsigned char*)0x5307 -#define TIM2_CCMR2 *(unsigned char*)0x5308 -#define TIM2_CCMR3 *(unsigned char*)0x5309 -#define TIM2_CCER1 *(unsigned char*)0x530A -#define TIM2_CCER2 *(unsigned char*)0x530B -#define TIM2_CNTRH *(unsigned char*)0x530C -#define TIM2_CNTRL *(unsigned char*)0x530D -#define TIM2_PSCR *(unsigned char*)0x530E -#define TIM2_ARRH *(unsigned char*)0x530F -#define TIM2_ARRL *(unsigned char*)0x5310 -#define TIM2_CCR1H *(unsigned char*)0x5311 -#define TIM2_CCR1L *(unsigned char*)0x5312 -#define TIM2_CCR2H *(unsigned char*)0x5313 -#define TIM2_CCR2L *(unsigned char*)0x5314 -#define TIM2_CCR3H *(unsigned char*)0x5315 -#define TIM2_CCR3L *(unsigned char*)0x5316 +#define TIM2_IER *(unsigned char*)0x5303 +#define TIM2_SR1 *(unsigned char*)0x5304 +#define TIM2_SR2 *(unsigned char*)0x5305 +#define TIM2_EGR *(unsigned char*)0x5306 +#define TIM2_CCMR1 *(unsigned char*)0x5307 +#define TIM2_CCMR2 *(unsigned char*)0x5308 +#define TIM2_CCMR3 *(unsigned char*)0x5309 +#define TIM2_CCER1 *(unsigned char*)0x530A +#define TIM2_CCER2 *(unsigned char*)0x530B +#define TIM2_CNTRH *(unsigned char*)0x530C +#define TIM2_CNTRL *(unsigned char*)0x530D +#define TIM2_PSCR *(unsigned char*)0x530E +#define TIM2_ARRH *(unsigned char*)0x530F +#define TIM2_ARRL *(unsigned char*)0x5310 +#define TIM2_CCR1H *(unsigned char*)0x5311 +#define TIM2_CCR1L *(unsigned char*)0x5312 +#define TIM2_CCR2H *(unsigned char*)0x5313 +#define TIM2_CCR2L *(unsigned char*)0x5314 +#define TIM2_CCR3H *(unsigned char*)0x5315 +#define TIM2_CCR3L *(unsigned char*)0x5316 #endif /* TIM3 */ #if defined STM8S105 || defined STM8S103 -#define TIM3_CR1 *(unsigned char*)0x5320 -#define TIM3_IER *(unsigned char*)0x5321 -#define TIM3_SR1 *(unsigned char*)0x5322 -#define TIM3_SR2 *(unsigned char*)0x5323 -#define TIM3_EGR *(unsigned char*)0x5324 -#define TIM3_CCMR1 *(unsigned char*)0x5325 -#define TIM3_CCMR2 *(unsigned char*)0x5326 -#define TIM3_CCER1 *(unsigned char*)0x5327 -#define TIM3_CNTRH *(unsigned char*)0x5328 -#define TIM3_CNTRL *(unsigned char*)0x5329 -#define TIM3_PSCR *(unsigned char*)0x532A -#define TIM3_ARRH *(unsigned char*)0x532B -#define TIM3_ARRL *(unsigned char*)0x532C -#define TIM3_CCR1H *(unsigned char*)0x532D -#define TIM3_CCR1L *(unsigned char*)0x532E -#define TIM3_CCR2H *(unsigned char*)0x532F -#define TIM3_CCR2L *(unsigned char*)0x5330 +#define TIM3_CR1 *(unsigned char*)0x5320 +#define TIM3_IER *(unsigned char*)0x5321 +#define TIM3_SR1 *(unsigned char*)0x5322 +#define TIM3_SR2 *(unsigned char*)0x5323 +#define TIM3_EGR *(unsigned char*)0x5324 +#define TIM3_CCMR1 *(unsigned char*)0x5325 +#define TIM3_CCMR2 *(unsigned char*)0x5326 +#define TIM3_CCER1 *(unsigned char*)0x5327 +#define TIM3_CNTRH *(unsigned char*)0x5328 +#define TIM3_CNTRL *(unsigned char*)0x5329 +#define TIM3_PSCR *(unsigned char*)0x532A +#define TIM3_ARRH *(unsigned char*)0x532B +#define TIM3_ARRL *(unsigned char*)0x532C +#define TIM3_CCR1H *(unsigned char*)0x532D +#define TIM3_CCR1L *(unsigned char*)0x532E +#define TIM3_CCR2H *(unsigned char*)0x532F +#define TIM3_CCR2L *(unsigned char*)0x5330 #endif /* TIM4 */ -#define TIM4_CR1 *(unsigned char*)0x5340 +#define TIM4_CR1 *(unsigned char*)0x5340 #if defined STM8S105 || defined STM8S103 -#define TIM4_IER *(unsigned char*)0x5341 -#define TIM4_SR *(unsigned char*)0x5342 -#define TIM4_EGR *(unsigned char*)0x5343 -#define TIM4_CNTR *(unsigned char*)0x5344 -#define TIM4_PSCR *(unsigned char*)0x5345 -#define TIM4_ARR *(unsigned char*)0x5346 +#define TIM4_IER *(unsigned char*)0x5341 +#define TIM4_SR *(unsigned char*)0x5342 +#define TIM4_EGR *(unsigned char*)0x5343 +#define TIM4_CNTR *(unsigned char*)0x5344 +#define TIM4_PSCR *(unsigned char*)0x5345 +#define TIM4_ARR *(unsigned char*)0x5346 #elif defined STM8S003 -#define TIM4_IER *(unsigned char*)0x5343 -#define TIM4_SR *(unsigned char*)0x5344 -#define TIM4_EGR *(unsigned char*)0x5345 -#define TIM4_CNTR *(unsigned char*)0x5346 -#define TIM4_PSCR *(unsigned char*)0x5347 -#define TIM4_ARR *(unsigned char*)0x5348 +#define TIM4_IER *(unsigned char*)0x5343 +#define TIM4_SR *(unsigned char*)0x5344 +#define TIM4_EGR *(unsigned char*)0x5345 +#define TIM4_CNTR *(unsigned char*)0x5346 +#define TIM4_PSCR *(unsigned char*)0x5347 +#define TIM4_ARR *(unsigned char*)0x5348 #endif /* ------------------- ADC ------------------- */ -#define ADC_DB0RH *(unsigned char*)0x53E0 -#define ADC_DB0RL *(unsigned char*)0x53E1 -#define ADC_DB1RH *(unsigned char*)0x53E2 -#define ADC_DB1RL *(unsigned char*)0x53E3 -#define ADC_DB2RH *(unsigned char*)0x53E4 -#define ADC_DB2RL *(unsigned char*)0x53E5 -#define ADC_DB3RH *(unsigned char*)0x53E6 -#define ADC_DB3RL *(unsigned char*)0x53E7 -#define ADC_DB4RH *(unsigned char*)0x53E8 -#define ADC_DB4RL *(unsigned char*)0x53E9 -#define ADC_DB5RH *(unsigned char*)0x53EA -#define ADC_DB5RL *(unsigned char*)0x53EB -#define ADC_DB6RH *(unsigned char*)0x53EC -#define ADC_DB6RL *(unsigned char*)0x53ED -#define ADC_DB7RH *(unsigned char*)0x53EE -#define ADC_DB7RL *(unsigned char*)0x53EF -#define ADC_DB8RH *(unsigned char*)0x53F0 -#define ADC_DB8RL *(unsigned char*)0x53F1 -#define ADC_DB9RH *(unsigned char*)0x53F2 -#define ADC_DB9RL *(unsigned char*)0x53F3 -#define ADC_CSR *(unsigned char*)0x5400 -#define ADC_CR1 *(unsigned char*)0x5401 -#define ADC_CR2 *(unsigned char*)0x5402 -#define ADC_CR3 *(unsigned char*)0x5403 -#define ADC_DRH *(unsigned char*)0x5404 -#define ADC_DRL *(unsigned char*)0x5405 -#define ADC_TDRH *(unsigned char*)0x5406 -#define ADC_TDRL *(unsigned char*)0x5407 -#define ADC_HTRH *(unsigned char*)0x5408 -#define ADC_HTRL *(unsigned char*)0x5409 -#define ADC_LTRH *(unsigned char*)0x540A -#define ADC_LTRL *(unsigned char*)0x540B -#define ADC_AWSRH *(unsigned char*)0x540C -#define ADC_AWSRL *(unsigned char*)0x540D -#define ADC_AWCRH *(unsigned char*)0x540E -#define ADC_AWCRL *(unsigned char*)0x540F +#define ADC_DB0RH *(unsigned char*)0x53E0 +#define ADC_DB0RL *(unsigned char*)0x53E1 +#define ADC_DB1RH *(unsigned char*)0x53E2 +#define ADC_DB1RL *(unsigned char*)0x53E3 +#define ADC_DB2RH *(unsigned char*)0x53E4 +#define ADC_DB2RL *(unsigned char*)0x53E5 +#define ADC_DB3RH *(unsigned char*)0x53E6 +#define ADC_DB3RL *(unsigned char*)0x53E7 +#define ADC_DB4RH *(unsigned char*)0x53E8 +#define ADC_DB4RL *(unsigned char*)0x53E9 +#define ADC_DB5RH *(unsigned char*)0x53EA +#define ADC_DB5RL *(unsigned char*)0x53EB +#define ADC_DB6RH *(unsigned char*)0x53EC +#define ADC_DB6RL *(unsigned char*)0x53ED +#define ADC_DB7RH *(unsigned char*)0x53EE +#define ADC_DB7RL *(unsigned char*)0x53EF +#define ADC_DB8RH *(unsigned char*)0x53F0 +#define ADC_DB8RL *(unsigned char*)0x53F1 +#define ADC_DB9RH *(unsigned char*)0x53F2 +#define ADC_DB9RL *(unsigned char*)0x53F3 +#define ADC_CSR *(unsigned char*)0x5400 +#define ADC_CR1 *(unsigned char*)0x5401 +#define ADC_CR2 *(unsigned char*)0x5402 +#define ADC_CR3 *(unsigned char*)0x5403 +#define ADC_DRH *(unsigned char*)0x5404 +#define ADC_DRL *(unsigned char*)0x5405 +#define ADC_TDRH *(unsigned char*)0x5406 +#define ADC_TDRL *(unsigned char*)0x5407 +#define ADC_HTRH *(unsigned char*)0x5408 +#define ADC_HTRL *(unsigned char*)0x5409 +#define ADC_LTRH *(unsigned char*)0x540A +#define ADC_LTRL *(unsigned char*)0x540B +#define ADC_AWSRH *(unsigned char*)0x540C +#define ADC_AWSRL *(unsigned char*)0x540D +#define ADC_AWCRH *(unsigned char*)0x540E +#define ADC_AWCRL *(unsigned char*)0x540F /* ------------------- swim control ------------------- */ -#define CFG_GCR *(unsigned char*)0x7F60 -#define SWIM_CSR *(unsigned char*)0x7F80 +#define CFG_GCR *(unsigned char*)0x7F60 +#define SWIM_CSR *(unsigned char*)0x7F80 /* ------------------- ITC ------------------- */ -#define ITC_SPR1 *(unsigned char*)0x7F70 -#define ITC_SPR2 *(unsigned char*)0x7F71 -#define ITC_SPR3 *(unsigned char*)0x7F72 -#define ITC_SPR4 *(unsigned char*)0x7F73 -#define ITC_SPR5 *(unsigned char*)0x7F74 -#define ITC_SPR6 *(unsigned char*)0x7F75 -#define ITC_SPR7 *(unsigned char*)0x7F76 -#define ITC_SPR8 *(unsigned char*)0x7F77 +#define ITC_SPR1 *(unsigned char*)0x7F70 +#define ITC_SPR2 *(unsigned char*)0x7F71 +#define ITC_SPR3 *(unsigned char*)0x7F72 +#define ITC_SPR4 *(unsigned char*)0x7F73 +#define ITC_SPR5 *(unsigned char*)0x7F74 +#define ITC_SPR6 *(unsigned char*)0x7F75 +#define ITC_SPR7 *(unsigned char*)0x7F76 +#define ITC_SPR8 *(unsigned char*)0x7F77 /* -------------------- UNIQUE ID -------------------- */ #if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too??? -#define U_ID00 (unsigned char*)0x48CD -#define U_ID01 (unsigned char*)0x48CE -#define U_ID02 (unsigned char*)0x48CF -#define U_ID03 (unsigned char*)0x48D0 -#define U_ID04 (unsigned char*)0x48D1 -#define U_ID05 (unsigned char*)0x48D2 -#define U_ID06 (unsigned char*)0x48D3 -#define U_ID07 (unsigned char*)0x48D4 -#define U_ID08 (unsigned char*)0x48D5 -#define U_ID09 (unsigned char*)0x48D6 -#define U_ID10 (unsigned char*)0x48D7 -#define U_ID11 (unsigned char*)0x48D8 +#define U_ID00 (unsigned char*)0x48CD +#define U_ID01 (unsigned char*)0x48CE +#define U_ID02 (unsigned char*)0x48CF +#define U_ID03 (unsigned char*)0x48D0 +#define U_ID04 (unsigned char*)0x48D1 +#define U_ID05 (unsigned char*)0x48D2 +#define U_ID06 (unsigned char*)0x48D3 +#define U_ID07 (unsigned char*)0x48D4 +#define U_ID08 (unsigned char*)0x48D5 +#define U_ID09 (unsigned char*)0x48D6 +#define U_ID10 (unsigned char*)0x48D7 +#define U_ID11 (unsigned char*)0x48D8 #endif // defined STM8S105 || defined STM8S103 // CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx -#define CCR *(unsigned char*)0x7F0A +#define CCR *(unsigned char*)0x7F0A /* -------------------- OPTION BYTES -------------------- */ #if defined STM8S105 // readout protection -#define OPT0 *(unsigned char*)0x4800 +#define OPT0 *(unsigned char*)0x4800 // user boot code -#define OPT1 *(unsigned char*)0x4801 -#define NOPT1 *(unsigned char*)0x4802 +#define OPT1 *(unsigned char*)0x4801 +#define NOPT1 *(unsigned char*)0x4802 // alternate functions remapping // | AFR7 | ... | AFR0 | // AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1 // AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN // AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3 // AFR0 - PD3 = ADC_ETR -#define OPT2 *(unsigned char*)0x4803 -#define NOPT2 *(unsigned char*)0x4804 +#define OPT2 *(unsigned char*)0x4803 +#define NOPT2 *(unsigned char*)0x4804 // trim, watchdog -#define OPT3 *(unsigned char*)0x4805 -#define NOPT3 *(unsigned char*)0x4806 +#define OPT3 *(unsigned char*)0x4805 +#define NOPT3 *(unsigned char*)0x4806 // extclc, awu -#define OPT4 *(unsigned char*)0x4807 -#define NOPT4 *(unsigned char*)0x4808 +#define OPT4 *(unsigned char*)0x4807 +#define NOPT4 *(unsigned char*)0x4808 // HSE stab time -#define OPT5 *(unsigned char*)0x4809 -#define NOPT5 *(unsigned char*)0x480a +#define OPT5 *(unsigned char*)0x4809 +#define NOPT5 *(unsigned char*)0x480a // none -#define OPT6 *(unsigned char*)0x480b -#define NOPT6 *(unsigned char*)0x480c +#define OPT6 *(unsigned char*)0x480b +#define NOPT6 *(unsigned char*)0x480c // none -#define OPT7 *(unsigned char*)0x480d -#define NOPT7 *(unsigned char*)0x480e +#define OPT7 *(unsigned char*)0x480d +#define NOPT7 *(unsigned char*)0x480e // bootloader opt byte -#define OPTBL *(unsigned char*)0x487e -#define NOPTBL *(unsigned char*)0x487f +#define OPTBL *(unsigned char*)0x487e +#define NOPTBL *(unsigned char*)0x487f #endif #endif // __STM8L_H__ -// #define *(unsigned char*)0x +// #define *(unsigned char*)0x diff --git a/220controlled_socket/src/uart.c b/220controlled_socket/src/uart.c index 0e7cef1..6c388a3 100644 --- a/220controlled_socket/src/uart.c +++ b/220controlled_socket/src/uart.c @@ -22,9 +22,8 @@ #include "uart.h" #include "interrupts.h" -U8 UART_rx[UART_BUF_LEN]; // cycle buffer for received data -U8 UART_rx_start_i = 0; // started index of received data (from which reading starts) -U8 UART_rx_cur_i = 0; // index of current first byte in rx array (to which data will be written) +U8 UART_rx_cmd; // command received +volatile U8 uart_ready = 0;// command ready flag /** * Send one byte through UART @@ -53,11 +52,11 @@ void uart_write(char *str){ * @param byte - where to store data read * @return 1 in case of non-empty buffer */ -U8 uart_read_byte(U8 *byte){ - if(UART_rx_start_i == UART_rx_cur_i) // buffer is empty +U8 uart_read_cmd(U8 *byte){ + if(!uart_ready) // buffer is empty return 0; - *byte = UART_rx[UART_rx_start_i++]; - check_UART_pointer(UART_rx_start_i); + *byte = UART_rx_cmd; + uart_ready = 0; return 1; } @@ -93,7 +92,7 @@ void printUint(U8 *val, U8 len){ /** * print signed long onto terminal * max len = 10 symbols + 1 for "-" + 1 for '\n' + 1 for 0 = 13 - */ + * void print_long(long Number){ U8 i, L = 0; char ch; @@ -156,7 +155,7 @@ void printUHEX(U8 val){ uart_write("0x"); uart_send_byte(U8toHEX(val>>4)); // MSB uart_send_byte(U8toHEX(val)); // LSB -} +}*/ void uart_init(){ // PD5 - UART1_TX diff --git a/220controlled_socket/src/uart.h b/220controlled_socket/src/uart.h index 2bef830..330a93c 100644 --- a/220controlled_socket/src/uart.h +++ b/220controlled_socket/src/uart.h @@ -28,10 +28,8 @@ extern volatile unsigned long Global_time; // global time in ms #define UART_BUF_LEN 8 // max 7 bytes transmited in on operation -extern U8 UART_rx[]; -extern U8 UART_rx_start_i; -extern U8 UART_rx_cur_i; - +extern U8 UART_rx_cmd; +extern volatile U8 uart_ready; void uart_send_byte(U8 byte); void uart_write(char *str); @@ -40,7 +38,7 @@ void printUint(U8 *val, U8 len); void print_long(long Number); void error_msg(char *msg); void uart_init(); -U8 uart_read_byte(U8 *byte); +U8 uart_read_cmd(U8 *byte); void printUHEX(U8 val); #define check_UART_pointer(x) do{if(x == UART_BUF_LEN) x = 0;}while(0) diff --git a/stm8l.h b/stm8l.h index cee5f59..b52bc7d 100644 --- a/stm8l.h +++ b/stm8l.h @@ -103,74 +103,74 @@ typedef unsigned long U32; #endif // STM8S105 /* GPIO bits */ -#define GPIO_PIN0 (1 << 0) -#define GPIO_PIN1 (1 << 1) -#define GPIO_PIN2 (1 << 2) -#define GPIO_PIN3 (1 << 3) -#define GPIO_PIN4 (1 << 4) -#define GPIO_PIN5 (1 << 5) -#define GPIO_PIN6 (1 << 6) -#define GPIO_PIN7 (1 << 7) +#define GPIO_PIN0 (1 << 0) +#define GPIO_PIN1 (1 << 1) +#define GPIO_PIN2 (1 << 2) +#define GPIO_PIN3 (1 << 3) +#define GPIO_PIN4 (1 << 4) +#define GPIO_PIN5 (1 << 5) +#define GPIO_PIN6 (1 << 6) +#define GPIO_PIN7 (1 << 7) /* -------------------- FLASH/EEPROM -------------------- */ -#define FLASH_CR1 *(unsigned char*)0x505A -#define FLASH_CR2 *(unsigned char*)0x505B -#define FLASH_NCR2 *(unsigned char*)0x505C -#define FLASH_FPR *(unsigned char*)0x505D -#define FLASH_NFPR *(unsigned char*)0x505E -#define FLASH_IAPSR *(unsigned char*)0x505F -#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection -#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection +#define FLASH_CR1 *(unsigned char*)0x505A +#define FLASH_CR2 *(unsigned char*)0x505B +#define FLASH_NCR2 *(unsigned char*)0x505C +#define FLASH_FPR *(unsigned char*)0x505D +#define FLASH_NFPR *(unsigned char*)0x505E +#define FLASH_IAPSR *(unsigned char*)0x505F +#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection +#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection -#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access -#define EEPROM_KEY2 0x56 +#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access +#define EEPROM_KEY2 0x56 #define EEPROM_START_ADDR (unsigned char*)0x4000 /* ------------------- interrupts ------------------- */ -#define EXTI_CR1 *(unsigned char*)0x50A0 -#define EXTI_CR2 *(unsigned char*)0x50A1 -#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num) -#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num) +#define EXTI_CR1 *(unsigned char*)0x50A0 +#define EXTI_CR2 *(unsigned char*)0x50A1 +#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num) +#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num) // Reset status register -#define RST_SR *(unsigned char*)0x50B3 +#define RST_SR *(unsigned char*)0x50B3 /* ------------------- CLOCK ------------------- */ -#define CLK_ICKR *(unsigned char*)0x50C0 -#define CLK_ECKR *(unsigned char*)0x50C1 -#define CLK_CMSR *(unsigned char*)0x50C3 -#define CLK_SWR *(unsigned char*)0x50C4 -#define CLK_SWCR *(unsigned char*)0x50C5 -#define CLK_CKDIVR *(unsigned char*)0x50C6 -#define CLK_SPCKENR1 *(unsigned char*)0x50C7 -#define CLK_CSSR *(unsigned char*)0x50C8 -#define CLK_CCOR *(unsigned char*)0x50C9 -#define CLK_PCKENR2 *(unsigned char*)0x50CA -#define CLK_HSITRIMR *(unsigned char*)0x50CC -#define CLK_SWIMCCR *(unsigned char*)0x50CD +#define CLK_ICKR *(unsigned char*)0x50C0 +#define CLK_ECKR *(unsigned char*)0x50C1 +#define CLK_CMSR *(unsigned char*)0x50C3 +#define CLK_SWR *(unsigned char*)0x50C4 +#define CLK_SWCR *(unsigned char*)0x50C5 +#define CLK_CKDIVR *(unsigned char*)0x50C6 +#define CLK_SPCKENR1 *(unsigned char*)0x50C7 +#define CLK_CSSR *(unsigned char*)0x50C8 +#define CLK_CCOR *(unsigned char*)0x50C9 +#define CLK_PCKENR2 *(unsigned char*)0x50CA +#define CLK_HSITRIMR *(unsigned char*)0x50CC +#define CLK_SWIMCCR *(unsigned char*)0x50CD /* ------------------- Watchdog ------------------ */ -#define WWDG_CR *(unsigned char*)0x50D1 -#define WWDG_WR *(unsigned char*)0x50D2 -#define IWDG_KR *(unsigned char*)0x50E0 -#define IWDG_PR *(unsigned char*)0x50E1 -#define IWDG_RLR *(unsigned char*)0x50E2 +#define WWDG_CR *(unsigned char*)0x50D1 +#define WWDG_WR *(unsigned char*)0x50D2 +#define IWDG_KR *(unsigned char*)0x50E0 +#define IWDG_PR *(unsigned char*)0x50E1 +#define IWDG_RLR *(unsigned char*)0x50E2 /* ------------------- AWU, BEEP ------------------- */ -#define AWU_CSR1 *(unsigned char*)0x50F0 -#define AWU_APR *(unsigned char*)0x50F1 -#define AWU_TBR *(unsigned char*)0x50F2 -#define BEEP_CSR *(unsigned char*)0x50F3 +#define AWU_CSR1 *(unsigned char*)0x50F0 +#define AWU_APR *(unsigned char*)0x50F1 +#define AWU_TBR *(unsigned char*)0x50F2 +#define BEEP_CSR *(unsigned char*)0x50F3 /* ------------------- SPI ------------------- */ -#define SPI_CR1 *(unsigned char*)0x5200 -#define SPI_CR2 *(unsigned char*)0x5201 -#define SPI_ICR *(unsigned char*)0x5202 -#define SPI_SR *(unsigned char*)0x5203 -#define SPI_DR *(unsigned char*)0x5204 -#define SPI_CRCPR *(unsigned char*)0x5205 -#define SPI_RXCRCR *(unsigned char*)0x5206 -#define SPI_TXCRCR *(unsigned char*)0x5207 +#define SPI_CR1 *(unsigned char*)0x5200 +#define SPI_CR2 *(unsigned char*)0x5201 +#define SPI_ICR *(unsigned char*)0x5202 +#define SPI_SR *(unsigned char*)0x5203 +#define SPI_DR *(unsigned char*)0x5204 +#define SPI_CRCPR *(unsigned char*)0x5205 +#define SPI_RXCRCR *(unsigned char*)0x5206 +#define SPI_TXCRCR *(unsigned char*)0x5207 // SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA | #define SPI_CR1_LSBFIRST (1<<7) #define SPI_CR1_SPE (1<<6) @@ -201,48 +201,48 @@ typedef unsigned long U32; #define SPI_SR_RXNE (1) /* ------------------- I2C ------------------- */ -#define I2C_CR1 *(unsigned char*)0x5210 -#define I2C_CR2 *(unsigned char*)0x5211 -#define I2C_FREQR *(unsigned char*)0x5212 -#define I2C_OARL *(unsigned char*)0x5213 -#define I2C_OARH *(unsigned char*)0x5214 -#define I2C_DR *(unsigned char*)0x5216 -#define I2C_SR1 *(unsigned char*)0x5217 -#define I2C_SR2 *(unsigned char*)0x5218 -#define I2C_SR3 *(unsigned char*)0x5219 -#define I2C_ITR *(unsigned char*)0x521A -#define I2C_CCRL *(unsigned char*)0x521B -#define I2C_CCRH *(unsigned char*)0x521C -#define I2C_TRISER *(unsigned char*)0x521D -#define I2C_PECR *(unsigned char*)0x521E +#define I2C_CR1 *(unsigned char*)0x5210 +#define I2C_CR2 *(unsigned char*)0x5211 +#define I2C_FREQR *(unsigned char*)0x5212 +#define I2C_OARL *(unsigned char*)0x5213 +#define I2C_OARH *(unsigned char*)0x5214 +#define I2C_DR *(unsigned char*)0x5216 +#define I2C_SR1 *(unsigned char*)0x5217 +#define I2C_SR2 *(unsigned char*)0x5218 +#define I2C_SR3 *(unsigned char*)0x5219 +#define I2C_ITR *(unsigned char*)0x521A +#define I2C_CCRL *(unsigned char*)0x521B +#define I2C_CCRH *(unsigned char*)0x521C +#define I2C_TRISER *(unsigned char*)0x521D +#define I2C_PECR *(unsigned char*)0x521E /* ------------------- UART ------------------- */ -#ifdef STM8S003 -#define UART1_SR *(unsigned char*)0x5230 -#define UART1_DR *(unsigned char*)0x5231 -#define UART1_BRR1 *(unsigned char*)0x5232 -#define UART1_BRR2 *(unsigned char*)0x5233 -#define UART1_CR1 *(unsigned char*)0x5234 -#define UART1_CR2 *(unsigned char*)0x5235 -#define UART1_CR3 *(unsigned char*)0x5236 -#define UART1_CR4 *(unsigned char*)0x5237 -#define UART1_CR5 *(unsigned char*)0x5238 -#define UART1_GTR *(unsigned char*)0x5239 -#define UART1_PSCR *(unsigned char*)0x523A +#if defined STM8S003 || defined STM8S103 +#define UART1_SR *(unsigned char*)0x5230 +#define UART1_DR *(unsigned char*)0x5231 +#define UART1_BRR1 *(unsigned char*)0x5232 +#define UART1_BRR2 *(unsigned char*)0x5233 +#define UART1_CR1 *(unsigned char*)0x5234 +#define UART1_CR2 *(unsigned char*)0x5235 +#define UART1_CR3 *(unsigned char*)0x5236 +#define UART1_CR4 *(unsigned char*)0x5237 +#define UART1_CR5 *(unsigned char*)0x5238 +#define UART1_GTR *(unsigned char*)0x5239 +#define UART1_PSCR *(unsigned char*)0x523A #endif // STM8S003 #ifdef STM8S105 -#define UART2_SR *(unsigned char*)0x5240 -#define UART2_DR *(unsigned char*)0x5241 -#define UART2_BRR1 *(unsigned char*)0x5242 -#define UART2_BRR2 *(unsigned char*)0x5243 -#define UART2_CR1 *(unsigned char*)0x5244 -#define UART2_CR2 *(unsigned char*)0x5245 -#define UART2_CR3 *(unsigned char*)0x5246 -#define UART2_CR4 *(unsigned char*)0x5247 -#define UART2_CR5 *(unsigned char*)0x5248 -#define UART2_CR6 *(unsigned char*)0x5249 -#define UART2_GTR *(unsigned char*)0x524A -#define UART2_PSCR *(unsigned char*)0x524B +#define UART2_SR *(unsigned char*)0x5240 +#define UART2_DR *(unsigned char*)0x5241 +#define UART2_BRR1 *(unsigned char*)0x5242 +#define UART2_BRR2 *(unsigned char*)0x5243 +#define UART2_CR1 *(unsigned char*)0x5244 +#define UART2_CR2 *(unsigned char*)0x5245 +#define UART2_CR3 *(unsigned char*)0x5246 +#define UART2_CR4 *(unsigned char*)0x5247 +#define UART2_CR5 *(unsigned char*)0x5248 +#define UART2_CR6 *(unsigned char*)0x5249 +#define UART2_GTR *(unsigned char*)0x524A +#define UART2_PSCR *(unsigned char*)0x524B #endif // STM8S105 /* UART_CR1 bits */ @@ -287,38 +287,38 @@ typedef unsigned long U32; /* ------------------- TIMERS ------------------- */ /* TIM1 */ -#define TIM1_CR1 *(unsigned char*)0x5250 -#define TIM1_CR2 *(unsigned char*)0x5251 -#define TIM1_SMCR *(unsigned char*)0x5252 -#define TIM1_ETR *(unsigned char*)0x5253 -#define TIM1_IER *(unsigned char*)0x5254 -#define TIM1_SR1 *(unsigned char*)0x5255 -#define TIM1_SR2 *(unsigned char*)0x5256 -#define TIM1_EGR *(unsigned char*)0x5257 -#define TIM1_CCMR1 *(unsigned char*)0x5258 -#define TIM1_CCMR2 *(unsigned char*)0x5259 -#define TIM1_CCMR3 *(unsigned char*)0x525A -#define TIM1_CCMR4 *(unsigned char*)0x525B -#define TIM1_CCER1 *(unsigned char*)0x525C -#define TIM1_CCER2 *(unsigned char*)0x525D -#define TIM1_CNTRH *(unsigned char*)0x525E -#define TIM1_CNTRL *(unsigned char*)0x525F -#define TIM1_PSCRH *(unsigned char*)0x5260 -#define TIM1_PSCRL *(unsigned char*)0x5261 -#define TIM1_ARRH *(unsigned char*)0x5262 -#define TIM1_ARRL *(unsigned char*)0x5263 -#define TIM1_RCR *(unsigned char*)0x5264 -#define TIM1_CCR1H *(unsigned char*)0x5265 -#define TIM1_CCR1L *(unsigned char*)0x5266 -#define TIM1_CCR2H *(unsigned char*)0x5267 -#define TIM1_CCR2L *(unsigned char*)0x5268 -#define TIM1_CCR3H *(unsigned char*)0x5269 -#define TIM1_CCR3L *(unsigned char*)0x526A -#define TIM1_CCR4H *(unsigned char*)0x526B -#define TIM1_CCR4L *(unsigned char*)0x526C -#define TIM1_BKR *(unsigned char*)0x526D -#define TIM1_DTR *(unsigned char*)0x526E -#define TIM1_OISR *(unsigned char*)0x526F +#define TIM1_CR1 *(unsigned char*)0x5250 +#define TIM1_CR2 *(unsigned char*)0x5251 +#define TIM1_SMCR *(unsigned char*)0x5252 +#define TIM1_ETR *(unsigned char*)0x5253 +#define TIM1_IER *(unsigned char*)0x5254 +#define TIM1_SR1 *(unsigned char*)0x5255 +#define TIM1_SR2 *(unsigned char*)0x5256 +#define TIM1_EGR *(unsigned char*)0x5257 +#define TIM1_CCMR1 *(unsigned char*)0x5258 +#define TIM1_CCMR2 *(unsigned char*)0x5259 +#define TIM1_CCMR3 *(unsigned char*)0x525A +#define TIM1_CCMR4 *(unsigned char*)0x525B +#define TIM1_CCER1 *(unsigned char*)0x525C +#define TIM1_CCER2 *(unsigned char*)0x525D +#define TIM1_CNTRH *(unsigned char*)0x525E +#define TIM1_CNTRL *(unsigned char*)0x525F +#define TIM1_PSCRH *(unsigned char*)0x5260 +#define TIM1_PSCRL *(unsigned char*)0x5261 +#define TIM1_ARRH *(unsigned char*)0x5262 +#define TIM1_ARRL *(unsigned char*)0x5263 +#define TIM1_RCR *(unsigned char*)0x5264 +#define TIM1_CCR1H *(unsigned char*)0x5265 +#define TIM1_CCR1L *(unsigned char*)0x5266 +#define TIM1_CCR2H *(unsigned char*)0x5267 +#define TIM1_CCR2L *(unsigned char*)0x5268 +#define TIM1_CCR3H *(unsigned char*)0x5269 +#define TIM1_CCR3L *(unsigned char*)0x526A +#define TIM1_CCR4H *(unsigned char*)0x526B +#define TIM1_CCR4L *(unsigned char*)0x526C +#define TIM1_BKR *(unsigned char*)0x526D +#define TIM1_DTR *(unsigned char*)0x526E +#define TIM1_OISR *(unsigned char*)0x526F /* TIM_IER bits */ @@ -363,199 +363,199 @@ typedef unsigned long U32; /* TIM2 */ -#define TIM2_CR1 *(unsigned char*)0x5300 +#define TIM2_CR1 *(unsigned char*)0x5300 #if defined STM8S105 || defined STM8S103 -#define TIM2_IER *(unsigned char*)0x5301 -#define TIM2_SR1 *(unsigned char*)0x5302 -#define TIM2_SR2 *(unsigned char*)0x5303 -#define TIM2_EGR *(unsigned char*)0x5304 -#define TIM2_CCMR1 *(unsigned char*)0x5305 -#define TIM2_CCMR2 *(unsigned char*)0x5306 -#define TIM2_CCMR3 *(unsigned char*)0x5307 -#define TIM2_CCER1 *(unsigned char*)0x5308 -#define TIM2_CCER2 *(unsigned char*)0x5309 -#define TIM2_CNTRH *(unsigned char*)0x530A -#define TIM2_CNTRL *(unsigned char*)0x530B -#define TIM2_PSCR *(unsigned char*)0x530C -#define TIM2_ARRH *(unsigned char*)0x530D -#define TIM2_ARRL *(unsigned char*)0x530E -#define TIM2_CCR1H *(unsigned char*)0x530F -#define TIM2_CCR1L *(unsigned char*)0x5310 -#define TIM2_CCR2H *(unsigned char*)0x5311 -#define TIM2_CCR2L *(unsigned char*)0x5312 -#define TIM2_CCR3H *(unsigned char*)0x5313 -#define TIM2_CCR3L *(unsigned char*)0x5314 +#define TIM2_IER *(unsigned char*)0x5301 +#define TIM2_SR1 *(unsigned char*)0x5302 +#define TIM2_SR2 *(unsigned char*)0x5303 +#define TIM2_EGR *(unsigned char*)0x5304 +#define TIM2_CCMR1 *(unsigned char*)0x5305 +#define TIM2_CCMR2 *(unsigned char*)0x5306 +#define TIM2_CCMR3 *(unsigned char*)0x5307 +#define TIM2_CCER1 *(unsigned char*)0x5308 +#define TIM2_CCER2 *(unsigned char*)0x5309 +#define TIM2_CNTRH *(unsigned char*)0x530A +#define TIM2_CNTRL *(unsigned char*)0x530B +#define TIM2_PSCR *(unsigned char*)0x530C +#define TIM2_ARRH *(unsigned char*)0x530D +#define TIM2_ARRL *(unsigned char*)0x530E +#define TIM2_CCR1H *(unsigned char*)0x530F +#define TIM2_CCR1L *(unsigned char*)0x5310 +#define TIM2_CCR2H *(unsigned char*)0x5311 +#define TIM2_CCR2L *(unsigned char*)0x5312 +#define TIM2_CCR3H *(unsigned char*)0x5313 +#define TIM2_CCR3L *(unsigned char*)0x5314 #elif defined STM8S003 -#define TIM2_IER *(unsigned char*)0x5303 -#define TIM2_SR1 *(unsigned char*)0x5304 -#define TIM2_SR2 *(unsigned char*)0x5305 -#define TIM2_EGR *(unsigned char*)0x5306 -#define TIM2_CCMR1 *(unsigned char*)0x5307 -#define TIM2_CCMR2 *(unsigned char*)0x5308 -#define TIM2_CCMR3 *(unsigned char*)0x5309 -#define TIM2_CCER1 *(unsigned char*)0x530A -#define TIM2_CCER2 *(unsigned char*)0x530B -#define TIM2_CNTRH *(unsigned char*)0x530C -#define TIM2_CNTRL *(unsigned char*)0x530D -#define TIM2_PSCR *(unsigned char*)0x530E -#define TIM2_ARRH *(unsigned char*)0x530F -#define TIM2_ARRL *(unsigned char*)0x5310 -#define TIM2_CCR1H *(unsigned char*)0x5311 -#define TIM2_CCR1L *(unsigned char*)0x5312 -#define TIM2_CCR2H *(unsigned char*)0x5313 -#define TIM2_CCR2L *(unsigned char*)0x5314 -#define TIM2_CCR3H *(unsigned char*)0x5315 -#define TIM2_CCR3L *(unsigned char*)0x5316 +#define TIM2_IER *(unsigned char*)0x5303 +#define TIM2_SR1 *(unsigned char*)0x5304 +#define TIM2_SR2 *(unsigned char*)0x5305 +#define TIM2_EGR *(unsigned char*)0x5306 +#define TIM2_CCMR1 *(unsigned char*)0x5307 +#define TIM2_CCMR2 *(unsigned char*)0x5308 +#define TIM2_CCMR3 *(unsigned char*)0x5309 +#define TIM2_CCER1 *(unsigned char*)0x530A +#define TIM2_CCER2 *(unsigned char*)0x530B +#define TIM2_CNTRH *(unsigned char*)0x530C +#define TIM2_CNTRL *(unsigned char*)0x530D +#define TIM2_PSCR *(unsigned char*)0x530E +#define TIM2_ARRH *(unsigned char*)0x530F +#define TIM2_ARRL *(unsigned char*)0x5310 +#define TIM2_CCR1H *(unsigned char*)0x5311 +#define TIM2_CCR1L *(unsigned char*)0x5312 +#define TIM2_CCR2H *(unsigned char*)0x5313 +#define TIM2_CCR2L *(unsigned char*)0x5314 +#define TIM2_CCR3H *(unsigned char*)0x5315 +#define TIM2_CCR3L *(unsigned char*)0x5316 #endif /* TIM3 */ #if defined STM8S105 || defined STM8S103 -#define TIM3_CR1 *(unsigned char*)0x5320 -#define TIM3_IER *(unsigned char*)0x5321 -#define TIM3_SR1 *(unsigned char*)0x5322 -#define TIM3_SR2 *(unsigned char*)0x5323 -#define TIM3_EGR *(unsigned char*)0x5324 -#define TIM3_CCMR1 *(unsigned char*)0x5325 -#define TIM3_CCMR2 *(unsigned char*)0x5326 -#define TIM3_CCER1 *(unsigned char*)0x5327 -#define TIM3_CNTRH *(unsigned char*)0x5328 -#define TIM3_CNTRL *(unsigned char*)0x5329 -#define TIM3_PSCR *(unsigned char*)0x532A -#define TIM3_ARRH *(unsigned char*)0x532B -#define TIM3_ARRL *(unsigned char*)0x532C -#define TIM3_CCR1H *(unsigned char*)0x532D -#define TIM3_CCR1L *(unsigned char*)0x532E -#define TIM3_CCR2H *(unsigned char*)0x532F -#define TIM3_CCR2L *(unsigned char*)0x5330 +#define TIM3_CR1 *(unsigned char*)0x5320 +#define TIM3_IER *(unsigned char*)0x5321 +#define TIM3_SR1 *(unsigned char*)0x5322 +#define TIM3_SR2 *(unsigned char*)0x5323 +#define TIM3_EGR *(unsigned char*)0x5324 +#define TIM3_CCMR1 *(unsigned char*)0x5325 +#define TIM3_CCMR2 *(unsigned char*)0x5326 +#define TIM3_CCER1 *(unsigned char*)0x5327 +#define TIM3_CNTRH *(unsigned char*)0x5328 +#define TIM3_CNTRL *(unsigned char*)0x5329 +#define TIM3_PSCR *(unsigned char*)0x532A +#define TIM3_ARRH *(unsigned char*)0x532B +#define TIM3_ARRL *(unsigned char*)0x532C +#define TIM3_CCR1H *(unsigned char*)0x532D +#define TIM3_CCR1L *(unsigned char*)0x532E +#define TIM3_CCR2H *(unsigned char*)0x532F +#define TIM3_CCR2L *(unsigned char*)0x5330 #endif /* TIM4 */ -#define TIM4_CR1 *(unsigned char*)0x5340 +#define TIM4_CR1 *(unsigned char*)0x5340 #if defined STM8S105 || defined STM8S103 -#define TIM4_IER *(unsigned char*)0x5341 -#define TIM4_SR *(unsigned char*)0x5342 -#define TIM4_EGR *(unsigned char*)0x5343 -#define TIM4_CNTR *(unsigned char*)0x5344 -#define TIM4_PSCR *(unsigned char*)0x5345 -#define TIM4_ARR *(unsigned char*)0x5346 +#define TIM4_IER *(unsigned char*)0x5341 +#define TIM4_SR *(unsigned char*)0x5342 +#define TIM4_EGR *(unsigned char*)0x5343 +#define TIM4_CNTR *(unsigned char*)0x5344 +#define TIM4_PSCR *(unsigned char*)0x5345 +#define TIM4_ARR *(unsigned char*)0x5346 #elif defined STM8S003 -#define TIM4_IER *(unsigned char*)0x5343 -#define TIM4_SR *(unsigned char*)0x5344 -#define TIM4_EGR *(unsigned char*)0x5345 -#define TIM4_CNTR *(unsigned char*)0x5346 -#define TIM4_PSCR *(unsigned char*)0x5347 -#define TIM4_ARR *(unsigned char*)0x5348 +#define TIM4_IER *(unsigned char*)0x5343 +#define TIM4_SR *(unsigned char*)0x5344 +#define TIM4_EGR *(unsigned char*)0x5345 +#define TIM4_CNTR *(unsigned char*)0x5346 +#define TIM4_PSCR *(unsigned char*)0x5347 +#define TIM4_ARR *(unsigned char*)0x5348 #endif /* ------------------- ADC ------------------- */ -#define ADC_DB0RH *(unsigned char*)0x53E0 -#define ADC_DB0RL *(unsigned char*)0x53E1 -#define ADC_DB1RH *(unsigned char*)0x53E2 -#define ADC_DB1RL *(unsigned char*)0x53E3 -#define ADC_DB2RH *(unsigned char*)0x53E4 -#define ADC_DB2RL *(unsigned char*)0x53E5 -#define ADC_DB3RH *(unsigned char*)0x53E6 -#define ADC_DB3RL *(unsigned char*)0x53E7 -#define ADC_DB4RH *(unsigned char*)0x53E8 -#define ADC_DB4RL *(unsigned char*)0x53E9 -#define ADC_DB5RH *(unsigned char*)0x53EA -#define ADC_DB5RL *(unsigned char*)0x53EB -#define ADC_DB6RH *(unsigned char*)0x53EC -#define ADC_DB6RL *(unsigned char*)0x53ED -#define ADC_DB7RH *(unsigned char*)0x53EE -#define ADC_DB7RL *(unsigned char*)0x53EF -#define ADC_DB8RH *(unsigned char*)0x53F0 -#define ADC_DB8RL *(unsigned char*)0x53F1 -#define ADC_DB9RH *(unsigned char*)0x53F2 -#define ADC_DB9RL *(unsigned char*)0x53F3 -#define ADC_CSR *(unsigned char*)0x5400 -#define ADC_CR1 *(unsigned char*)0x5401 -#define ADC_CR2 *(unsigned char*)0x5402 -#define ADC_CR3 *(unsigned char*)0x5403 -#define ADC_DRH *(unsigned char*)0x5404 -#define ADC_DRL *(unsigned char*)0x5405 -#define ADC_TDRH *(unsigned char*)0x5406 -#define ADC_TDRL *(unsigned char*)0x5407 -#define ADC_HTRH *(unsigned char*)0x5408 -#define ADC_HTRL *(unsigned char*)0x5409 -#define ADC_LTRH *(unsigned char*)0x540A -#define ADC_LTRL *(unsigned char*)0x540B -#define ADC_AWSRH *(unsigned char*)0x540C -#define ADC_AWSRL *(unsigned char*)0x540D -#define ADC_AWCRH *(unsigned char*)0x540E -#define ADC_AWCRL *(unsigned char*)0x540F +#define ADC_DB0RH *(unsigned char*)0x53E0 +#define ADC_DB0RL *(unsigned char*)0x53E1 +#define ADC_DB1RH *(unsigned char*)0x53E2 +#define ADC_DB1RL *(unsigned char*)0x53E3 +#define ADC_DB2RH *(unsigned char*)0x53E4 +#define ADC_DB2RL *(unsigned char*)0x53E5 +#define ADC_DB3RH *(unsigned char*)0x53E6 +#define ADC_DB3RL *(unsigned char*)0x53E7 +#define ADC_DB4RH *(unsigned char*)0x53E8 +#define ADC_DB4RL *(unsigned char*)0x53E9 +#define ADC_DB5RH *(unsigned char*)0x53EA +#define ADC_DB5RL *(unsigned char*)0x53EB +#define ADC_DB6RH *(unsigned char*)0x53EC +#define ADC_DB6RL *(unsigned char*)0x53ED +#define ADC_DB7RH *(unsigned char*)0x53EE +#define ADC_DB7RL *(unsigned char*)0x53EF +#define ADC_DB8RH *(unsigned char*)0x53F0 +#define ADC_DB8RL *(unsigned char*)0x53F1 +#define ADC_DB9RH *(unsigned char*)0x53F2 +#define ADC_DB9RL *(unsigned char*)0x53F3 +#define ADC_CSR *(unsigned char*)0x5400 +#define ADC_CR1 *(unsigned char*)0x5401 +#define ADC_CR2 *(unsigned char*)0x5402 +#define ADC_CR3 *(unsigned char*)0x5403 +#define ADC_DRH *(unsigned char*)0x5404 +#define ADC_DRL *(unsigned char*)0x5405 +#define ADC_TDRH *(unsigned char*)0x5406 +#define ADC_TDRL *(unsigned char*)0x5407 +#define ADC_HTRH *(unsigned char*)0x5408 +#define ADC_HTRL *(unsigned char*)0x5409 +#define ADC_LTRH *(unsigned char*)0x540A +#define ADC_LTRL *(unsigned char*)0x540B +#define ADC_AWSRH *(unsigned char*)0x540C +#define ADC_AWSRL *(unsigned char*)0x540D +#define ADC_AWCRH *(unsigned char*)0x540E +#define ADC_AWCRL *(unsigned char*)0x540F /* ------------------- swim control ------------------- */ -#define CFG_GCR *(unsigned char*)0x7F60 -#define SWIM_CSR *(unsigned char*)0x7F80 +#define CFG_GCR *(unsigned char*)0x7F60 +#define SWIM_CSR *(unsigned char*)0x7F80 /* ------------------- ITC ------------------- */ -#define ITC_SPR1 *(unsigned char*)0x7F70 -#define ITC_SPR2 *(unsigned char*)0x7F71 -#define ITC_SPR3 *(unsigned char*)0x7F72 -#define ITC_SPR4 *(unsigned char*)0x7F73 -#define ITC_SPR5 *(unsigned char*)0x7F74 -#define ITC_SPR6 *(unsigned char*)0x7F75 -#define ITC_SPR7 *(unsigned char*)0x7F76 -#define ITC_SPR8 *(unsigned char*)0x7F77 +#define ITC_SPR1 *(unsigned char*)0x7F70 +#define ITC_SPR2 *(unsigned char*)0x7F71 +#define ITC_SPR3 *(unsigned char*)0x7F72 +#define ITC_SPR4 *(unsigned char*)0x7F73 +#define ITC_SPR5 *(unsigned char*)0x7F74 +#define ITC_SPR6 *(unsigned char*)0x7F75 +#define ITC_SPR7 *(unsigned char*)0x7F76 +#define ITC_SPR8 *(unsigned char*)0x7F77 /* -------------------- UNIQUE ID -------------------- */ #if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too??? -#define U_ID00 (unsigned char*)0x48CD -#define U_ID01 (unsigned char*)0x48CE -#define U_ID02 (unsigned char*)0x48CF -#define U_ID03 (unsigned char*)0x48D0 -#define U_ID04 (unsigned char*)0x48D1 -#define U_ID05 (unsigned char*)0x48D2 -#define U_ID06 (unsigned char*)0x48D3 -#define U_ID07 (unsigned char*)0x48D4 -#define U_ID08 (unsigned char*)0x48D5 -#define U_ID09 (unsigned char*)0x48D6 -#define U_ID10 (unsigned char*)0x48D7 -#define U_ID11 (unsigned char*)0x48D8 +#define U_ID00 (unsigned char*)0x48CD +#define U_ID01 (unsigned char*)0x48CE +#define U_ID02 (unsigned char*)0x48CF +#define U_ID03 (unsigned char*)0x48D0 +#define U_ID04 (unsigned char*)0x48D1 +#define U_ID05 (unsigned char*)0x48D2 +#define U_ID06 (unsigned char*)0x48D3 +#define U_ID07 (unsigned char*)0x48D4 +#define U_ID08 (unsigned char*)0x48D5 +#define U_ID09 (unsigned char*)0x48D6 +#define U_ID10 (unsigned char*)0x48D7 +#define U_ID11 (unsigned char*)0x48D8 #endif // defined STM8S105 || defined STM8S103 // CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx -#define CCR *(unsigned char*)0x7F0A +#define CCR *(unsigned char*)0x7F0A /* -------------------- OPTION BYTES -------------------- */ #if defined STM8S105 // readout protection -#define OPT0 *(unsigned char*)0x4800 +#define OPT0 *(unsigned char*)0x4800 // user boot code -#define OPT1 *(unsigned char*)0x4801 -#define NOPT1 *(unsigned char*)0x4802 +#define OPT1 *(unsigned char*)0x4801 +#define NOPT1 *(unsigned char*)0x4802 // alternate functions remapping // | AFR7 | ... | AFR0 | // AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1 // AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN // AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3 // AFR0 - PD3 = ADC_ETR -#define OPT2 *(unsigned char*)0x4803 -#define NOPT2 *(unsigned char*)0x4804 +#define OPT2 *(unsigned char*)0x4803 +#define NOPT2 *(unsigned char*)0x4804 // trim, watchdog -#define OPT3 *(unsigned char*)0x4805 -#define NOPT3 *(unsigned char*)0x4806 +#define OPT3 *(unsigned char*)0x4805 +#define NOPT3 *(unsigned char*)0x4806 // extclc, awu -#define OPT4 *(unsigned char*)0x4807 -#define NOPT4 *(unsigned char*)0x4808 +#define OPT4 *(unsigned char*)0x4807 +#define NOPT4 *(unsigned char*)0x4808 // HSE stab time -#define OPT5 *(unsigned char*)0x4809 -#define NOPT5 *(unsigned char*)0x480a +#define OPT5 *(unsigned char*)0x4809 +#define NOPT5 *(unsigned char*)0x480a // none -#define OPT6 *(unsigned char*)0x480b -#define NOPT6 *(unsigned char*)0x480c +#define OPT6 *(unsigned char*)0x480b +#define NOPT6 *(unsigned char*)0x480c // none -#define OPT7 *(unsigned char*)0x480d -#define NOPT7 *(unsigned char*)0x480e +#define OPT7 *(unsigned char*)0x480d +#define NOPT7 *(unsigned char*)0x480e // bootloader opt byte -#define OPTBL *(unsigned char*)0x487e -#define NOPTBL *(unsigned char*)0x487f +#define OPTBL *(unsigned char*)0x487e +#define NOPTBL *(unsigned char*)0x487f #endif #endif // __STM8L_H__ -// #define *(unsigned char*)0x +// #define *(unsigned char*)0x