mirror of
https://github.com/eddyem/STM8_samples.git
synced 2025-12-06 02:35:21 +03:00
added uart-SPI interface
This commit is contained in:
eddyem
parent
99a2c601cc
commit
5b3733f12d
34
uart_SPI/Makefile
Normal file
34
uart_SPI/Makefile
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@ -0,0 +1,34 @@
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NAME=uartspi
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SDCC=sdcc
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CCFLAGS=-DSTM8S105 -I../ -I/usr/share/sdcc/include -mstm8 --out-fmt-ihx
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LDFLAGS= -mstm8 --out-fmt-ihx -lstm8
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FLASHFLAGS=-cstlinkv2 -pstm8s105
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SRC=$(wildcard *.c)
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OBJ=$(SRC:%.c=%.rel)
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TRASH=$(OBJ) $(SRC:%.c=%.rst) $(SRC:%.c=%.asm) $(SRC:%.c=%.lst)
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TRASH+=$(SRC:%.c=%.sym) $(NAME).lk $(NAME).map
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INDEPENDENT_HEADERS=../stm8l.h ports_definition.h Makefile
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all: $(NAME).ihx
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#$(SRC) : %.c : %.h $(INDEPENDENT_HEADERS)
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# @touch $@
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#
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#%.h: ;
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clean:
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rm -f $(TRASH)
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load: $(NAME).ihx
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stm8flash $(FLASHFLAGS) -w $(NAME).ihx
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%.rel: %.c
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$(SDCC) $(CCFLAGS) -c $<
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$(NAME).ihx: $(OBJ)
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$(SDCC) $(LDFLAGS) $(OBJ) -o $(NAME).ihx
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.PHONY: all
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171
uart_SPI/interrupts.c
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171
uart_SPI/interrupts.c
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@ -0,0 +1,171 @@
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/*
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* interrupts.c
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*
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* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "ports_definition.h"
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#include "uart.h"
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#include "spi.h"
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// Top Level Interrupt
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INTERRUPT_HANDLER(TLI_IRQHandler, 0){}
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// Auto Wake Up Interrupt
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INTERRUPT_HANDLER(AWU_IRQHandler, 1){}
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// Clock Controller Interrupt
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INTERRUPT_HANDLER(CLK_IRQHandler, 2){}
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// External Interrupt PORTA
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INTERRUPT_HANDLER(EXTI_PORTA_IRQHandler, 3){}
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// External Interrupt PORTB
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INTERRUPT_HANDLER(EXTI_PORTB_IRQHandler, 4){}
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// External Interrupt PORTC
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INTERRUPT_HANDLER(EXTI_PORTC_IRQHandler, 5){
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}
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// External Interrupt PORTD
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INTERRUPT_HANDLER(EXTI_PORTD_IRQHandler, 6){
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}
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// External Interrupt PORTE
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INTERRUPT_HANDLER(EXTI_PORTE_IRQHandler, 7){}
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#ifdef STM8S903
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// External Interrupt PORTF
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INTERRUPT_HANDLER(EXTI_PORTF_IRQHandler, 8){}
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#endif // STM8S903
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#if defined (STM8S208) || defined (STM8AF52Ax)
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// CAN RX Interrupt routine.
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INTERRUPT_HANDLER(CAN_RX_IRQHandler, 8){}
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// CAN TX Interrupt routine.
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INTERRUPT_HANDLER(CAN_TX_IRQHandler, 9){}
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#endif // STM8S208 || STM8AF52Ax
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// SPI Interrupt routine.
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INTERRUPT_HANDLER(SPI_IRQHandler, 10){
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if(SPI_SR & SPI_SR_RXNE){ // RX not empty - send next byte
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spi_send_next();
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}
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}
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// Timer1 Update/Overflow/Trigger/Break Interrupt
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INTERRUPT_HANDLER(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11){
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}
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// Timer1 Capture/Compare Interrupt routine.
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INTERRUPT_HANDLER(TIM1_CAP_COM_IRQHandler, 12){}
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#ifdef STM8S903
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// Timer5 Update/Overflow/Break/Trigger Interrupt
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INTERRUPT_HANDLER(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13){}
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// Timer5 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM5_CAP_COM_IRQHandler, 14){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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// Timer2 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM2_UPD_OVF_BRK_IRQHandler, 13){
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}
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// Timer2 Capture/Compare Interrupt
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// manage with sending/receiving
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INTERRUPT_HANDLER(TIM2_CAP_COM_IRQHandler, 14){
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}
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#endif // STM8S903
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
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defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
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// Timer3 Update/Overflow/Break Interrupt
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INTERRUPT_HANDLER(TIM3_UPD_OVF_BRK_IRQHandler, 15){}
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// Timer3 Capture/Compare Interrupt
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INTERRUPT_HANDLER(TIM3_CAP_COM_IRQHandler, 16){}
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#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
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defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
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// UART1 TX Interrupt
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INTERRUPT_HANDLER(UART1_TX_IRQHandler, 17){}
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// UART1 RX Interrupt
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INTERRUPT_HANDLER(UART1_RX_IRQHandler, 18){}
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#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
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// I2C Interrupt
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INTERRUPT_HANDLER(I2C_IRQHandler, 19){}
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#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
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// UART2 TX interrupt
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INTERRUPT_HANDLER(UART2_TX_IRQHandler, 20){}
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// UART2 RX interrupt
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INTERRUPT_HANDLER(UART2_RX_IRQHandler, 21){
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U8 rb;
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if(UART2_SR & UART_SR_RXNE){ // data received
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rb = UART2_DR; // read received byte & clear RXNE flag
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while(!(UART2_SR & UART_SR_TXE));
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// UART2_DR = rb; // echo received symbol
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UART_rx[UART_rx_cur_i++] = rb; // put received byte into cycled buffer
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if(UART_rx_cur_i == UART_rx_start_i){ // Oops: buffer overflow! Just forget old data
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UART_rx_start_i++;
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check_UART_pointer(UART_rx_start_i);
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}
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check_UART_pointer(UART_rx_cur_i);
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}
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}
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#endif // STM8S105 or STM8AF626x
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// UART3 TX interrupt
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INTERRUPT_HANDLER(UART3_TX_IRQHandler, 20){}
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// UART3 RX interrupt
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INTERRUPT_HANDLER(UART3_RX_IRQHandler, 21){}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// ADC2 interrupt
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INTERRUPT_HANDLER(ADC2_IRQHandler, 22){}
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#else
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// ADC1 interrupt
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INTERRUPT_HANDLER(ADC1_IRQHandler, 22){
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}
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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#ifdef STM8S903
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// Timer6 Update/Overflow/Trigger Interrupt
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INTERRUPT_HANDLER(TIM6_UPD_OVF_TRG_IRQHandler, 23){}
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
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// Timer4 Update/Overflow Interrupt
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INTERRUPT_HANDLER(TIM4_UPD_OVF_IRQHandler, 23){
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if(TIM4_SR & TIM_SR1_UIF){ // update interrupt
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Global_time++; // increase timer
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}
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TIM4_SR = 0; // clear all interrupt flags
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}
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#endif // STM8S903
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// Eeprom EEC Interrupt
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INTERRUPT_HANDLER(EEPROM_EEC_IRQHandler, 24){}
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144
uart_SPI/interrupts.h
Normal file
144
uart_SPI/interrupts.h
Normal file
@ -0,0 +1,144 @@
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/*
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* interrupts.h
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*
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* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
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||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#pragma once
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#ifndef __INTERRUPTS_H__
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#define __INTERRUPTS_H__
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#include "stm8l.h"
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// Top Level Interrupt
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INTERRUPT_DEFINITION(TLI_IRQHandler, 0);
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// Auto Wake Up Interrupt
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INTERRUPT_DEFINITION(AWU_IRQHandler, 1);
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// Clock Controller Interrupt
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INTERRUPT_DEFINITION(CLK_IRQHandler, 2);
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// External Interrupt PORTA
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INTERRUPT_DEFINITION(EXTI_PORTA_IRQHandler, 3);
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// External Interrupt PORTB
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INTERRUPT_DEFINITION(EXTI_PORTB_IRQHandler, 4);
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// External Interrupt PORTC
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INTERRUPT_DEFINITION(EXTI_PORTC_IRQHandler, 5);
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// External Interrupt PORTD
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INTERRUPT_DEFINITION(EXTI_PORTD_IRQHandler, 6);
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// External Interrupt PORTE
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INTERRUPT_DEFINITION(EXTI_PORTE_IRQHandler, 7);
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#ifdef STM8S903
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// External Interrupt PORTF
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INTERRUPT_DEFINITION(EXTI_PORTF_IRQHandler, 8);
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#endif // STM8S903
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#if defined (STM8S208) || defined (STM8AF52Ax)
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// CAN RX Interrupt routine.
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INTERRUPT_DEFINITION(CAN_RX_IRQHandler, 8);
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// CAN TX Interrupt routine.
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INTERRUPT_DEFINITION(CAN_TX_IRQHandler, 9);
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#endif // STM8S208 || STM8AF52Ax
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// SPI Interrupt routine.
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INTERRUPT_DEFINITION(SPI_IRQHandler, 10);
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// Timer1 Update/Overflow/Trigger/Break Interrupt
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INTERRUPT_DEFINITION(TIM1_UPD_OVF_TRG_BRK_IRQHandler, 11);
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// Timer1 Capture/Compare Interrupt routine.
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INTERRUPT_DEFINITION(TIM1_CAP_COM_IRQHandler, 12);
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#ifdef STM8S903
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// Timer5 Update/Overflow/Break/Trigger Interrupt
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INTERRUPT_DEFINITION(TIM5_UPD_OVF_BRK_TRG_IRQHandler, 13);
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// Timer5 Capture/Compare Interrupt
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INTERRUPT_DEFINITION(TIM5_CAP_COM_IRQHandler, 14);
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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// Timer2 Update/Overflow/Break Interrupt
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INTERRUPT_DEFINITION(TIM2_UPD_OVF_BRK_IRQHandler, 13);
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// Timer2 Capture/Compare Interrupt
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INTERRUPT_DEFINITION(TIM2_CAP_COM_IRQHandler, 14);
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#endif // STM8S903
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \
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defined(STM8S005) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8AF626x)
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// Timer3 Update/Overflow/Break Interrupt
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INTERRUPT_DEFINITION(TIM3_UPD_OVF_BRK_IRQHandler, 15);
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// Timer3 Capture/Compare Interrupt
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INTERRUPT_DEFINITION(TIM3_CAP_COM_IRQHandler, 16);
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#endif // STM8S208, STM8S207 or STM8S105 or STM8AF62Ax or STM8AF52Ax or STM8AF626x
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#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S103) || \
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defined(STM8S003) || defined (STM8AF62Ax) || defined (STM8AF52Ax) || defined (STM8S903)
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// UART1 TX Interrupt
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INTERRUPT_DEFINITION(UART1_TX_IRQHandler, 17);
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// UART1 RX Interrupt
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INTERRUPT_DEFINITION(UART1_RX_IRQHandler, 18);
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#endif // STM8S208 or STM8S207 or STM8S103 or STM8S903 or STM8AF62Ax or STM8AF52Ax
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// I2C Interrupt
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INTERRUPT_DEFINITION(I2C_IRQHandler, 19);
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#if defined(STM8S105) || defined(STM8S005) || defined (STM8AF626x)
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// UART2 TX interrupt
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INTERRUPT_DEFINITION(UART2_TX_IRQHandler, 20);
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// UART2 RX interrupt
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INTERRUPT_DEFINITION(UART2_RX_IRQHandler, 21);
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#endif // STM8S105 or STM8AF626x
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// UART3 TX interrupt
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INTERRUPT_DEFINITION(UART3_TX_IRQHandler, 20);
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// UART3 RX interrupt
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INTERRUPT_DEFINITION(UART3_RX_IRQHandler, 21);
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
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#if defined(STM8S207) || defined(STM8S007) || defined(STM8S208) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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// ADC2 interrupt
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INTERRUPT_DEFINITION(ADC2_IRQHandler, 22);
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#else // STM8S105, STM8S103 or STM8S903 or STM8AF626x
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// ADC1 interrupt
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INTERRUPT_DEFINITION(ADC1_IRQHandler, 22);
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#endif // STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax
|
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|
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#ifdef STM8S903
|
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// Timer6 Update/Overflow/Trigger Interrupt
|
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INTERRUPT_DEFINITION(TIM6_UPD_OVF_TRG_IRQHandler, 23);
|
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#else // STM8S208, STM8S207, STM8S105 or STM8S103 or STM8AF52Ax or STM8AF62Ax or STM8AF626x
|
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// Timer4 Update/Overflow Interrupt
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INTERRUPT_DEFINITION(TIM4_UPD_OVF_IRQHandler, 23);
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#endif // STM8S903
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|
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// Eeprom EEC Interrupt
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INTERRUPT_DEFINITION(EEPROM_EEC_IRQHandler, 24);
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|
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#endif // __INTERRUPTS_H__
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112
uart_SPI/main.c
Normal file
112
uart_SPI/main.c
Normal file
@ -0,0 +1,112 @@
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/*
|
||||
* blinky.c
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#include "ports_definition.h"
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#include "interrupts.h"
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#include "uart.h"
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#include "spi.h"
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volatile unsigned long Global_time = 0L; // global time in ms
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U16 paused_val = 500; // interval between LED flashing
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int main() {
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unsigned long T = 0L;
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U8 rb, waitfor = 0;
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U8 *outbuf = "Hello, world";
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U8 inbuf[13] = {0};
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U8 inoutbuf[] = {'G','o','o','d','b','y','e',0};
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CFG_GCR |= 1; // disable SWIM
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// Configure clocking
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CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
|
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// Timer 4 (8 bit) used as system tick timer
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// prescaler == 128 (2^7), Tfreq = 125kHz
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// period = 1ms, so ARR = 125
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TIM4_PSCR = 7;
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TIM4_ARR = 125;
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// interrupts: update
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TIM4_IER = TIM_IER_UIE;
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// auto-reload + interrupt on overflow + enable
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TIM4_CR1 = TIM_CR1_APRE | TIM_CR1_URS | TIM_CR1_CEN;
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|
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// PC2 - PP output (on-board LED)
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PORT(LED_PORT, DDR) |= LED_PIN;
|
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PORT(LED_PORT, CR1) |= LED_PIN;
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uart_init();
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spi_init();
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// enable all interrupts
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enableInterrupts();
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// Loop
|
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do{
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if((Global_time - T > paused_val) || (T > Global_time)){
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T = Global_time;
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PORT(LED_PORT, ODR) ^= LED_PIN; // blink on-board LED
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}
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if(waitfor && spi_buf_sent()){
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if(waitfor == 1)
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uart_write(inbuf);
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else
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uart_write(inoutbuf);
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waitfor = 0;
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}
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if(UART_read_byte(&rb)){ // buffer isn't empty
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switch(rb){
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case 'h': // help
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case 'H':
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UART_send_byte(rb);
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uart_write("\nPROTO:\n+/-\tLED period\n"
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);
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break;
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||||
case '+':
|
||||
UART_send_byte(rb);
|
||||
paused_val += 100;
|
||||
if(paused_val > 10000)
|
||||
paused_val = 500; // but not more than 10s
|
||||
break;
|
||||
case '-':
|
||||
UART_send_byte(rb);
|
||||
paused_val -= 100;
|
||||
if(paused_val < 500) // but not less than 0.5s
|
||||
paused_val = 500;
|
||||
break;
|
||||
case 's':
|
||||
spi_init();
|
||||
break;
|
||||
case 'b':
|
||||
printUHEX(SPI_SR);
|
||||
break;
|
||||
case '1':
|
||||
spi_send_buffer(outbuf, 12, inbuf);
|
||||
waitfor = 1;
|
||||
break;
|
||||
case '2':
|
||||
spi_send_buffer(inoutbuf, 7, inoutbuf);
|
||||
waitfor = 2;
|
||||
break;
|
||||
default:
|
||||
UART_send_byte(spi_send_byte(rb)); // send received byte to SPI & write ans to UART
|
||||
}
|
||||
}
|
||||
}while(1);
|
||||
}
|
||||
|
||||
|
||||
46
uart_SPI/ports_definition.h
Normal file
46
uart_SPI/ports_definition.h
Normal file
@ -0,0 +1,46 @@
|
||||
/*
|
||||
* ports_definition.h - definition of ports pins & so on
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#ifndef __PORTS_DEFINITION_H__
|
||||
#define __PORTS_DEFINITION_H__
|
||||
|
||||
#include "stm8l.h"
|
||||
|
||||
// macro for using in port constructions like PORT(LED_PORT, ODR) = xx
|
||||
#define CONCAT(a, b) a ## _ ## b
|
||||
#define PORT(a, b) CONCAT(a , b)
|
||||
|
||||
// on-board LED
|
||||
#define LED_PORT PC
|
||||
#define LED_PIN GPIO_PIN2
|
||||
|
||||
// UART2_TX
|
||||
#define UART_PORT PD
|
||||
#define UART_TX_PIN GPIO_PIN5
|
||||
|
||||
// SPI pins: SCK - PC5, MOSI - PC6, MISO - PC7
|
||||
#define SPI_PORT PC
|
||||
#define SPI_SCK_PIN GPIO_PIN5
|
||||
#define SPI_MOSI_PIN GPIO_PIN6
|
||||
#define SPI_MISO_PIN GPIO_PIN7
|
||||
|
||||
#endif // __PORTS_DEFINITION_H__
|
||||
107
uart_SPI/spi.c
Normal file
107
uart_SPI/spi.c
Normal file
@ -0,0 +1,107 @@
|
||||
/*
|
||||
* spi.c
|
||||
*
|
||||
* Copyright 2016 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "ports_definition.h"
|
||||
#include "spi.h"
|
||||
|
||||
// global variables for sending big buffer
|
||||
static U16 sendbuflen = 0;
|
||||
static U8 *sendbuf = NULL, *inbuff = NULL;
|
||||
|
||||
/*
|
||||
* SPI registers
|
||||
* SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA |
|
||||
* BR: xxx - f/2^{xxx+1}
|
||||
* 01111100
|
||||
* SPI_CR2 (page 272): | BDM | BDOE | CRCEN | CRCNEXT | - | RXONLY | SSM | SSI |
|
||||
* 00000000
|
||||
* SPI_ICR (page 273): | TXIE | RXIE | ERRIE | WKIE | - | - | - | - |
|
||||
* SPI_SR (page 274): | BSY | OVR | MODF | CRCERR | WKUP | - | TXE | RXNE |
|
||||
* set it to zero before send new byte
|
||||
*/
|
||||
|
||||
void spi_init(){
|
||||
// pins config: MISO is pullup in, MOSI & SCK are pp out
|
||||
PORT(SPI_PORT, DDR) |= SPI_MOSI_PIN | SPI_SCK_PIN;
|
||||
PORT(SPI_PORT, CR1) |= SPI_MOSI_PIN | SPI_SCK_PIN | SPI_MISO_PIN;
|
||||
// setup line: f/256, enable, master
|
||||
SPI_CR1 = SPI_CR1_SPE | SPI_CR1_BRMASK | SPI_CR1_MSTR;
|
||||
SPI_CR2 = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* static routine waiting SPI free
|
||||
*/
|
||||
static void spi_wait(){
|
||||
while(!(SPI_SR & SPI_SR_TXE))
|
||||
while(SPI_SR & SPI_SR_BSY);
|
||||
}
|
||||
|
||||
/**
|
||||
* send given data buffer
|
||||
* WARNING! Buffer should have livetime at least while !spi_buf_sent()
|
||||
* set _get == 1 to put received data into the same buffer
|
||||
*/
|
||||
void spi_send_buffer(U8 *buff, U16 len, U8 *inb){
|
||||
inbuff = inb;
|
||||
sendbuflen = len;
|
||||
sendbuf = buff;
|
||||
spi_wait();
|
||||
SPI_DR = *sendbuf;
|
||||
// interrupts: RXNE
|
||||
SPI_ICR = SPI_ICR_RXIE;
|
||||
}
|
||||
|
||||
/**
|
||||
* send next byte from sendbuf (called by interrupt routine)
|
||||
*/
|
||||
void spi_send_next(){
|
||||
if(!sendbuf) return;
|
||||
if(inbuff){
|
||||
//while(!(SPI_SR & SPI_SR_RXNE));
|
||||
*inbuff++ = SPI_DR;
|
||||
}
|
||||
if(--sendbuflen == 0){
|
||||
sendbuf = NULL;
|
||||
SPI_ICR = 0;
|
||||
return;
|
||||
}
|
||||
SPI_DR = *(++sendbuf);
|
||||
}
|
||||
|
||||
/**
|
||||
* blocking send 1 byte & return ansver
|
||||
*/
|
||||
U8 spi_send_byte(U8 data){
|
||||
spi_wait();
|
||||
SPI_ICR = 0;
|
||||
SPI_DR = data;
|
||||
while(!(SPI_SR & SPI_SR_RXNE));
|
||||
return SPI_DR;
|
||||
}
|
||||
|
||||
/**
|
||||
* return 1 if there's no data in queue to send
|
||||
*/
|
||||
U8 spi_buf_sent(){
|
||||
if(!sendbuf) return 1;
|
||||
else return 0;
|
||||
}
|
||||
32
uart_SPI/spi.h
Normal file
32
uart_SPI/spi.h
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* spi.h
|
||||
*
|
||||
* Copyright 2016 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#pragma once
|
||||
#ifndef __SPI_H__
|
||||
#define __SPI_H__
|
||||
|
||||
void spi_init();
|
||||
void spi_send_next();
|
||||
void spi_send_buffer_blocking(U8 *buff, U16 len, U8 *inb);
|
||||
void spi_send_buffer(U8 *buff, U16 len, U8 *inbuf);
|
||||
U8 spi_send_byte(U8 data);
|
||||
U8 spi_buf_sent();
|
||||
|
||||
#endif // __SPI_H__
|
||||
561
uart_SPI/stm8l.h
Normal file
561
uart_SPI/stm8l.h
Normal file
@ -0,0 +1,561 @@
|
||||
/*
|
||||
* stm8l.h
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
|
||||
#pragma once
|
||||
#ifndef __STM8L_H__
|
||||
#define __STM8L_H__
|
||||
|
||||
typedef unsigned char U8;
|
||||
typedef unsigned int U16;
|
||||
typedef unsigned long U32;
|
||||
#define NULL (void*)0
|
||||
|
||||
/* functions */
|
||||
#define enableInterrupts() {__asm__("rim\n");} // enable interrupts
|
||||
#define disableInterrupts() {__asm__("sim\n");} // disable interrupts
|
||||
#define iret() {__asm__("iret\n");} // Interrupt routine return
|
||||
#define pop_ccr() {__asm__("pop cc\n");} // Pop CCR from the stack
|
||||
#define push_ccr() {__asm__("push cc\n");}// Push CCR on the stack
|
||||
#define rim() {__asm__("rim\n");} // enable interrupts
|
||||
#define sim() {__asm__("sim\n");} // disable interrupts
|
||||
#define nop() {__asm__("nop\n");} // No Operation
|
||||
#define trap() {__asm__("trap\n");} // Trap (soft IT)
|
||||
#define wfi() {__asm__("wfi\n");} // Wait For Interrupt
|
||||
#define halt() {__asm__("halt\n");} // Halt
|
||||
|
||||
/*
|
||||
* Registers map is shown in short datasheet, page 26
|
||||
*/
|
||||
/* GPIO */
|
||||
#define PA_ODR *(unsigned char*)0x5000
|
||||
#define PA_IDR *(unsigned char*)0x5001
|
||||
#define PA_DDR *(unsigned char*)0x5002
|
||||
#define PA_CR1 *(unsigned char*)0x5003
|
||||
#define PA_CR2 *(unsigned char*)0x5004
|
||||
|
||||
#define PB_ODR *(unsigned char*)0x5005
|
||||
#define PB_IDR *(unsigned char*)0x5006
|
||||
#define PB_DDR *(unsigned char*)0x5007
|
||||
#define PB_CR1 *(unsigned char*)0x5008
|
||||
#define PB_CR2 *(unsigned char*)0x5009
|
||||
|
||||
#define PC_ODR *(unsigned char*)0x500A
|
||||
#define PC_IDR *(unsigned char*)0x500B
|
||||
#define PC_DDR *(unsigned char*)0x500C
|
||||
#define PC_CR1 *(unsigned char*)0x500D
|
||||
#define PC_CR2 *(unsigned char*)0x500E
|
||||
|
||||
#define PD_ODR *(unsigned char*)0x500F
|
||||
#define PD_IDR *(unsigned char*)0x5010
|
||||
#define PD_DDR *(unsigned char*)0x5011
|
||||
#define PD_CR1 *(unsigned char*)0x5012
|
||||
#define PD_CR2 *(unsigned char*)0x5013
|
||||
|
||||
#define PE_ODR *(unsigned char*)0x5014
|
||||
#define PE_IDR *(unsigned char*)0x5015
|
||||
#define PE_DDR *(unsigned char*)0x5016
|
||||
#define PE_CR1 *(unsigned char*)0x5017
|
||||
#define PE_CR2 *(unsigned char*)0x5018
|
||||
|
||||
#define PF_ODR *(unsigned char*)0x5019
|
||||
#define PF_IDR *(unsigned char*)0x501A
|
||||
#define PF_DDR *(unsigned char*)0x501B
|
||||
#define PF_CR1 *(unsigned char*)0x501C
|
||||
#define PF_CR2 *(unsigned char*)0x501D
|
||||
|
||||
#ifdef STM8S105
|
||||
#define PG_ODR *(unsigned char*)0x501E
|
||||
#define PG_IDR *(unsigned char*)0x501F
|
||||
#define PG_DDR *(unsigned char*)0x5020
|
||||
#define PG_CR1 *(unsigned char*)0x5021
|
||||
#define PG_CR2 *(unsigned char*)0x5022
|
||||
|
||||
#define PH_ODR *(unsigned char*)0x5023
|
||||
#define PH_IDR *(unsigned char*)0x5024
|
||||
#define PH_DDR *(unsigned char*)0x5025
|
||||
#define PH_CR1 *(unsigned char*)0x5026
|
||||
#define PH_CR2 *(unsigned char*)0x5027
|
||||
|
||||
#define PI_ODR *(unsigned char*)0x5028
|
||||
#define PI_IDR *(unsigned char*)0x5029
|
||||
#define PI_DDR *(unsigned char*)0x502A
|
||||
#define PI_CR1 *(unsigned char*)0x502B
|
||||
#define PI_CR2 *(unsigned char*)0x502C
|
||||
#endif // STM8S105
|
||||
|
||||
/* GPIO bits */
|
||||
#define GPIO_PIN0 (1 << 0)
|
||||
#define GPIO_PIN1 (1 << 1)
|
||||
#define GPIO_PIN2 (1 << 2)
|
||||
#define GPIO_PIN3 (1 << 3)
|
||||
#define GPIO_PIN4 (1 << 4)
|
||||
#define GPIO_PIN5 (1 << 5)
|
||||
#define GPIO_PIN6 (1 << 6)
|
||||
#define GPIO_PIN7 (1 << 7)
|
||||
|
||||
/* -------------------- FLASH/EEPROM -------------------- */
|
||||
#define FLASH_CR1 *(unsigned char*)0x505A
|
||||
#define FLASH_CR2 *(unsigned char*)0x505B
|
||||
#define FLASH_NCR2 *(unsigned char*)0x505C
|
||||
#define FLASH_FPR *(unsigned char*)0x505D
|
||||
#define FLASH_NFPR *(unsigned char*)0x505E
|
||||
#define FLASH_IAPSR *(unsigned char*)0x505F
|
||||
#define FLASH_PUKR *(unsigned char*)0x5062 // progmem unprotection
|
||||
#define FLASH_DUKR *(unsigned char*)0x5064 // EEPROM unprotection
|
||||
|
||||
#define EEPROM_KEY1 0xAE // keys to manage EEPROM's write access
|
||||
#define EEPROM_KEY2 0x56
|
||||
#define EEPROM_START_ADDR (unsigned char*)0x4000
|
||||
|
||||
/* ------------------- interrupts ------------------- */
|
||||
#define EXTI_CR1 *(unsigned char*)0x50A0
|
||||
#define EXTI_CR2 *(unsigned char*)0x50A1
|
||||
#define INTERRUPT_HANDLER(fn, num) void fn() __interrupt(num)
|
||||
#define INTERRUPT_DEFINITION(fn, num) extern void fn() __interrupt(num)
|
||||
|
||||
// Reset status register
|
||||
#define RST_SR *(unsigned char*)0x50B3
|
||||
|
||||
/* ------------------- CLOCK ------------------- */
|
||||
#define CLK_ICKR *(unsigned char*)0x50C0
|
||||
#define CLK_ECKR *(unsigned char*)0x50C1
|
||||
#define CLK_CMSR *(unsigned char*)0x50C3
|
||||
#define CLK_SWR *(unsigned char*)0x50C4
|
||||
#define CLK_SWCR *(unsigned char*)0x50C5
|
||||
#define CLK_CKDIVR *(unsigned char*)0x50C6
|
||||
#define CLK_SPCKENR1 *(unsigned char*)0x50C7
|
||||
#define CLK_CSSR *(unsigned char*)0x50C8
|
||||
#define CLK_CCOR *(unsigned char*)0x50C9
|
||||
#define CLK_PCKENR2 *(unsigned char*)0x50CA
|
||||
#define CLK_HSITRIMR *(unsigned char*)0x50CC
|
||||
#define CLK_SWIMCCR *(unsigned char*)0x50CD
|
||||
|
||||
/* ------------------- Watchdog ------------------ */
|
||||
#define WWDG_CR *(unsigned char*)0x50D1
|
||||
#define WWDG_WR *(unsigned char*)0x50D2
|
||||
#define IWDG_KR *(unsigned char*)0x50E0
|
||||
#define IWDG_PR *(unsigned char*)0x50E1
|
||||
#define IWDG_RLR *(unsigned char*)0x50E2
|
||||
|
||||
/* ------------------- AWU, BEEP ------------------- */
|
||||
#define AWU_CSR1 *(unsigned char*)0x50F0
|
||||
#define AWU_APR *(unsigned char*)0x50F1
|
||||
#define AWU_TBR *(unsigned char*)0x50F2
|
||||
#define BEEP_CSR *(unsigned char*)0x50F3
|
||||
|
||||
/* ------------------- SPI ------------------- */
|
||||
#define SPI_CR1 *(unsigned char*)0x5200
|
||||
#define SPI_CR2 *(unsigned char*)0x5201
|
||||
#define SPI_ICR *(unsigned char*)0x5202
|
||||
#define SPI_SR *(unsigned char*)0x5203
|
||||
#define SPI_DR *(unsigned char*)0x5204
|
||||
#define SPI_CRCPR *(unsigned char*)0x5205
|
||||
#define SPI_RXCRCR *(unsigned char*)0x5206
|
||||
#define SPI_TXCRCR *(unsigned char*)0x5207
|
||||
// SPI_CR1 (page 271): | LSBFIRST | SPE | BR[2:0] | MSTR | CPOL | CPHA |
|
||||
#define SPI_CR1_LSBFIRST (1<<7)
|
||||
#define SPI_CR1_SPE (1<<6)
|
||||
#define SPI_CR1_BRMASK (0x38)
|
||||
#define SPI_CR1_MSTR (1<<2)
|
||||
#define SPI_CR1_CPOL (1<<1)
|
||||
#define SPI_CR1_CPHA (1)
|
||||
// SPI_CR2 (page 272): | BDM | BDOE | CRCEN | CRCNEXT | - | RXONLY | SSM | SSI |
|
||||
#define SPI_CR2_BDM (1<<7)
|
||||
#define SPI_CR2_BDOE (1<<6)
|
||||
#define SPI_CR2_CRCEN (1<<5)
|
||||
#define SPI_CR2_CRCNEXT (1<<4)
|
||||
#define SPI_CR2_RXONLY (1<<2)
|
||||
#define SPI_CR2_SSM (1<<1)
|
||||
#define SPI_CR2_SSI (1)
|
||||
// SPI_ICR (page 273): | TXIE | RXIE | ERRIE | WKIE | - | - | - | - |
|
||||
#define SPI_ICR_TXIE (1<<7)
|
||||
#define SPI_ICR_RXIE (1<<6)
|
||||
#define SPI_ICR_ERRIE (1<<5)
|
||||
#define SPI_ICR_WKIE (1<<4)
|
||||
// SPI_SR (page 274): | BSY | OVR | MODF | CRCERR | WKUP | - | TXE | RXNE |
|
||||
#define SPI_SR_BSY (1<<7)
|
||||
#define SPI_SR_OVR (1<<6)
|
||||
#define SPI_SR_MODF (1<<5)
|
||||
#define SPI_SR_CRCERR (1<<4)
|
||||
#define SPI_SR_WKUP (1<<3)
|
||||
#define SPI_SR_TXE (1<<1)
|
||||
#define SPI_SR_RXNE (1)
|
||||
|
||||
/* ------------------- I2C ------------------- */
|
||||
#define I2C_CR1 *(unsigned char*)0x5210
|
||||
#define I2C_CR2 *(unsigned char*)0x5211
|
||||
#define I2C_FREQR *(unsigned char*)0x5212
|
||||
#define I2C_OARL *(unsigned char*)0x5213
|
||||
#define I2C_OARH *(unsigned char*)0x5214
|
||||
#define I2C_DR *(unsigned char*)0x5216
|
||||
#define I2C_SR1 *(unsigned char*)0x5217
|
||||
#define I2C_SR2 *(unsigned char*)0x5218
|
||||
#define I2C_SR3 *(unsigned char*)0x5219
|
||||
#define I2C_ITR *(unsigned char*)0x521A
|
||||
#define I2C_CCRL *(unsigned char*)0x521B
|
||||
#define I2C_CCRH *(unsigned char*)0x521C
|
||||
#define I2C_TRISER *(unsigned char*)0x521D
|
||||
#define I2C_PECR *(unsigned char*)0x521E
|
||||
|
||||
/* ------------------- UART ------------------- */
|
||||
#ifdef STM8S003
|
||||
#define UART1_SR *(unsigned char*)0x5230
|
||||
#define UART1_DR *(unsigned char*)0x5231
|
||||
#define UART1_BRR1 *(unsigned char*)0x5232
|
||||
#define UART1_BRR2 *(unsigned char*)0x5233
|
||||
#define UART1_CR1 *(unsigned char*)0x5234
|
||||
#define UART1_CR2 *(unsigned char*)0x5235
|
||||
#define UART1_CR3 *(unsigned char*)0x5236
|
||||
#define UART1_CR4 *(unsigned char*)0x5237
|
||||
#define UART1_CR5 *(unsigned char*)0x5238
|
||||
#define UART1_GTR *(unsigned char*)0x5239
|
||||
#define UART1_PSCR *(unsigned char*)0x523A
|
||||
#endif // STM8S003
|
||||
#ifdef STM8S105
|
||||
#define UART2_SR *(unsigned char*)0x5240
|
||||
#define UART2_DR *(unsigned char*)0x5241
|
||||
#define UART2_BRR1 *(unsigned char*)0x5242
|
||||
#define UART2_BRR2 *(unsigned char*)0x5243
|
||||
#define UART2_CR1 *(unsigned char*)0x5244
|
||||
#define UART2_CR2 *(unsigned char*)0x5245
|
||||
#define UART2_CR3 *(unsigned char*)0x5246
|
||||
#define UART2_CR4 *(unsigned char*)0x5247
|
||||
#define UART2_CR5 *(unsigned char*)0x5248
|
||||
#define UART2_CR6 *(unsigned char*)0x5249
|
||||
#define UART2_GTR *(unsigned char*)0x524A
|
||||
#define UART2_PSCR *(unsigned char*)0x524B
|
||||
#endif // STM8S105
|
||||
|
||||
/* UART_CR1 bits */
|
||||
#define UART_CR1_R8 (1 << 7)
|
||||
#define UART_CR1_T8 (1 << 6)
|
||||
#define UART_CR1_UARTD (1 << 5)
|
||||
#define UART_CR1_M (1 << 4)
|
||||
#define UART_CR1_WAKE (1 << 3)
|
||||
#define UART_CR1_PCEN (1 << 2)
|
||||
#define UART_CR1_PS (1 << 1)
|
||||
#define UART_CR1_PIEN (1 << 0)
|
||||
|
||||
/* UART_CR2 bits */
|
||||
#define UART_CR2_TIEN (1 << 7)
|
||||
#define UART_CR2_TCIEN (1 << 6)
|
||||
#define UART_CR2_RIEN (1 << 5)
|
||||
#define UART_CR2_ILIEN (1 << 4)
|
||||
#define UART_CR2_TEN (1 << 3)
|
||||
#define UART_CR2_REN (1 << 2)
|
||||
#define UART_CR2_RWU (1 << 1)
|
||||
#define UART_CR2_SBK (1 << 0)
|
||||
|
||||
/* USART_CR3 bits */
|
||||
#define UART_CR3_LINEN (1 << 6)
|
||||
#define UART_CR3_STOP2 (1 << 5)
|
||||
#define UART_CR3_STOP1 (1 << 4)
|
||||
#define UART_CR3_CLKEN (1 << 3)
|
||||
#define UART_CR3_CPOL (1 << 2)
|
||||
#define UART_CR3_CPHA (1 << 1)
|
||||
#define UART_CR3_LBCL (1 << 0)
|
||||
|
||||
/* UART_SR bits */
|
||||
#define UART_SR_TXE (1 << 7)
|
||||
#define UART_SR_TC (1 << 6)
|
||||
#define UART_SR_RXNE (1 << 5)
|
||||
#define UART_SR_IDLE (1 << 4)
|
||||
#define UART_SR_OR (1 << 3)
|
||||
#define UART_SR_NF (1 << 2)
|
||||
#define UART_SR_FE (1 << 1)
|
||||
#define UART_SR_PE (1 << 0)
|
||||
|
||||
|
||||
/* ------------------- TIMERS ------------------- */
|
||||
/* TIM1 */
|
||||
#define TIM1_CR1 *(unsigned char*)0x5250
|
||||
#define TIM1_CR2 *(unsigned char*)0x5251
|
||||
#define TIM1_SMCR *(unsigned char*)0x5252
|
||||
#define TIM1_ETR *(unsigned char*)0x5253
|
||||
#define TIM1_IER *(unsigned char*)0x5254
|
||||
#define TIM1_SR1 *(unsigned char*)0x5255
|
||||
#define TIM1_SR2 *(unsigned char*)0x5256
|
||||
#define TIM1_EGR *(unsigned char*)0x5257
|
||||
#define TIM1_CCMR1 *(unsigned char*)0x5258
|
||||
#define TIM1_CCMR2 *(unsigned char*)0x5259
|
||||
#define TIM1_CCMR3 *(unsigned char*)0x525A
|
||||
#define TIM1_CCMR4 *(unsigned char*)0x525B
|
||||
#define TIM1_CCER1 *(unsigned char*)0x525C
|
||||
#define TIM1_CCER2 *(unsigned char*)0x525D
|
||||
#define TIM1_CNTRH *(unsigned char*)0x525E
|
||||
#define TIM1_CNTRL *(unsigned char*)0x525F
|
||||
#define TIM1_PSCRH *(unsigned char*)0x5260
|
||||
#define TIM1_PSCRL *(unsigned char*)0x5261
|
||||
#define TIM1_ARRH *(unsigned char*)0x5262
|
||||
#define TIM1_ARRL *(unsigned char*)0x5263
|
||||
#define TIM1_RCR *(unsigned char*)0x5264
|
||||
#define TIM1_CCR1H *(unsigned char*)0x5265
|
||||
#define TIM1_CCR1L *(unsigned char*)0x5266
|
||||
#define TIM1_CCR2H *(unsigned char*)0x5267
|
||||
#define TIM1_CCR2L *(unsigned char*)0x5268
|
||||
#define TIM1_CCR3H *(unsigned char*)0x5269
|
||||
#define TIM1_CCR3L *(unsigned char*)0x526A
|
||||
#define TIM1_CCR4H *(unsigned char*)0x526B
|
||||
#define TIM1_CCR4L *(unsigned char*)0x526C
|
||||
#define TIM1_BKR *(unsigned char*)0x526D
|
||||
#define TIM1_DTR *(unsigned char*)0x526E
|
||||
#define TIM1_OISR *(unsigned char*)0x526F
|
||||
|
||||
|
||||
/* TIM_IER bits */
|
||||
#define TIM_IER_BIE (1 << 7)
|
||||
#define TIM_IER_TIE (1 << 6)
|
||||
#define TIM_IER_COMIE (1 << 5)
|
||||
#define TIM_IER_CC4IE (1 << 4)
|
||||
#define TIM_IER_CC3IE (1 << 3)
|
||||
#define TIM_IER_CC2IE (1 << 2)
|
||||
#define TIM_IER_CC1IE (1 << 1)
|
||||
#define TIM_IER_UIE (1 << 0)
|
||||
|
||||
/* TIM_CR1 bits */
|
||||
#define TIM_CR1_APRE (1 << 7)
|
||||
#define TIM_CR1_CMSH (1 << 6)
|
||||
#define TIM_CR1_CMSL (1 << 5)
|
||||
#define TIM_CR1_DIR (1 << 4)
|
||||
#define TIM_CR1_OPM (1 << 3)
|
||||
#define TIM_CR1_URS (1 << 2)
|
||||
#define TIM_CR1_UDIS (1 << 1)
|
||||
#define TIM_CR1_CEN (1 << 0)
|
||||
|
||||
/* TIM_SR1 bits */
|
||||
#define TIM_SR1_BIF (1 << 7)
|
||||
#define TIM_SR1_TIF (1 << 6)
|
||||
#define TIM_SR1_COMIF (1 << 5)
|
||||
#define TIM_SR1_CC4IF (1 << 4)
|
||||
#define TIM_SR1_CC3IF (1 << 3)
|
||||
#define TIM_SR1_CC2IF (1 << 2)
|
||||
#define TIM_SR1_CC1IF (1 << 1)
|
||||
#define TIM_SR1_UIF (1 << 0)
|
||||
|
||||
/* TIM_EGR bits */
|
||||
#define TIM_EGR_BG (1 << 7)
|
||||
#define TIM_EGR_TG (1 << 6)
|
||||
#define TIM_EGR_COMG (1 << 5)
|
||||
#define TIM_EGR_CC4G (1 << 4)
|
||||
#define TIM_EGR_CC3G (1 << 3)
|
||||
#define TIM_EGR_CC2G (1 << 2)
|
||||
#define TIM_EGR_CC1G (1 << 1)
|
||||
#define TIM_EGR_UG (1 << 0)
|
||||
|
||||
|
||||
/* TIM2 */
|
||||
#define TIM2_CR1 *(unsigned char*)0x5300
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM2_IER *(unsigned char*)0x5301
|
||||
#define TIM2_SR1 *(unsigned char*)0x5302
|
||||
#define TIM2_SR2 *(unsigned char*)0x5303
|
||||
#define TIM2_EGR *(unsigned char*)0x5304
|
||||
#define TIM2_CCMR1 *(unsigned char*)0x5305
|
||||
#define TIM2_CCMR2 *(unsigned char*)0x5306
|
||||
#define TIM2_CCMR3 *(unsigned char*)0x5307
|
||||
#define TIM2_CCER1 *(unsigned char*)0x5308
|
||||
#define TIM2_CCER2 *(unsigned char*)0x5309
|
||||
#define TIM2_CNTRH *(unsigned char*)0x530A
|
||||
#define TIM2_CNTRL *(unsigned char*)0x530B
|
||||
#define TIM2_PSCR *(unsigned char*)0x530C
|
||||
#define TIM2_ARRH *(unsigned char*)0x530D
|
||||
#define TIM2_ARRL *(unsigned char*)0x530E
|
||||
#define TIM2_CCR1H *(unsigned char*)0x530F
|
||||
#define TIM2_CCR1L *(unsigned char*)0x5310
|
||||
#define TIM2_CCR2H *(unsigned char*)0x5311
|
||||
#define TIM2_CCR2L *(unsigned char*)0x5312
|
||||
#define TIM2_CCR3H *(unsigned char*)0x5313
|
||||
#define TIM2_CCR3L *(unsigned char*)0x5314
|
||||
#elif defined STM8S003
|
||||
#define TIM2_IER *(unsigned char*)0x5303
|
||||
#define TIM2_SR1 *(unsigned char*)0x5304
|
||||
#define TIM2_SR2 *(unsigned char*)0x5305
|
||||
#define TIM2_EGR *(unsigned char*)0x5306
|
||||
#define TIM2_CCMR1 *(unsigned char*)0x5307
|
||||
#define TIM2_CCMR2 *(unsigned char*)0x5308
|
||||
#define TIM2_CCMR3 *(unsigned char*)0x5309
|
||||
#define TIM2_CCER1 *(unsigned char*)0x530A
|
||||
#define TIM2_CCER2 *(unsigned char*)0x530B
|
||||
#define TIM2_CNTRH *(unsigned char*)0x530C
|
||||
#define TIM2_CNTRL *(unsigned char*)0x530D
|
||||
#define TIM2_PSCR *(unsigned char*)0x530E
|
||||
#define TIM2_ARRH *(unsigned char*)0x530F
|
||||
#define TIM2_ARRL *(unsigned char*)0x5310
|
||||
#define TIM2_CCR1H *(unsigned char*)0x5311
|
||||
#define TIM2_CCR1L *(unsigned char*)0x5312
|
||||
#define TIM2_CCR2H *(unsigned char*)0x5313
|
||||
#define TIM2_CCR2L *(unsigned char*)0x5314
|
||||
#define TIM2_CCR3H *(unsigned char*)0x5315
|
||||
#define TIM2_CCR3L *(unsigned char*)0x5316
|
||||
#endif
|
||||
|
||||
|
||||
/* TIM3 */
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM3_CR1 *(unsigned char*)0x5320
|
||||
#define TIM3_IER *(unsigned char*)0x5321
|
||||
#define TIM3_SR1 *(unsigned char*)0x5322
|
||||
#define TIM3_SR2 *(unsigned char*)0x5323
|
||||
#define TIM3_EGR *(unsigned char*)0x5324
|
||||
#define TIM3_CCMR1 *(unsigned char*)0x5325
|
||||
#define TIM3_CCMR2 *(unsigned char*)0x5326
|
||||
#define TIM3_CCER1 *(unsigned char*)0x5327
|
||||
#define TIM3_CNTRH *(unsigned char*)0x5328
|
||||
#define TIM3_CNTRL *(unsigned char*)0x5329
|
||||
#define TIM3_PSCR *(unsigned char*)0x532A
|
||||
#define TIM3_ARRH *(unsigned char*)0x532B
|
||||
#define TIM3_ARRL *(unsigned char*)0x532C
|
||||
#define TIM3_CCR1H *(unsigned char*)0x532D
|
||||
#define TIM3_CCR1L *(unsigned char*)0x532E
|
||||
#define TIM3_CCR2H *(unsigned char*)0x532F
|
||||
#define TIM3_CCR2L *(unsigned char*)0x5330
|
||||
#endif
|
||||
|
||||
/* TIM4 */
|
||||
#define TIM4_CR1 *(unsigned char*)0x5340
|
||||
#if defined STM8S105 || defined STM8S103
|
||||
#define TIM4_IER *(unsigned char*)0x5341
|
||||
#define TIM4_SR *(unsigned char*)0x5342
|
||||
#define TIM4_EGR *(unsigned char*)0x5343
|
||||
#define TIM4_CNTR *(unsigned char*)0x5344
|
||||
#define TIM4_PSCR *(unsigned char*)0x5345
|
||||
#define TIM4_ARR *(unsigned char*)0x5346
|
||||
#elif defined STM8S003
|
||||
#define TIM4_IER *(unsigned char*)0x5343
|
||||
#define TIM4_SR *(unsigned char*)0x5344
|
||||
#define TIM4_EGR *(unsigned char*)0x5345
|
||||
#define TIM4_CNTR *(unsigned char*)0x5346
|
||||
#define TIM4_PSCR *(unsigned char*)0x5347
|
||||
#define TIM4_ARR *(unsigned char*)0x5348
|
||||
#endif
|
||||
|
||||
/* ------------------- ADC ------------------- */
|
||||
#define ADC_DB0RH *(unsigned char*)0x53E0
|
||||
#define ADC_DB0RL *(unsigned char*)0x53E1
|
||||
#define ADC_DB1RH *(unsigned char*)0x53E2
|
||||
#define ADC_DB1RL *(unsigned char*)0x53E3
|
||||
#define ADC_DB2RH *(unsigned char*)0x53E4
|
||||
#define ADC_DB2RL *(unsigned char*)0x53E5
|
||||
#define ADC_DB3RH *(unsigned char*)0x53E6
|
||||
#define ADC_DB3RL *(unsigned char*)0x53E7
|
||||
#define ADC_DB4RH *(unsigned char*)0x53E8
|
||||
#define ADC_DB4RL *(unsigned char*)0x53E9
|
||||
#define ADC_DB5RH *(unsigned char*)0x53EA
|
||||
#define ADC_DB5RL *(unsigned char*)0x53EB
|
||||
#define ADC_DB6RH *(unsigned char*)0x53EC
|
||||
#define ADC_DB6RL *(unsigned char*)0x53ED
|
||||
#define ADC_DB7RH *(unsigned char*)0x53EE
|
||||
#define ADC_DB7RL *(unsigned char*)0x53EF
|
||||
#define ADC_DB8RH *(unsigned char*)0x53F0
|
||||
#define ADC_DB8RL *(unsigned char*)0x53F1
|
||||
#define ADC_DB9RH *(unsigned char*)0x53F2
|
||||
#define ADC_DB9RL *(unsigned char*)0x53F3
|
||||
#define ADC_CSR *(unsigned char*)0x5400
|
||||
#define ADC_CR1 *(unsigned char*)0x5401
|
||||
#define ADC_CR2 *(unsigned char*)0x5402
|
||||
#define ADC_CR3 *(unsigned char*)0x5403
|
||||
#define ADC_DRH *(unsigned char*)0x5404
|
||||
#define ADC_DRL *(unsigned char*)0x5405
|
||||
#define ADC_TDRH *(unsigned char*)0x5406
|
||||
#define ADC_TDRL *(unsigned char*)0x5407
|
||||
#define ADC_HTRH *(unsigned char*)0x5408
|
||||
#define ADC_HTRL *(unsigned char*)0x5409
|
||||
#define ADC_LTRH *(unsigned char*)0x540A
|
||||
#define ADC_LTRL *(unsigned char*)0x540B
|
||||
#define ADC_AWSRH *(unsigned char*)0x540C
|
||||
#define ADC_AWSRL *(unsigned char*)0x540D
|
||||
#define ADC_AWCRH *(unsigned char*)0x540E
|
||||
#define ADC_AWCRL *(unsigned char*)0x540F
|
||||
|
||||
/* ------------------- swim control ------------------- */
|
||||
#define CFG_GCR *(unsigned char*)0x7F60
|
||||
#define SWIM_CSR *(unsigned char*)0x7F80
|
||||
|
||||
/* ------------------- ITC ------------------- */
|
||||
#define ITC_SPR1 *(unsigned char*)0x7F70
|
||||
#define ITC_SPR2 *(unsigned char*)0x7F71
|
||||
#define ITC_SPR3 *(unsigned char*)0x7F72
|
||||
#define ITC_SPR4 *(unsigned char*)0x7F73
|
||||
#define ITC_SPR5 *(unsigned char*)0x7F74
|
||||
#define ITC_SPR6 *(unsigned char*)0x7F75
|
||||
#define ITC_SPR7 *(unsigned char*)0x7F76
|
||||
#define ITC_SPR8 *(unsigned char*)0x7F77
|
||||
|
||||
|
||||
/* -------------------- UNIQUE ID -------------------- */
|
||||
#if defined STM8S105 || defined STM8S103 // maybe some other MCU have this too???
|
||||
#define U_ID00 (unsigned char*)0x48CD
|
||||
#define U_ID01 (unsigned char*)0x48CE
|
||||
#define U_ID02 (unsigned char*)0x48CF
|
||||
#define U_ID03 (unsigned char*)0x48D0
|
||||
#define U_ID04 (unsigned char*)0x48D1
|
||||
#define U_ID05 (unsigned char*)0x48D2
|
||||
#define U_ID06 (unsigned char*)0x48D3
|
||||
#define U_ID07 (unsigned char*)0x48D4
|
||||
#define U_ID08 (unsigned char*)0x48D5
|
||||
#define U_ID09 (unsigned char*)0x48D6
|
||||
#define U_ID10 (unsigned char*)0x48D7
|
||||
#define U_ID11 (unsigned char*)0x48D8
|
||||
#endif // defined STM8S105 || defined STM8S103
|
||||
|
||||
// CCR REGISTER: bits 3&5 should be 1 if you wanna change EXTI_CRx
|
||||
#define CCR *(unsigned char*)0x7F0A
|
||||
|
||||
/* -------------------- OPTION BYTES -------------------- */
|
||||
#if defined STM8S105
|
||||
// readout protection
|
||||
#define OPT0 *(unsigned char*)0x4800
|
||||
// user boot code
|
||||
#define OPT1 *(unsigned char*)0x4801
|
||||
#define NOPT1 *(unsigned char*)0x4802
|
||||
// alternate functions remapping
|
||||
// | AFR7 | ... | AFR0 |
|
||||
// AFR7 - PD4 = BEEP; AFR6 - PB4/PB5 = I2C; AFR5 - PB0..3 - TIM1
|
||||
// AFR4 - PD7 = TIM1_CH4; AFR3 - PD0 = TIM1_BKIN
|
||||
// AFR2 - PD0 = CLK_CCO; AFR1 - PA3 = TIM3_CH1, PD2 = TIM2_CH3
|
||||
// AFR0 - PD3 = ADC_ETR
|
||||
#define OPT2 *(unsigned char*)0x4803
|
||||
#define NOPT2 *(unsigned char*)0x4804
|
||||
// trim, watchdog
|
||||
#define OPT3 *(unsigned char*)0x4805
|
||||
#define NOPT3 *(unsigned char*)0x4806
|
||||
// extclc, awu
|
||||
#define OPT4 *(unsigned char*)0x4807
|
||||
#define NOPT4 *(unsigned char*)0x4808
|
||||
// HSE stab time
|
||||
#define OPT5 *(unsigned char*)0x4809
|
||||
#define NOPT5 *(unsigned char*)0x480a
|
||||
// none
|
||||
#define OPT6 *(unsigned char*)0x480b
|
||||
#define NOPT6 *(unsigned char*)0x480c
|
||||
// none
|
||||
#define OPT7 *(unsigned char*)0x480d
|
||||
#define NOPT7 *(unsigned char*)0x480e
|
||||
// bootloader opt byte
|
||||
#define OPTBL *(unsigned char*)0x487e
|
||||
#define NOPTBL *(unsigned char*)0x487f
|
||||
|
||||
#endif
|
||||
|
||||
#endif // __STM8L_H__
|
||||
|
||||
// #define *(unsigned char*)0x
|
||||
168
uart_SPI/uart.c
Normal file
168
uart_SPI/uart.c
Normal file
@ -0,0 +1,168 @@
|
||||
/*
|
||||
* blinky.c
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
|
||||
#include "ports_definition.h"
|
||||
#include "uart.h"
|
||||
#include "interrupts.h"
|
||||
|
||||
U8 UART_rx[UART_BUF_LEN]; // cycle buffer for received data
|
||||
U8 UART_rx_start_i = 0; // started index of received data (from which reading starts)
|
||||
U8 UART_rx_cur_i = 0; // index of current first byte in rx array (to which data will be written)
|
||||
|
||||
/**
|
||||
* Send one byte through UART
|
||||
* @param byte - data to send
|
||||
*/
|
||||
void UART_send_byte(U8 byte){
|
||||
while(!(UART2_SR & UART_SR_TXE)); // wait until previous byte transmitted
|
||||
UART2_DR = byte;
|
||||
}
|
||||
|
||||
void uart_write(char *str){
|
||||
while(*str){
|
||||
while(!(UART2_SR & UART_SR_TXE));
|
||||
UART2_CR2 |= UART_CR2_TEN;
|
||||
UART2_DR = *str++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Read one byte from Rx buffer
|
||||
* @param byte - where to store readed data
|
||||
* @return 1 in case of non-empty buffer
|
||||
*/
|
||||
U8 UART_read_byte(U8 *byte){
|
||||
if(UART_rx_start_i == UART_rx_cur_i) // buffer is empty
|
||||
return 0;
|
||||
*byte = UART_rx[UART_rx_start_i++];
|
||||
check_UART_pointer(UART_rx_start_i);
|
||||
return 1;
|
||||
}
|
||||
|
||||
void printUint(U8 *val, U8 len){
|
||||
unsigned long Number = 0;
|
||||
U8 i = len;
|
||||
char ch;
|
||||
U8 decimal_buff[12]; // max len of U32 == 10 + \n + \0
|
||||
if(len > 4 || len == 3 || len == 0) return;
|
||||
for(i = 0; i < 12; i++)
|
||||
decimal_buff[i] = 0;
|
||||
decimal_buff[10] = '\n';
|
||||
ch = 9;
|
||||
switch(len){
|
||||
case 1:
|
||||
Number = *((U8*)val);
|
||||
break;
|
||||
case 2:
|
||||
Number = *((U16*)val);
|
||||
break;
|
||||
case 4:
|
||||
Number = *((unsigned long*)val);
|
||||
break;
|
||||
}
|
||||
do{
|
||||
i = Number % 10L;
|
||||
decimal_buff[ch--] = i + '0';
|
||||
Number /= 10L;
|
||||
}while(Number && ch > -1);
|
||||
uart_write((char*)&decimal_buff[ch+1]);
|
||||
}
|
||||
|
||||
/**
|
||||
* print signed long onto terminal
|
||||
* max len = 10 symbols + 1 for "-" + 1 for '\n' + 1 for 0 = 13
|
||||
*/
|
||||
void print_long(long Number){
|
||||
U8 i, L = 0;
|
||||
char ch;
|
||||
char decimal_buff[12];
|
||||
decimal_buff[11] = 0;
|
||||
ch = 11;
|
||||
if(Number < 0){
|
||||
Number = -Number;
|
||||
L = 1;
|
||||
}
|
||||
do{
|
||||
i = Number % 10L;
|
||||
decimal_buff[--ch] = i + '0';
|
||||
Number /= 10L;
|
||||
}while(Number && ch > 0);
|
||||
if(ch > 0 && L) decimal_buff[--ch] = '-';
|
||||
uart_write(&decimal_buff[ch]);
|
||||
}
|
||||
|
||||
U8 readInt(int *val){
|
||||
unsigned long T = Global_time;
|
||||
unsigned long R = 0;
|
||||
int readed;
|
||||
U8 sign = 0, rb, ret = 0, bad = 0;
|
||||
do{
|
||||
if(!UART_read_byte(&rb)) continue;
|
||||
if(rb == '-' && R == 0){ // negative number
|
||||
sign = 1;
|
||||
continue;
|
||||
}
|
||||
if(rb < '0' || rb > '9') break; // number ends with any non-digit symbol that will be omitted
|
||||
ret = 1; // there's at least one digit
|
||||
R = R * 10L + rb - '0';
|
||||
if(R > 0x7fff){ // bad value
|
||||
R = 0;
|
||||
bad = 0;
|
||||
}
|
||||
}while(Global_time - T < 10000); // wait no longer than 10s
|
||||
if(bad || !ret) return 0;
|
||||
readed = (int) R;
|
||||
if(sign) readed *= -1;
|
||||
*val = readed;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void error_msg(char *msg){
|
||||
uart_write("\nERROR: ");
|
||||
uart_write(msg);
|
||||
UART_send_byte('\n');
|
||||
}
|
||||
|
||||
U8 U8toHEX(U8 val){
|
||||
val &= 0x0f;
|
||||
if(val < 10) val += '0';
|
||||
else val += 'a' - 10;
|
||||
return val;
|
||||
}
|
||||
|
||||
void printUHEX(U8 val){
|
||||
uart_write("0x");
|
||||
UART_send_byte(U8toHEX(val>>4)); // MSB
|
||||
UART_send_byte(U8toHEX(val)); // LSB
|
||||
}
|
||||
|
||||
void uart_init(){
|
||||
// PD5 - UART2_TX
|
||||
PORT(UART_PORT, DDR) |= UART_TX_PIN;
|
||||
PORT(UART_PORT, CR1) |= UART_TX_PIN;
|
||||
// Configure UART
|
||||
// 8 bit, no parity, 1 stop (UART_CR1/3 = 0 - reset value)
|
||||
// 57600 on 16MHz: BRR1=0x11, BRR2=0x06
|
||||
UART2_BRR1 = 0x11; UART2_BRR2 = 0x06;
|
||||
UART2_CR2 = UART_CR2_TEN | UART_CR2_REN | UART_CR2_RIEN; // Allow RX/TX, generate ints on rx
|
||||
}
|
||||
|
||||
45
uart_SPI/uart.h
Normal file
45
uart_SPI/uart.h
Normal file
@ -0,0 +1,45 @@
|
||||
/*
|
||||
* blinky.h
|
||||
*
|
||||
* Copyright 2014 Edward V. Emelianoff <eddy@sao.ru>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
#pragma once
|
||||
#ifndef __MAIN_H__
|
||||
#define __MAIN_H__
|
||||
|
||||
extern volatile unsigned long Global_time; // global time in ms
|
||||
|
||||
#define UART_BUF_LEN 8 // max 7 bytes transmited in on operation
|
||||
|
||||
extern U8 UART_rx[];
|
||||
extern U8 UART_rx_start_i;
|
||||
extern U8 UART_rx_cur_i;
|
||||
|
||||
|
||||
void UART_send_byte(U8 byte);
|
||||
void uart_write(char *str);
|
||||
void printUint(U8 *val, U8 len);
|
||||
void print_long(long Number);
|
||||
void error_msg(char *msg);
|
||||
void uart_init();
|
||||
U8 UART_read_byte(U8 *byte);
|
||||
void printUHEX(U8 val);
|
||||
|
||||
#define check_UART_pointer(x) do{if(x == UART_BUF_LEN) x = 0;}while(0)
|
||||
|
||||
#endif // __MAIN_H__
|
||||
100
uart_SPI/uartspi.ihx
Normal file
100
uart_SPI/uartspi.ihx
Normal file
@ -0,0 +1,100 @@
|
||||
:2080A0008080808080808080AE5203F6442403CD84F98080808080808080805204AE5240FC
|
||||
:2080C000F66B027B02A520274AAE5241F66B017B02A4804D27FDAE00011F03C6000A97C6D7
|
||||
:2080E000000A4CC7000A4F9572FB037B01F7C60009C1000A2612C600094CC70009C6000906
|
||||
:20810000A1082604725F0009C6000AA1082604725F000A5B048080AE5342F644241B90CEBB
|
||||
:1F812000001372A90001C60012A90097C60011A9009590CF0013CF0011AE53427F8080D0
|
||||
:20813F00AE5240F64824F9AE52417B03F781160390F64D271BAE5240F64824F9AE5245F64A
|
||||
:20815F00AA08AE5245F790F6905CAE5241F720E0815202C6000AC1000926034F202716051F
|
||||
:20817F00AE00011F01C6000997C600094CC700094F9572FB01F690F7C60009A108260472DD
|
||||
:20819F005F0009A6015B0281521C5F1F101F0E7B21A1042303CC827D7B21A1032603CC82C1
|
||||
:2081BF007D0D212603CC827D965C1F124F5F9772FB127F4CA10C25F51E121C000AA60AF78B
|
||||
:2081DF007B21A101270E7B21A102271C7B21A104272120301E1FF66B1C5F0F191F0F7B1CAC
|
||||
:2081FF006B117B196B0E201C161F90FE5F17101F0E20111E1FE6036B18E602FE6B101F0EBD
|
||||
:20821F007B186B11A6096B0D4B0A5F894B001E14891E1489CD887D5B089F887B0E6B158422
|
||||
:20823F000A0D5F417B144172FB12AB30F74B0A5F894B001E14891E1489CD89AE5B081F10B3
|
||||
:20825F00170E1E1026041E0E27067B0DA1FF2CB87B0D4C5F9772FB1289CD814D5B025B1CDC
|
||||
:20827F008152110F0E965C1F101E101C000B7F1E16A300007B15A2007B14A2002E14161641
|
||||
:20829F0090504F1215974F12149517161F14A6016B0EA60B6B0D4B0A5F894B001E1A891EB8
|
||||
:2082BF001A89CD87D85B089F0A0D5F417B0D4172FB10AB30F74B0A5F894B001E1A891E1A7E
|
||||
:2082DF0089CD88FA5B081F1617147B0DA1002C034F2002A6011E1626041E1427034D26B691
|
||||
:2082FF00887B0E6B10844D27140D0E27100A0D7B0D6B0F5F7B0F9772FB10A62DF75F7B0FAC
|
||||
:20831F009772FB1089CD814D5B025B1181521ACE00131F0DCE00111F0B5F1F091F070F047A
|
||||
:20833F000F020F01961C000389CD81705B024D2603CC83D07B03A12D260E1E09260A1E0713
|
||||
:20835F002606A6016B0420697B03A1302403CC83F27B03A1392303CC83F2A6016B021E0982
|
||||
:20837F00891E09894B0A5F894B00CD8A4D5B081F1517137B030F115F90977B11909572F978
|
||||
:20839F00159F1914979E19139572A200309FA2006B189EA20017096B077B186B08AE7FFFDB
|
||||
:2083BF0013094F12084F120724075F1F091F070F0190CE001372F20DC60012120C95C60096
|
||||
:2083DF0011120B9790A327109EA2009FA2002403CC83430D0126040D0226034F201A7B0998
|
||||
:2083FF00887B0B6B07846B050D0427051E05501F051E1D1605FFA6015B1A81AE849D89CDFF
|
||||
:20841F00814D5B021E0389CD814D5B024B0ACD813F84817B03A40F6B037B03887B04A10ABA
|
||||
:20843F00842406AB306B032004AB576B037B0381AE84A689CD814D5B027B034EA40F88CD66
|
||||
:20845F0084325B0188CD813F847B0388CD84325B0188CD813F8481AE5011F6AA20AE501175
|
||||
:20847F00F7AE5012F6AA20AE5012F7AE5242A611F7AE5243A606F7AE5245A62CF7810A455B
|
||||
:0A849F0052524F523A20003078008C
|
||||
:028BB2000000C1
|
||||
:2084A900AE500CF6AA60AE500CF7AE500DF6AAE0AE500DF7AE5200A67CF7AE52017F81AE53
|
||||
:2084C9005203F6A5022607A4804D27F320FB811E07CF000F1E05CF000B1E03CF000DCD84FF
|
||||
:2084E900C8CE000DF6AE5204F7AE5202A640F781CE000D273FCE000F271190CE000FAE52BC
|
||||
:2085090004F690F7CE000F5CCF000FCE000B5ACF000BCE000B260E725F000E725F000DAE35
|
||||
:2085290052027F200FCE000D5CCF000DCE000DF6AE5204F781CD84C8AE52027FAE52047BB7
|
||||
:1985490003F7AE5203F64424F9AE5204F681CE000D2604A60120014F81AD
|
||||
:068BB400000000000000BB
|
||||
:208000008200808382000000820080A0820080A1820080A2820080A3820080A4820080A57E
|
||||
:20802000820080A6820080A78200000082000000820080A8820080B3820080B4820080B51F
|
||||
:20804000820080B6820080B7820080B88200000082000000820080B9820080BA820080BBBD
|
||||
:2080600082008116820081178200813E820000008200000082000000820000008200000002
|
||||
:1D808300AE00082707724F00005A26F9AE000E2709D68BB1D700085A26F7CC8080A2
|
||||
:03808000CC85624A
|
||||
:20856200522E5F1F1C1F1A0F18AE87B31F16961C00091F2A1E2A7F1E2A5C7F1E2A5C5C7FF5
|
||||
:208582001E2A1C00037F1E2A1C00047F1E2A1C00057F1E2A1C00067F1E2A1C00077F1E2A09
|
||||
:2085A2001C00087F1E2A1C00097F1E2A1C000A7F1E2A1C000B7F1E2A1C000C7F965C1F2827
|
||||
:2085C2001E28A647F71E285CA66FF71E285C5CA66FF71E28A664E7031E28A662E7041E28FE
|
||||
:2085E200A679E7051E28A665E7061E281C00077FAE7F60F6AA01AE7F60F7AE50C67FAE5352
|
||||
:2086020045A607F7AE5346A67DF7AE5341A601F7AE5340A685F7AE500CF6AA04AE500CF71C
|
||||
:20862200AE500DF6AA04AE500DF7CD8476CD84A99ACE001372F01C1F26C60012121B6B25F3
|
||||
:20864200C60011121A6B24CE00154F0F1E8813278412257B1E12242511CE0013131CC600CF
|
||||
:2086620012121BC60011121A2414CE00131F1CCE00111F1AAE500AF6A804AE500AF70D187C
|
||||
:20868200272BCD85574D27257B18A101260A1E2A89CD814D5B0220137B286B2C7B29887B02
|
||||
:2086A2002D6B237B2388CD814D5B020F18961C001989CD81705B024D2603CC86337B196B4F
|
||||
:2086C2002E7B2EA12B274C7B2EA12D2603CC873B7B2EA1312603CC87737B2EA1322603CC79
|
||||
:2086E20087897B2EA14827187B2EA1622603CC87677B2EA16827097B2EA1732762CC87A0ED
|
||||
:208702007B1988CD813F84AE87C089CD814D5B02CC86337B1988CD813F84CE00151C00649F
|
||||
:20872200CF0015CE0015A327102203CC863335F4001635010015CC86337B1988CD813F84B0
|
||||
:20874200CE00151D0064CF0015CE0015A301F42503CC863335F4001635010015CC8633CDCB
|
||||
:2087620084A9CC8633AE5203F688CD844F84CC86331E2A894B0C4B001E1A89CD84D85B065D
|
||||
:20878200A6016B18CC863316281E2890894B074B0089CD84D85B06A6026B18CC86337B1997
|
||||
:2087A20088CD853E5B0188CD813F84CC86335B2E8148656C6C6F2C20776F726C64000A5059
|
||||
:1687C200524F544F3A0A2B2F2D094C454420706572696F640A0007
|
||||
:068BBA000000000001F4C0
|
||||
:2087D800521D1E22A300007B21A2007B20A2002F040F0D2004A6016B0D0D0D27151E22503C
|
||||
:2087F8004F12216B1B4F12201F186B167B1B6B172008162217181620171616181714161691
|
||||
:2088180017121E26A300007B25A2007B24A2002E1E7B27406B114F12266B104F12256B0F01
|
||||
:208838004F12246B0E1610170B160E170920081626170B16241709160B170716091E0789AA
|
||||
:2088580090891E18891E1889CD887D5B0817010D0D270D504F120290974F1201909520024B
|
||||
:2088780016015B1D8152040F020F017B0B484F494D262E160D1E0B905859170D1F0B1E0950
|
||||
:20889800130D7B08120C7B07120B240D160D1E0B549056170D1F0B20080C017B016B02201D
|
||||
:2088B800CA7B026B041E09130D7B08120C7B07120B2513160972F20D7B08120C977B0712CF
|
||||
:2088D8000B9517091F07160D1E0B549056170D1F0B7B046B030A040D0326CA1E0916075B2C
|
||||
:2088F8000481521E1E23A300007B22A2007B21A2002F040F112004A6016B110D1127151EF8
|
||||
:2089180023504F12226B0E4F12211F076B057B0E6B062008162317071621170516071714A4
|
||||
:20893800160517121E27A300007B26A2007B25A2002F040F162004A6016B160D16271E7BE7
|
||||
:2089580028406B1E4F12276B1D4F12266B1C4F12256B1B161D1719161B17172008162717A6
|
||||
:2089780019162517171619170B16171E0B8990891E18891E1889CD89AE5B0817017B111873
|
||||
:20899800164D270D504F120290974F12019095200216015B1E8152125F1F051F03A6206B5A
|
||||
:2089B800027B15484F496B0116171E1590585917171F157B036B0F1E04887B076B13840890
|
||||
:2089D8001259090F1F047B126B067B0F6B030D01271A7B06AA016B0A7B056B097B046B080D
|
||||
:2089F8007B036B0716091705160717031E05131B7B04121A7B031219252B160572F21B7BF3
|
||||
:208A180004121A6B0C7B03121917056B037B0C6B047B18AA0190977B1790957B16977B159A
|
||||
:208A38009517171F150A020D022703CC89B91E1716155B128152409096905C961C00431FCE
|
||||
:208A58000B1E0BE603961C00471F151E151F171E171F3F1E3F88E60197844290FF72A900E5
|
||||
:208A7800021E0BE6031E151F111E111F131E131F191E1988E60397844290FF965C1F1B1EBF
|
||||
:208A98001BF66B1D1E0BF697161590E603429F1B1D1E1BF71E1BF66B1E1E0BE601971615F8
|
||||
:208AB80090E602429F1B1E1E1BF79096905C93FE1F1F1E0BE6011E151F211E211F231E23B6
|
||||
:208AD8001F251E2588E60397844272FB1F90FF93FE1F271E0BE6021E151F291E291F2B1EFC
|
||||
:208AF8002B1F2F1E2F88E60297844272FB2790FF160B1E0BE6021E151F311E311F331E3301
|
||||
:208B18001F351E3588E6019784429F90F71E0B5C1F371E0BE60290971E15E60390421E374E
|
||||
:208B3800FF16151E0BE6031E151F3D1E3D1F051E0588F69784429F90F71E155C1F2D1E0BAB
|
||||
:208B5800E60390971E15E60290421E2DFF1E151C00037F1E0B1C00037F965CE6036B0AE6E8
|
||||
:208B7800026B09E6016B08F61643170D164572F909173B887B09190F6B3B84190D6B39163B
|
||||
:1A8B98003BEF021639FFFE16491E4772F93B9F193A979E193995515B408166
|
||||
:00000001FF
|
||||
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Reference in New Issue
Block a user