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Code review + scan ability for TRDs
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eddyem
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269
with_opencm3/AD7794.c
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269
with_opencm3/AD7794.c
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@ -0,0 +1,269 @@
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/*
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* AD7794.c - routines to work with ADC AD7794 by SPI
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*
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* Copyright 2013 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "main.h"
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#include "spi.h"
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#include "cdcacm.h"
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volatile uint8_t data_error = 0;
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uint8_t SPI_buffer[4]; // IO buffer: contains data to transmit & received data
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#define check_err() if(data_error){DBG("SPI error!\n"); data_error = 0; return 0;}
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#define ERR_SPI() do{data_error = 1; return NULL;}while(0)
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void SPI_buffer_clear(){
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uint8_t i;
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for(i = 0; i < 4; i++)
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SPI_buffer[i] = 0;
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}
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/**
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* Send len bytes from SPI buffer to register reg
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* @param reg - register to write + key READ_FROM_REG in case of read request
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* @param len - length of data to transmit/receive (without reg!): max 3!!!
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* @return received data
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*/
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uint8_t *send_SPI_data(uint8_t reg, uint8_t len){
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data_error = 0;
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if(len > 3) return NULL; // error: too big data array
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SPI_buffer[0] = reg;
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len++;
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if(!write_SPI(SPI_buffer, len))
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ERR_SPI();
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if(!read_SPI(SPI_buffer, len))
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ERR_SPI();
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return &SPI_buffer[1];
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}
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#undef ERR_SPI
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#define ERR_SPI() do{data_error = 1; return 0;}while(0)
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/**
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* Write data to 8bit register over SPI
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* @param reg - register to write
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* @param data - data to write
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* @return readed data
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*/
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uint8_t sendByte(uint8_t reg, uint8_t data){
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SPI_buffer_clear();
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SPI_buffer[1] = data;
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if(!send_SPI_data(reg, 1))
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ERR_SPI();
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return SPI_buffer[1]; // return readed data
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}
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/**
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* Write data to 16bit register over SPI
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* @param reg - register to write
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* @param data - data to write
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* @return readed data
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*/
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uint16_t sendWord(uint8_t reg, uint16_t data){
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uint16_t ret;
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SPI_buffer_clear();
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SPI_buffer[1] = (data >> 8 )& 0xff; // HSB first
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SPI_buffer[2] = data & 0xff;
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if(!send_SPI_data(reg, 2))
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ERR_SPI();
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ret = ((uint16_t)SPI_buffer[1]) << 8 | SPI_buffer[2];
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return ret; // return readed data
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}
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/**
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* reads 24 bit ADC data register
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* @return value of ADC || 1 (0 indicates error)
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*/
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uint32_t read_ADC_data(){
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uint32_t ret;
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SPI_buffer_clear();
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if(!send_SPI_data(DATA_REGISTER | READ_FROM_REG, 3))
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return 0;
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ret = SPI_buffer[1] << 16 | SPI_buffer[2] << 8 | SPI_buffer[3];
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if(!ret) ret = 1; // there could be a very little case that we get 0
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return ret;
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}
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/**
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* Checks ending of ADC and/or errors
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* @return 1 in case of data ready, set data_error to 1 in case of error
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*/
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uint8_t check_data_ready(){
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uint8_t ret = 0;
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//DBG("check_data_ready\r\n");
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uint8_t x = sendByte(STAT_REGISTER | READ_FROM_REG, 0);
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if(data_error){
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DBG("some data error\n");
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ret = 1; // data not ready, but error flag is set
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}else if((x & 0x18) != 0x08 || x & DATA_ERROR || x & STATUS_NOREF){ // test for AD7794 status register
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#ifdef EBUG
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if((x & 0x18) != 0x08) DBG("There's no AD7794 signature found\n");
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if(x & DATA_ERROR) DBG("DATA_ERROR\n");
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if(x & STATUS_NOREF) DBG("STATUS_NOREF\n");
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#endif
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if(x) data_error = x;
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else data_error = 1; // 0 -> no signature
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ret = 1;
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}else if(!(x & DATA_NOTRDY)) ret = 1;
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return ret;
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}
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#define read_AD7794_conf() sendWord(CONF_REGISTER | READ_FROM_REG, 0)
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static uint8_t ADC_gain = 1;
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/**
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* Changes ADC gain coefficient
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* @param gain - log2(gain)
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* gain voltage range (Vref+-)
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* 0 2.5 V
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* 1 1.25 V
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* 2 625 mV
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* 3 312.5 mV
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* 4 156.2 mV
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* 5 78.125 mV
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* 6 39.06 mV
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* 7 19.53 mV
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* @return 0 in case of wrong gain value
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*/
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uint8_t change_AD7794_gain(uint8_t gain){
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if(gain > 7) return 0;
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ADC_gain = gain;
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uint16_t Conf = read_AD7794_conf();
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check_err();
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Conf &= ~GAIN_MASK; // clear gain bits
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Conf |= ADC_gain << 8; // update gain
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sendWord(CONF_REGISTER, Conf);
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check_err();
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return 1;
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}
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uint8_t AD7794_set_channel(uint8_t channel){
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uint16_t Conf = read_AD7794_conf();
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check_err();
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Conf &= ~CHANNEL_MASK; // clear channel number
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Conf |= (CHANNEL_MASK & channel); // set new channel
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sendWord(CONF_REGISTER, Conf);
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check_err();
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return 1;
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}
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/**
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* make internal full-scale calibration for given channel
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* !! first run setup_AD7794() and after - this function !!
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* @param channel - channel to activate
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* @return 0 on error
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*/
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uint8_t AD7794_calibration(uint8_t channel){
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if(ADC_gain == 7){
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DBG("gain = 7, can't calibrate!\n");
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return 0;
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}
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if(!AD7794_set_channel(channel)) return 0;
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sendWord(MODE_REGISTER,
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INT_FS_CAL | U16(0x0f)); // make a full-scale calibration on lowest speed
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check_err();
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return 1;
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}
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/**
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* Setup ADC: write keys to registers
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* @param config - keys to be written to configuration register
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* @param io - keys to be written to io register
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* @return 0 on error
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*/
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uint8_t setup_AD7794(uint16_t config, uint8_t io){
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sendWord(MODE_REGISTER, POWERDOWN_MODE); // put ADC into powerdown mode
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sendWord(CONF_REGISTER,
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ADC_gain << 8 // gain
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| config);
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check_err();
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sendByte(IO_REGISTER, io);
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check_err();
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return 1;
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}
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// we modify this macro to zero steps counter in case of error
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#define check_errR() if(data_error){DBG("SPI error!\n"); data_error = 0; N = 0; return 0;}
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/**
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* Start ADC transform & read data value
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* !! first run setup_AD7794(), AD7794_calibration() and after - this function !!
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* @param channel - channel number to transform
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* @return:
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* AD7794_NOTRDY when measurement in process
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* ADC data value if ready
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* 0 in case of error
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*/
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uint32_t read_AD7794(uint8_t channel){
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static uint8_t N = 0; // operation number
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uint8_t dr;
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switch (N){
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case 0: // start: set channel
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if(!AD7794_set_channel(channel)){
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return 0; // 0 in return means error
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}
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break;
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case 1: // put ADC to a single conversion mode
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sendWord(MODE_REGISTER, SINGLE_MODE |
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U16(0x0f)); // the lowest speed;
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check_errR();
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break;
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case 2: // wait for data reading & check errors
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dr = check_data_ready();
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check_errR();
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if(!dr) return AD7794_NOTRDY;
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break;
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default: // last step -> return readed data
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N = 0;
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return read_ADC_data();
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}
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N++;
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return AD7794_NOTRDY;
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}
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/**
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* This function tries to reset ADC's SPI controller & check returned status
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* If
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* @param
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* @return !!! ADC_NO_ERROR in case of succsess!!!
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* Other error code in case of error (ADC_ERR_NO_DEVICE is critical error!)
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*/
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uint8_t reset_AD7794(){
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uint8_t i, ret = ADC_NO_ERROR;
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for(i = 0; i < 3; i++){
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sendByte(0xFF, 0xFF); // >= 32 bits of 1
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if(data_error) break;
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}
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if(data_error){
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DBG("SPI error: can't send reset sequence!\n");
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data_error = 0;
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return ADC_ERR_NO_DEVICE;
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}
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Delay(1); // give some time to "reboot"
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check_data_ready();
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if(data_error){
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DBG("SPI error: device can't do reset!\n");
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if((data_error & 0x18) != 0x08) // no signature
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ret = ADC_ERR_NO_DEVICE;
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else
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ret = ADC_ERR_OTHER;
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data_error = 0;
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}
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return ret;
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}
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263
with_opencm3/AD7794.h
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263
with_opencm3/AD7794.h
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@ -0,0 +1,263 @@
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/*
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* AD7794.h
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*
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* Copyright 2013 Edward V. Emelianoff <eddy@sao.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#pragma once
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#ifndef __AD7794_H__
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#define __AD7794_H__
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#include "main.h"
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// in function read_AD7794 zero returning means error, so we should do something
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// to detect "data not ready yet"; 24 bits of ADC allow us to use some
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// big values as flags
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#define AD7794_NOTRDY ((uint32_t)0xffffffff)
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uint8_t setup_AD7794(uint16_t config, uint8_t io);
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uint8_t AD7794_calibration(uint8_t channel);
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uint32_t read_AD7794(uint8_t channel);
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uint8_t reset_AD7794();
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uint8_t change_AD7794_gain(uint8_t gain);
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// error codes of reset_AD7794()
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enum {
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ADC_NO_ERROR,
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ADC_ERR_NO_DEVICE,
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ADC_ERR_OTHER
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};
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/*
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* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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* in case of communication error set DIN high and give to SCLK >=32 pulses
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* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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*/
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/*
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* Communication register
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* | CR7 | CR6 | CR5 | CR4 | CR3 | CR2 | CR1 | CR0 |
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* !WEN R/!W RS2 RS1 RS0 CREAD 0 0
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*
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* - WEN (write enable) : 1 - ignore all bits in packet
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* - R/!W (next operation): 0 - write, 1 - read
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* - RS2..RS0 (reg choice) :
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* (RS2RS1RS0)
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* 000: CR - write / SR - read (8 bit)
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* 001: Mode register (16 bit)
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* 010: Configuration register (16 bit)
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* 011: Data register (24 bit)
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* 100: ID register - read only (8 bit)
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* 101: IO register (8 bit)
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* 110: Offset register (24 bit)
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* 111: Full-Scale register(24 bit)
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* - CREAD (continious read): 1 - enable continious reading (put 01011100 to
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* CR & take DIN in zero state
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* to reset this mode write to CR 01011000 or make ADC reset
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* CR1&CR0 always should be 0!
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*/
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// masks for CR:
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#define NOT_WEN U8(0x80)
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#define WRITE_TO_REG U8(0)
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#define READ_FROM_REG U8(0x40)
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#define CONT_READ U8(0x04)
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#define STAT_REGISTER U8(0)
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#define MODE_REGISTER U8(0x08)
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#define CONF_REGISTER U8(0x10)
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#define DATA_REGISTER U8(0x18)
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#define ID_REGISTER U8(0x20)
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#define IO_REGISTER U8(0x28)
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#define OFFSET_REGISTER U8(0x30)
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#define FS_REGISTER U8(0x38)
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#define REGISTER_MASK U8(0x38) // (REGISTER_MASK & CR) >> 3 gives register number
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/*
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* Status register
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|
* | SR7 | SR6 | SR5 | SR4 | SR3 | SR2 | SR1 | SR0 |
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|
* !RDY ERR NOXREF 0 1 CH2 CH1 CH0
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*
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* - !RDY (data ready) : ==0 when data is ready for reading
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|
* - ERR (ADC error flag) : ==1 in case of some error (cleared by hardware in ADC starting)
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* - NOXREF (no ref voltage): ==1 in cese of REFIN1/REFIN2 less than threshold
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* SR4&SR3 are always 01
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* - CH2..CH0 (channel number): number of current channel
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*/
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// masks for SR:
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||||||
|
#define DATA_NOTRDY U8(0x80)
|
||||||
|
#define DATA_ERROR U8(0x40)
|
||||||
|
#define STATUS_NOREF U8(0x20)
|
||||||
|
#define DATA_CHANNEL_MASK U8(0x07) // Channel selection: DATA_CHANNEL_MASK & ch. number
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Mode register (16 bit)
|
||||||
|
* | MRf | MRe | MRd | MRc | MRb | MRa | MR9 | MR8 | MR7 | MR6 | MR5 | MR4 | MR3 | MR2 | MR1 | MR0 |
|
||||||
|
* MD2 MD1 MD0 PSW 0 0 AMP-CM 0 CLK1 CLK0 0 CHOP-DIS FS3 FS2 FS1 FS0
|
||||||
|
*
|
||||||
|
* - MD2..MD0 (mode) : mode selection
|
||||||
|
* 000 - continuous mode
|
||||||
|
* 001 - single mode
|
||||||
|
* 010 - idle mode
|
||||||
|
* 011 - power-down mode
|
||||||
|
* 100 - internal zero-scale calibration
|
||||||
|
* 101 - internal full-scale calibration
|
||||||
|
* 110 - system zero-scale calibration
|
||||||
|
* 111 - system full-scale calibration
|
||||||
|
* - PSW (PSW mode) : ==1 to disconnect PSW and ground, ==0 to connect (!!! limit current is 30mA !!!)
|
||||||
|
* - AMP-CM (amplify) : ==0 to wide amplification (badly disables synphase signal)
|
||||||
|
* - CLK1, CLK0 (CLCsrc): CLC source
|
||||||
|
* 00 - inner 64kHz, CLK out is off
|
||||||
|
* 01 - inner 64kHz, CLK out is on
|
||||||
|
* 10 - outer 64kHz connected to CLK in
|
||||||
|
* 11 - outer (freq/2) connected to CLK in
|
||||||
|
* CHOP-DIS (syn dis) : used to disable synphase signal, sets together with AMP-CM
|
||||||
|
* FS3..FS0 (fltr per.) : period of filter update rate
|
||||||
|
*/
|
||||||
|
// masks for MR:
|
||||||
|
// modes:
|
||||||
|
#define MODE_MASK U16(0xe000)
|
||||||
|
#define CONT_MODE U16(0)
|
||||||
|
#define SINGLE_MODE U16(0x2000)
|
||||||
|
#define IDLE_MODE U16(0x4000)
|
||||||
|
#define POWERDOWN_MODE U16(0x6000)
|
||||||
|
#define INT_ZS_CAL U16(0x8000)
|
||||||
|
#define INT_FS_CAL U16(0xa000)
|
||||||
|
#define SYS_ZS_CAL U16(0xc000)
|
||||||
|
#define SYS_FS_CAL U16(0xe000)
|
||||||
|
// other
|
||||||
|
#define PSW_DISCONN U16(0x1000)
|
||||||
|
#define AMPCM_RESET U16(0x0200)
|
||||||
|
// clocking
|
||||||
|
#define CLK_IN_NOOUT U16(0)
|
||||||
|
#define CLK_IN_SYNC U16(0x0040)
|
||||||
|
#define CLK_OUT_64 U16(0x0080)
|
||||||
|
#define CLK_OUT_DIV2 U16(0x00c0)
|
||||||
|
// other
|
||||||
|
#define CHOP_DISABLE U16(0x0010)
|
||||||
|
#define FILTER_MASK U16(0x000f)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Configuration register
|
||||||
|
* | CRf | CRe | CRd | CRc | CRb | CRa | CR9 | CR8 | CR7 | CR6 | CR5 | CR4 | CR3 | CR2 | CR1 | CR0 |
|
||||||
|
* VBIAS1/0 BO U/!B BOOST G2 G1 G0 REFSEL1/0 REF_DET BUF CH3..0
|
||||||
|
*
|
||||||
|
* - VBIAS1/0 (enable bias voltage generator):
|
||||||
|
* 00 - VBIAS disabled
|
||||||
|
* 01 - connect to AIN1
|
||||||
|
* 10 - connect to AIN2
|
||||||
|
* 11 - connect to AIN3
|
||||||
|
* - BO (burnout current) : enable 100nA current source (buffer or in-amp should be active)
|
||||||
|
* - U/!B (uni/bipolar) : ==1 for unipolar coding (full-scale from 0x000000 to 0xffffff)
|
||||||
|
* ==0 for bipolar coding (0x800000 is zero, > - positive)
|
||||||
|
* - BOOST (increase curnt): ==1 to increase inner VREF current consuming to reduce power-up time
|
||||||
|
* - G2..G0 (gain) : select ADC ampl. gain, GAIN = 1<<G, input ranges are
|
||||||
|
* 2.5V, 1.25V, 625mV, 312.5mV, 156.25mV, 78.125mV, 39.06mV, 19.53mV
|
||||||
|
* - REFSEL1/0 (ref.select): reference voltage
|
||||||
|
* 00 - external between REFIN1(+) and REFIN1(-)
|
||||||
|
* 01 - external between REFIN2(+) and REFIN2(-)
|
||||||
|
* 10 - internal 1.17V
|
||||||
|
* 11 - reserved
|
||||||
|
* - REF_DET (detect ref) : enable reference detection by set/reset bit NOXREF
|
||||||
|
* - BUF (buffered mode) : configure ADC for buffered (1) mode (==1 automatically for gain > 2)
|
||||||
|
* - CH3..0 (chnnl select) : select channel (reserved are non-shown)
|
||||||
|
* [CHANNEL] - [Calibration pair]
|
||||||
|
* 0000 - AIN1 - 0
|
||||||
|
* 0001 - AIN2 - 1
|
||||||
|
* 0010 - AIN3 - 2
|
||||||
|
* 0011 - AIN4 - 3
|
||||||
|
* 0100 - AIN5 - 3
|
||||||
|
* 0101 - AIN6 - 3
|
||||||
|
* 0110 - Temp sensor - int. 1.17VREF + gain=1
|
||||||
|
* 0111 - ADVV monitor - int. 1.17VREF + gain=1/6
|
||||||
|
* 1000 - AIN1(-)/AIN1(-) - 0
|
||||||
|
*/
|
||||||
|
// masks for SR
|
||||||
|
// vbias source
|
||||||
|
#define VBIAS_1 U16(0x4000)
|
||||||
|
#define VBIAS_2 U16(0x8000)
|
||||||
|
#define VBIAS_3 U16(0xc000)
|
||||||
|
// other
|
||||||
|
#define INT_CURRENT_SRC U16(0x2000)
|
||||||
|
#define UNIPOLAR_CODING U16(0x1000)
|
||||||
|
#define BOOST_UP U16(0x0800)
|
||||||
|
// gain mask
|
||||||
|
#define GAIN_MASK U16(0x0700) // gain == 1<<G
|
||||||
|
// refin selection
|
||||||
|
#define EXTREFIN_1 U16(0)
|
||||||
|
#define EXTREFIN_2 U16(0x0040)
|
||||||
|
#define INTREFIN U16(0x0080)
|
||||||
|
// other
|
||||||
|
#define REF_DETECTION U16(0x0020)
|
||||||
|
#define BUFFERED_OP U16(0x0010)
|
||||||
|
// channel selection mask
|
||||||
|
#define CHANNEL_MASK U16(0x000f) // CHANNEL_MASK & (channel number - 1)
|
||||||
|
#define INR_TEMP_SENSOR U16(0x0006) // inner thermometer
|
||||||
|
#define AVDD_MONITOR U16(0x0007) // monitor avdd
|
||||||
|
#define CHANNEL1_MINUS U16(0x0008) // AIN1(-)/AIN1(-)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Data register stores the conversion result: 24bits
|
||||||
|
* on completion reading !RDY is set
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ID register is read-only register storing identification number of ADC: 8bits
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* IO register
|
||||||
|
* | IO7 | IO6 | IO5 | IO4 | IO3 | IO2 | IO1 | IO0 |
|
||||||
|
* 0 IOEN IODAT IEXCDIR IEXCEN
|
||||||
|
*
|
||||||
|
* - IOEN (digital out) : ==1 to configure AIN6 as digital output pins P1/P2
|
||||||
|
* - IODAT (P2/P1 data) : when IOEN==1 this is a data for digital ports
|
||||||
|
* - IEXCDIR (cur.src dir): direction of currens sources
|
||||||
|
* 00 - IEXC1 connected to IOUT1, IEXC2 connected to IOUT2
|
||||||
|
* 01 - IEXC1 connected to IOUT2, IEXC2 connected to IOUT1
|
||||||
|
* 10 - both sources connected to IOUT1 (only for 10/210uA)
|
||||||
|
* 11 - both sources connected to IOUT2 (-//-)
|
||||||
|
* - IEXCEN (en. cur.src) : enable/disable current sources
|
||||||
|
* 00 - currents are disabled
|
||||||
|
* 01 - 10uA
|
||||||
|
* 10 - 210uA
|
||||||
|
* 11 - 1mA
|
||||||
|
*/
|
||||||
|
// masks for IOR
|
||||||
|
#define IOEN U8(0x40)
|
||||||
|
#define IODAT_MASK U8(0x30)
|
||||||
|
#define IEXC_DIRECT U8(0)
|
||||||
|
#define IEXC_SWAPPED U8(0x04)
|
||||||
|
#define IEXC_BOTH1 U8(0x08)
|
||||||
|
#define IEXC_BOTH2 U8(0x0c)
|
||||||
|
#define IEXC_DISABLE U8(0)
|
||||||
|
#define IEXC_10UA U8(0x01)
|
||||||
|
#define IEXC_210UA U8(0x02)
|
||||||
|
#define IEXC_1MA U8(0x03)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Offset register holds the offset calibration coefficient (R/W, 24bit)
|
||||||
|
* Each calibration channel has its own offset registry
|
||||||
|
* Value automatically overwtitten on calibration
|
||||||
|
* To directly write into that registry ADC should be placed in power-down or idle mode
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Full-scale register (R/W, 24 bit)
|
||||||
|
* It holds the full-scale calibration coefficients fir ADC
|
||||||
|
* Each calibration channel has its own full-scale registry
|
||||||
|
* To directly write into that registry ADC should be placed in power-down or idle mode
|
||||||
|
*/
|
||||||
|
#endif // __AD7794_H__
|
||||||
@ -45,6 +45,9 @@ static const struct usb_device_descriptor dev = {
|
|||||||
.bNumConfigurations = 1,
|
.bNumConfigurations = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
char usbdatabuf[64]; // buffer for received data
|
||||||
|
int usbdatalen = 0; // lenght of received data
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This notification endpoint isn't implemented. According to CDC spec its
|
* This notification endpoint isn't implemented. According to CDC spec its
|
||||||
* optional, but its absence causes a NULL pointer dereference in Linux
|
* optional, but its absence causes a NULL pointer dereference in Linux
|
||||||
@ -251,9 +254,9 @@ P("UNKNOWN\r\n", uart1_send);
|
|||||||
|
|
||||||
static void cdcacm_data_rx_cb(usbd_device *usbd_dev, uint8_t ep){
|
static void cdcacm_data_rx_cb(usbd_device *usbd_dev, uint8_t ep){
|
||||||
(void)ep;
|
(void)ep;
|
||||||
char buf[64];
|
int len = usbd_ep_read_packet(usbd_dev, 0x01, usbdatabuf, USB_RX_DATA_SIZE - usbdatalen);
|
||||||
int len = usbd_ep_read_packet(usbd_dev, 0x01, buf, 64);
|
usbdatalen += len;
|
||||||
if(len > 0) parce_incoming_buf(buf, len, usb_send);
|
//if(len > 0) parce_incoming_buf(buf, len, usb_send);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cdcacm_data_tx_cb(usbd_device *usbd_dev, uint8_t ep){
|
static void cdcacm_data_tx_cb(usbd_device *usbd_dev, uint8_t ep){
|
||||||
@ -268,8 +271,8 @@ static void cdcacm_set_config(usbd_device *usbd_dev, uint16_t wValue)
|
|||||||
(void)wValue;
|
(void)wValue;
|
||||||
(void)usbd_dev;
|
(void)usbd_dev;
|
||||||
|
|
||||||
usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb);
|
usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, USB_RX_DATA_SIZE, cdcacm_data_rx_cb);
|
||||||
usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_tx_cb);
|
usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, USB_TX_DATA_SIZE, cdcacm_data_tx_cb);
|
||||||
usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL);
|
usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL);
|
||||||
|
|
||||||
usbd_register_control_callback(
|
usbd_register_control_callback(
|
||||||
@ -289,15 +292,20 @@ usbd_device *USB_init(){
|
|||||||
return current_usb;
|
return current_usb;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
uint8_t send_block = 0;
|
||||||
/**
|
/**
|
||||||
* Put byte into USB buffer to send
|
* Put byte into USB buffer to send
|
||||||
* @param byte - a byte to put into a buffer
|
* @param byte - a byte to put into a buffer
|
||||||
*/
|
*/
|
||||||
void usb_send(uint8_t byte){
|
void usb_send(uint8_t byte){
|
||||||
//if(!USB_connected) return;
|
while(send_block); // wait for unlock
|
||||||
|
send_block = 1;
|
||||||
USB_Tx_Buffer[USB_Tx_ptr++] = byte;
|
USB_Tx_Buffer[USB_Tx_ptr++] = byte;
|
||||||
if(USB_Tx_ptr == USB_TX_DATA_SIZE) // buffer can be overflowed - send it!
|
if(USB_Tx_ptr == USB_TX_DATA_SIZE){ // buffer can be overflowed - send it!
|
||||||
|
send_block = 0;
|
||||||
usb_send_buffer();
|
usb_send_buffer();
|
||||||
|
}
|
||||||
|
send_block = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -305,9 +313,14 @@ void usb_send(uint8_t byte){
|
|||||||
* this function runs when buffer is full or on SysTick
|
* this function runs when buffer is full or on SysTick
|
||||||
*/
|
*/
|
||||||
void usb_send_buffer(){
|
void usb_send_buffer(){
|
||||||
|
if(send_block) return;
|
||||||
|
send_block = 1;
|
||||||
if(USB_Tx_ptr){
|
if(USB_Tx_ptr){
|
||||||
if(current_usb)
|
if(current_usb && USB_connected){
|
||||||
usbd_ep_write_packet(current_usb, 0x82, USB_Tx_Buffer, USB_Tx_ptr);
|
usbd_ep_write_packet(current_usb, 0x82, USB_Tx_Buffer, USB_Tx_ptr);
|
||||||
|
usbd_poll(current_usb);
|
||||||
|
}
|
||||||
USB_Tx_ptr = 0;
|
USB_Tx_ptr = 0;
|
||||||
}
|
}
|
||||||
|
send_block = 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -36,13 +36,17 @@
|
|||||||
#define SET_CONTROL_LINE_STATE 0x22
|
#define SET_CONTROL_LINE_STATE 0x22
|
||||||
#define SEND_BREAK 0x23
|
#define SEND_BREAK 0x23
|
||||||
|
|
||||||
// Size of buffer to output
|
// Size of input/output buffers
|
||||||
#define USB_TX_DATA_SIZE 64
|
#define USB_TX_DATA_SIZE 64
|
||||||
|
#define USB_RX_DATA_SIZE 64
|
||||||
|
|
||||||
// USB connection flag
|
// USB connection flag
|
||||||
extern uint8_t USB_connected;
|
extern uint8_t USB_connected;
|
||||||
extern struct usb_cdc_line_coding linecoding;
|
extern struct usb_cdc_line_coding linecoding;
|
||||||
|
|
||||||
|
extern char usbdatabuf[];
|
||||||
|
extern int usbdatalen;
|
||||||
|
|
||||||
usbd_device *USB_init();
|
usbd_device *USB_init();
|
||||||
void usb_send(uint8_t byte);
|
void usb_send(uint8_t byte);
|
||||||
void usb_send_buffer();
|
void usb_send_buffer();
|
||||||
|
|||||||
15
with_opencm3/client-term/H705.m
Normal file
15
with_opencm3/client-term/H705.m
Normal file
@ -0,0 +1,15 @@
|
|||||||
|
function Tout = H705(Rin)
|
||||||
|
% Converts resistance of TRD into T (degrC)
|
||||||
|
|
||||||
|
_alpha = 0.00375;
|
||||||
|
_beta = 0.16;
|
||||||
|
_delta = 1.605;
|
||||||
|
T = [-200:0.1:50];
|
||||||
|
_A = _alpha + _alpha*_delta/100.;
|
||||||
|
_B = -_alpha*_delta/1e4;
|
||||||
|
_C = zeros(size(T));
|
||||||
|
_C(find(T<0.)) = -_alpha*_beta/1e8;
|
||||||
|
rT = 1000.*(1 + _A*T + _B*T.^2 - _C.*T.^3*100. + _C.*T.^4);
|
||||||
|
%plot(T, rT);
|
||||||
|
Tout = interp1(rT, T, Rin, 'spline')
|
||||||
|
endfunction
|
||||||
22
with_opencm3/client-term/Makefile
Normal file
22
with_opencm3/client-term/Makefile
Normal file
@ -0,0 +1,22 @@
|
|||||||
|
PROGRAM = client
|
||||||
|
LDFLAGS =
|
||||||
|
SRCS = client.c
|
||||||
|
CC = gcc
|
||||||
|
DEFINES = -D_XOPEN_SOURCE=501
|
||||||
|
CXX = gcc
|
||||||
|
CFLAGS = -Wall -Werror $(DEFINES)
|
||||||
|
OBJS = $(SRCS:.c=.o)
|
||||||
|
all : $(PROGRAM) clean
|
||||||
|
$(PROGRAM) : $(OBJS)
|
||||||
|
$(CC) $(CFLAGS) $(OBJS) $(LDFLAGS) -o $(PROGRAM)
|
||||||
|
|
||||||
|
# some addition dependencies
|
||||||
|
# %.o: %.c
|
||||||
|
# $(CC) $(LDFLAGS) $(CFLAGS) $< -o $@
|
||||||
|
#$(SRCS) : %.c : %.h $(INDEPENDENT_HEADERS)
|
||||||
|
# @touch $@
|
||||||
|
|
||||||
|
clean:
|
||||||
|
/bin/rm -f *.o *~
|
||||||
|
depend:
|
||||||
|
$(CXX) -MM $(CXX.SRCS)
|
||||||
223
with_opencm3/client-term/client.c
Normal file
223
with_opencm3/client-term/client.c
Normal file
@ -0,0 +1,223 @@
|
|||||||
|
/*
|
||||||
|
* client.c - simple terminal client
|
||||||
|
*
|
||||||
|
* Copyright 2013 Edward V. Emelianoff <eddy@sao.ru>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
#include <termios.h> // tcsetattr
|
||||||
|
#include <unistd.h> // tcsetattr, close, read, write
|
||||||
|
#include <sys/ioctl.h> // ioctl
|
||||||
|
#include <stdio.h> // printf, getchar, fopen, perror
|
||||||
|
#include <stdlib.h> // exit
|
||||||
|
#include <sys/stat.h> // read
|
||||||
|
#include <fcntl.h> // read
|
||||||
|
#include <signal.h> // signal
|
||||||
|
#include <time.h> // time
|
||||||
|
#include <string.h> // memcpy
|
||||||
|
#include <stdint.h> // int types
|
||||||
|
#include <sys/time.h> // gettimeofday
|
||||||
|
|
||||||
|
double t0; // start time
|
||||||
|
|
||||||
|
FILE *fout = NULL; // file for messages duplicating
|
||||||
|
char *comdev = "/dev/ttyACM0";
|
||||||
|
int BAUD_RATE = B115200;
|
||||||
|
struct termio oldtty, tty; // TTY flags
|
||||||
|
struct termios oldt, newt; // terminal flags
|
||||||
|
int comfd; // TTY fd
|
||||||
|
|
||||||
|
/**
|
||||||
|
* function for different purposes that need to know time intervals
|
||||||
|
* @return double value: time in seconds
|
||||||
|
*/
|
||||||
|
double dtime(){
|
||||||
|
double t;
|
||||||
|
struct timeval tv;
|
||||||
|
gettimeofday(&tv, NULL);
|
||||||
|
t = tv.tv_sec + ((double)tv.tv_usec)/1e6;
|
||||||
|
return t;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Exit & return terminal to old state
|
||||||
|
* @param ex_stat - status (return code)
|
||||||
|
*/
|
||||||
|
void quit(int ex_stat){
|
||||||
|
tcsetattr(STDIN_FILENO, TCSANOW, &oldt); // return terminal to previous state
|
||||||
|
ioctl(comfd, TCSANOW, &oldtty ); // return TTY to previous state
|
||||||
|
close(comfd);
|
||||||
|
if(fout) fclose(fout);
|
||||||
|
printf("Exit! (%d)\n", ex_stat);
|
||||||
|
exit(ex_stat);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Open & setup TTY, terminal
|
||||||
|
*/
|
||||||
|
void tty_init(){
|
||||||
|
// terminal without echo
|
||||||
|
tcgetattr(STDIN_FILENO, &oldt);
|
||||||
|
newt = oldt;
|
||||||
|
newt.c_lflag &= ~(ICANON | ECHO);
|
||||||
|
if(tcsetattr(STDIN_FILENO, TCSANOW, &newt) < 0) quit(-2);
|
||||||
|
printf("\nOpen port...\n");
|
||||||
|
if ((comfd = open(comdev,O_RDWR|O_NOCTTY|O_NONBLOCK)) < 0){
|
||||||
|
fprintf(stderr,"Can't use port %s\n",comdev);
|
||||||
|
quit(1);
|
||||||
|
}
|
||||||
|
printf(" OK\nGet current settings...\n");
|
||||||
|
if(ioctl(comfd,TCGETA,&oldtty) < 0) exit(-1); // Get settings
|
||||||
|
tty = oldtty;
|
||||||
|
tty.c_lflag = 0; // ~(ICANON | ECHO | ECHOE | ISIG)
|
||||||
|
tty.c_oflag = 0;
|
||||||
|
tty.c_cflag = BAUD_RATE|CS8|CREAD|CLOCAL; // 9.6k, 8N1, RW, ignore line ctrl
|
||||||
|
tty.c_cc[VMIN] = 0; // non-canonical mode
|
||||||
|
tty.c_cc[VTIME] = 5;
|
||||||
|
if(ioctl(comfd,TCSETA,&tty) < 0) exit(-1); // set new mode
|
||||||
|
printf(" OK\n");
|
||||||
|
tcsetattr(STDIN_FILENO, TCSANOW, &newt);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read character from console without echo
|
||||||
|
* @return char readed
|
||||||
|
*/
|
||||||
|
int read_console(){
|
||||||
|
int rb;
|
||||||
|
struct timeval tv;
|
||||||
|
int retval;
|
||||||
|
fd_set rfds;
|
||||||
|
FD_ZERO(&rfds);
|
||||||
|
FD_SET(STDIN_FILENO, &rfds);
|
||||||
|
tv.tv_sec = 0; tv.tv_usec = 10000;
|
||||||
|
retval = select(1, &rfds, NULL, NULL, &tv);
|
||||||
|
if(!retval) rb = 0;
|
||||||
|
else {
|
||||||
|
if(FD_ISSET(STDIN_FILENO, &rfds)) rb = getchar();
|
||||||
|
else rb = 0;
|
||||||
|
}
|
||||||
|
return rb;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* getchar() without echo
|
||||||
|
* wait until at least one character pressed
|
||||||
|
* @return character readed
|
||||||
|
*/
|
||||||
|
int mygetchar(){ // ÁÎÁÌÏÇ getchar() ÂÅÚ ÎÅÏÂÈÏÄÉÍÏÓÔÉ ÖÁÔØ Enter
|
||||||
|
int ret;
|
||||||
|
do ret = read_console();
|
||||||
|
while(ret == 0);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Read data from TTY
|
||||||
|
* @param buff (o) - buffer for data read
|
||||||
|
* @param length - buffer len
|
||||||
|
* @return amount of readed bytes
|
||||||
|
*/
|
||||||
|
size_t read_tty(uint8_t *buff, size_t length){
|
||||||
|
ssize_t L = 0;
|
||||||
|
fd_set rfds;
|
||||||
|
struct timeval tv;
|
||||||
|
int retval;
|
||||||
|
FD_ZERO(&rfds);
|
||||||
|
FD_SET(comfd, &rfds);
|
||||||
|
tv.tv_sec = 0; tv.tv_usec = 10000; // wait for 10ms
|
||||||
|
retval = select(comfd + 1, &rfds, NULL, NULL, &tv);
|
||||||
|
if (!retval) return 0;
|
||||||
|
if(FD_ISSET(comfd, &rfds)){
|
||||||
|
if((L = read(comfd, buff, length)) < 1) return 0;
|
||||||
|
}
|
||||||
|
return (size_t)L;
|
||||||
|
}
|
||||||
|
|
||||||
|
void help(){
|
||||||
|
printf("Use this commands:\n"
|
||||||
|
"h\tShow this help\n"
|
||||||
|
"q\tQuit\n"
|
||||||
|
);
|
||||||
|
}
|
||||||
|
|
||||||
|
#define dup_pr(...) do{printf(__VA_ARGS__); if(fout) fprintf(fout, __VA_ARGS__);}while(0)
|
||||||
|
|
||||||
|
void con_sig(int rb){
|
||||||
|
uint8_t cmd;
|
||||||
|
if(rb < 1) return;
|
||||||
|
if(rb == 'q') quit(0); // q == exit
|
||||||
|
cmd = (uint8_t) rb;
|
||||||
|
write(comfd, &cmd, 1);
|
||||||
|
/*switch(rb){
|
||||||
|
case 'h':
|
||||||
|
help();
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
cmd = (uint8_t) rb;
|
||||||
|
write(comfd, &cmd, 1);
|
||||||
|
}*/
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Get integer value from buffer
|
||||||
|
* @param buff (i) - buffer with int
|
||||||
|
* @param len - length of data in buffer (could be 2 or 4)
|
||||||
|
* @return
|
||||||
|
*/
|
||||||
|
uint32_t get_int(uint8_t *buff, size_t len){
|
||||||
|
if(len != 2 && len != 4){
|
||||||
|
fprintf(stdout, "Bad data length!\n");
|
||||||
|
return 0xffffffff;
|
||||||
|
}
|
||||||
|
uint32_t data = 0;
|
||||||
|
uint8_t *i8 = (uint8_t*) &data;
|
||||||
|
if(len == 2) memcpy(i8, buff, 2);
|
||||||
|
else memcpy(i8, buff, 4);
|
||||||
|
return data;
|
||||||
|
}
|
||||||
|
|
||||||
|
int main(int argc, char *argv[]){
|
||||||
|
int rb;
|
||||||
|
uint8_t buff[256];
|
||||||
|
size_t L;
|
||||||
|
if(argc == 2){
|
||||||
|
fout = fopen(argv[1], "a");
|
||||||
|
if(!fout){
|
||||||
|
perror("Can't open output file");
|
||||||
|
exit(-1);
|
||||||
|
}
|
||||||
|
setbuf(fout, NULL);
|
||||||
|
}
|
||||||
|
tty_init();
|
||||||
|
signal(SIGTERM, quit); // kill (-15)
|
||||||
|
signal(SIGINT, quit); // ctrl+C
|
||||||
|
signal(SIGQUIT, SIG_IGN); // ctrl+\ .
|
||||||
|
signal(SIGTSTP, SIG_IGN); // ctrl+Z
|
||||||
|
setbuf(stdout, NULL);
|
||||||
|
t0 = dtime();
|
||||||
|
while(1){
|
||||||
|
rb = read_console();
|
||||||
|
if(rb > 0) con_sig(rb);
|
||||||
|
L = read_tty(buff, 255);
|
||||||
|
if(L){
|
||||||
|
buff[L] = 0;
|
||||||
|
printf("%s", buff);
|
||||||
|
//if(fout) fprintf(fout, "%zd\t%s", time(NULL), buff);
|
||||||
|
if(fout) fprintf(fout, "%s", buff);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
36
with_opencm3/client-term/data_stat.m
Normal file
36
with_opencm3/client-term/data_stat.m
Normal file
@ -0,0 +1,36 @@
|
|||||||
|
function data_stat(filename)
|
||||||
|
% prints some statistics
|
||||||
|
% also plot graphs
|
||||||
|
|
||||||
|
if(nargin == 0) filename = 'tempout'; endif
|
||||||
|
D = dlmread(filename);
|
||||||
|
if(isempty(D)) return; endif
|
||||||
|
[r c] = ind2sub(size(D), find(D(:,[3:18]) == 0)); % find bad data
|
||||||
|
D(r,:) = []; % and delete it
|
||||||
|
% [r c] = ind2sub(size(D), (D(:,[11:18]) < 2000000));
|
||||||
|
% D(r,:) = [];
|
||||||
|
printf("Some statistics:\n\n\trelative error for inner ADC:\n");
|
||||||
|
|
||||||
|
x = rel_error(D(:,[3 4 6:10]));
|
||||||
|
printf("%f ", x);
|
||||||
|
printf("\t(aver: %f)\n", mean(x));
|
||||||
|
printf("\n\trelative error for outern ADC:\n\n");
|
||||||
|
plot((D(:,1)*2^24+D(:,2))/1000, D(:,[3 4 6:10]));
|
||||||
|
T = sprintf("Internal 12-bit ADC, err=%f%%", mean(x));
|
||||||
|
xlabel("Time, s"); ylabel("R, ADU"); title(T);
|
||||||
|
print -dpng -color int.png
|
||||||
|
|
||||||
|
x = rel_error(D(:,[11:18]));
|
||||||
|
printf("%f ", x);
|
||||||
|
printf("\t(aver: %f)\n", mean(x));
|
||||||
|
printf("\n");
|
||||||
|
plot((D(:,1)*2^24+D(:,2))/1000, D(:,[11:18]));
|
||||||
|
T = sprintf("External 24-bit ADC, err=%f%%", mean(x));
|
||||||
|
xlabel("Time, s"); ylabel("R, ADU"); title(T);
|
||||||
|
print -dpng -color ext.png
|
||||||
|
|
||||||
|
|
||||||
|
%D = D(1:200, :);
|
||||||
|
|
||||||
|
close
|
||||||
|
endfunction
|
||||||
21
with_opencm3/client-term/measured_R
Normal file
21
with_opencm3/client-term/measured_R
Normal file
@ -0,0 +1,21 @@
|
|||||||
|
// ~660 ΝΝ.<2E>Τ.ΣΤ.
|
||||||
|
2280000 212.7
|
||||||
|
2400000 212.8
|
||||||
|
2650000 213.0
|
||||||
|
3290000 212.7
|
||||||
|
4300000 213.3 290
|
||||||
|
4440000 217.9 312.3
|
||||||
|
4650000 219.6 334.9
|
||||||
|
4880000 316.0 346.3
|
||||||
|
5100000 323.3 354.0
|
||||||
|
5520000 345.8 378.3
|
||||||
|
5850000 360.0 392.0
|
||||||
|
6310000 387.5 424.5
|
||||||
|
6520000 524 571
|
||||||
|
6860000 660 705
|
||||||
|
6970000 688 729
|
||||||
|
7240000 759 790
|
||||||
|
7430000 794 821
|
||||||
|
7730000 841 861
|
||||||
|
8060000 884 897
|
||||||
|
8320000 910 920
|
||||||
7
with_opencm3/client-term/measured_R_1
Normal file
7
with_opencm3/client-term/measured_R_1
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
180000 1085.0
|
||||||
|
280000 1085.0
|
||||||
|
470000 1085.3
|
||||||
|
640000 1085.3
|
||||||
|
1130000 1084.0
|
||||||
|
1410000 1083.6
|
||||||
|
1660000 1085.2
|
||||||
8
with_opencm3/client-term/rel_error.m
Normal file
8
with_opencm3/client-term/rel_error.m
Normal file
@ -0,0 +1,8 @@
|
|||||||
|
function e = rel_error(x)
|
||||||
|
%
|
||||||
|
% returns relative error for data x in percents!
|
||||||
|
% e = std(x) ./ mean(x) * 100.
|
||||||
|
|
||||||
|
e = std(x) ./ mean(x) * 100.;
|
||||||
|
|
||||||
|
endfunction
|
||||||
632
with_opencm3/client-term/tempout
Normal file
632
with_opencm3/client-term/tempout
Normal file
@ -0,0 +1,632 @@
|
|||||||
|
0 2150000 1290 1288 896 1299 1300 1285 1301 1281 1009418 1010964 1004865 1008378 1013488 1015707 1014898 1013642
|
||||||
|
0 2160000 1293 1291 896 1302 1302 1289 1304 1285 1011251 1011845 1005887 1010178 1012847 1015064 1014109 1014419
|
||||||
|
0 2170000 1292 1293 897 1302 1304 1289 1304 1284 1011682 1012811 1006796 1009864 1014958 1018175 1015960 1016451
|
||||||
|
0 2180000 1293 1292 896 1302 1303 1287 1303 1285 1011580 1013129 1006739 1009788 1015010 1017499 1015544 1015232
|
||||||
|
0 2190000 1292 1291 896 1303 1304 1289 1304 1284 1011342 1013458 1006607 1010157 1015271 1017929 1015453 1015489
|
||||||
|
0 2200000 1292 1294 894 1303 1304 1289 1303 1284 1011084 1013188 1006433 1010283 1015425 1017939 1015343 1015420
|
||||||
|
0 2210000 1293 1295 896 1301 1303 1290 1302 1285 1011100 1012995 1006375 1010037 1014922 1018060 1015301 1015500
|
||||||
|
0 2220000 1295 1291 896 1304 1304 1292 1304 1286 1011069 1012921 1006412 1010158 1014968 1018081 1015109 1015460
|
||||||
|
0 2230000 1296 1295 895 1303 1302 1292 1306 1286 1011123 1012944 1006488 1010776 1015427 1018210 1015214 1015851
|
||||||
|
0 2240000 1295 1294 898 1302 1303 1291 1304 1286 1011224 1012827 1006312 1010545 1015865 1018589 1015317 1016060
|
||||||
|
0 2250000 1293 1292 898 1305 1304 1289 1304 1285 1011079 1012609 1006188 1010829 1015952 1018418 1015235 1016081
|
||||||
|
0 2260000 1295 1293 900 1304 1305 1291 1305 1286 1010715 1012446 1006035 1010161 1015404 1018160 1015192 1016075
|
||||||
|
0 2270000 1293 1292 895 1304 1303 1291 1304 1287 1010671 1012206 1005800 1010314 1015353 1018240 1015369 1016017
|
||||||
|
0 2280000 1293 1293 897 1305 1302 1290 1303 1286 1010635 1012360 1005745 1010176 1015199 1018166 1014719 1016050
|
||||||
|
0 2290000 1296 1294 898 1302 1305 1289 1304 1287 1010579 1011999 1005521 1010120 1015211 1018255 1014811 1015889
|
||||||
|
0 2300000 1296 1298 898 1304 1305 1292 1305 1287 1010333 1011910 1005386 1009983 1015519 1018236 1014905 1016040
|
||||||
|
0 2310000 1293 1294 897 1305 1304 1292 1305 1287 1010316 1011979 1005376 1009795 1014670 1018093 1014671 1015988
|
||||||
|
0 2320000 1296 1296 895 1304 1303 1291 1305 1286 1010371 1011659 1005374 1009944 1014567 1017908 1014620 1015468
|
||||||
|
0 2330000 1294 1296 898 1306 1303 1291 1306 1287 1010136 1011545 1005227 1009669 1014605 1017888 1014614 1015504
|
||||||
|
0 2340000 1292 1294 895 1304 1305 1292 1305 1285 1009937 1011597 1004864 1009691 1014816 1017845 1014396 1015511
|
||||||
|
0 2350000 1295 1293 897 1303 1304 1292 1303 1287 1010015 1011285 1004932 1009532 1014549 1017718 1014026 1015390
|
||||||
|
0 2360000 1294 1294 898 1304 1310 1290 1304 1286 1009536 1011266 1004753 1009292 1014816 1017472 1014195 1015320
|
||||||
|
0 2370000 1293 1299 896 1305 1304 1290 1306 1286 1009564 1011046 1004730 1009402 1014114 1017328 1013880 1014924
|
||||||
|
0 2380000 1294 1294 897 1304 1303 1292 1304 1288 1009535 1011002 1004588 1009205 1014274 1017434 1014044 1015080
|
||||||
|
0 2390000 1295 1294 899 1304 1304 1292 1303 1286 1009463 1010761 1004493 1009296 1014295 1017526 1013911 1014856
|
||||||
|
0 2400000 1296 1295 897 1304 1307 1292 1305 1287 1009513 1010818 1004695 1009028 1014106 1017301 1013784 1014986
|
||||||
|
0 2410000 1296 1294 897 1305 1305 1291 1306 1287 1009202 1010739 1004448 1008986 1013726 1017131 1013853 1014774
|
||||||
|
0 2420000 1296 1291 898 1304 1304 1293 1305 1286 1009293 1010712 1004314 1008844 1014199 1017354 1013496 1014610
|
||||||
|
0 2430000 1295 1293 897 1305 1305 1292 1305 1286 1009048 1010653 1004161 1008683 1013990 1017139 1013340 1014656
|
||||||
|
0 2440000 1293 1294 897 1304 1303 1289 1306 1287 1009092 1010430 1004310 1008536 1013830 1017019 1013180 1014334
|
||||||
|
0 2450000 1294 1297 897 1305 1303 1293 1304 1286 1009207 1010544 1004215 1008649 1013587 1016859 1013360 1014323
|
||||||
|
0 2460000 1295 1294 898 1303 1305 1291 1305 1286 1009236 1010447 1004156 1008458 1013468 1017234 1013369 1013995
|
||||||
|
0 2470000 1295 1296 897 1307 1305 1294 1308 1287 1009148 1010471 1004002 1008961 1013887 1016849 1013418 1014356
|
||||||
|
0 2480000 1296 1293 896 1307 1305 1293 1304 1287 1009285 1010548 1003589 1008265 1013666 1016922 1013028 1014193
|
||||||
|
0 2490000 1295 1295 897 1304 1303 1292 1304 1286 1009044 1010336 1003968 1008987 1013739 1017044 1013195 1014708
|
||||||
|
0 2500000 1296 1295 897 1305 1303 1291 1307 1288 1008936 1010291 1003789 1008445 1013792 1016609 1013218 1014480
|
||||||
|
0 2510000 1294 1296 897 1304 1306 1292 1306 1289 1008992 1010102 1003820 1008778 1013366 1017133 1013348 1014453
|
||||||
|
0 2520000 1294 1294 896 1303 1306 1293 1305 1287 1008821 1010173 1003625 1008887 1014035 1016906 1013139 1014212
|
||||||
|
0 2530000 1297 1295 897 1306 1304 1293 1306 1287 1009042 1010176 1003660 1008620 1013625 1017202 1013406 1014293
|
||||||
|
0 2540000 1298 1297 899 1306 1306 1294 1305 1287 1008843 1010038 1003645 1008509 1013589 1016744 1012771 1013868
|
||||||
|
0 2550000 1295 1293 896 1305 1304 1293 1305 1287 1008748 1010051 1003828 1007495 1012502 1015239 1012717 1013310
|
||||||
|
0 2560000 1296 1294 899 1306 1303 1294 1305 1289 1008723 1009915 1003690 1007136 1012413 1015627 1012740 1013681
|
||||||
|
0 2570000 1296 1293 899 1301 1305 1293 1306 1287 1008633 1009890 1003570 1007650 1013010 1015921 1012569 1013053
|
||||||
|
0 2580000 1297 1293 898 1306 1305 1292 1305 1287 1008552 1009818 1003507 1007295 1012396 1015120 1012473 1013092
|
||||||
|
0 2590000 1295 1293 898 1306 1304 1293 1305 1287 1008497 1009624 1003365 1007287 1012480 1015255 1012606 1013243
|
||||||
|
0 2600000 1298 1293 896 1305 1306 1294 1305 1288 1008426 1009834 1003606 1007185 1012391 1015918 1012437 1013549
|
||||||
|
0 2610000 1295 1295 898 1304 1307 1291 1306 1289 1008502 1009932 1003595 1007356 1012492 1015386 1012729 1013365
|
||||||
|
0 2620000 1295 1292 898 1307 1304 1292 1310 1288 1008517 1010073 1003473 1007933 1012671 1015381 1012416 1013125
|
||||||
|
0 2630000 1296 1294 898 1306 1302 1292 1305 1288 1008475 1009717 1003584 1007021 1012373 1015240 1012556 1013433
|
||||||
|
0 2640000 1295 1294 897 1306 1304 1294 1306 1289 1008482 1009955 1003720 1007513 1012482 1015509 1012516 1013119
|
||||||
|
0 2650000 1295 1294 897 1306 1306 1295 1305 1286 1008639 1009974 1003512 1007612 1012254 1015791 1012305 1013193
|
||||||
|
0 2660000 1297 1296 898 1306 1305 1294 1305 1288 1008750 1009963 1003706 1007350 1012368 1014963 1012417 1012642
|
||||||
|
0 2670000 1295 1295 897 1306 1303 1292 1306 1287 1008433 1009831 1003598 1007119 1012485 1015650 1012530 1012640
|
||||||
|
0 2680000 1296 1298 897 1304 1305 1293 1306 1286 1008692 1009990 1003692 1007119 1012465 1015868 1012581 1013378
|
||||||
|
0 2690000 1295 1293 897 1307 1306 1294 1306 1288 1008935 1010108 1003815 1007545 1012939 1015767 1012560 1013643
|
||||||
|
0 2700000 1296 1295 900 1306 1302 1293 1304 1287 1008818 1010095 1003805 1007437 1012590 1014947 1012706 1013681
|
||||||
|
0 2710000 1289 1293 897 1306 1306 1293 1305 1287 1008951 1010102 1003999 1007404 1012675 1015442 1012663 1013279
|
||||||
|
0 2720000 1297 1294 897 1306 1305 1293 1305 1287 1009138 1010375 1004088 1007420 1012777 1015464 1012636 1013223
|
||||||
|
0 2730000 1294 1294 898 1302 1306 1293 1305 1288 1009446 1011052 1004411 1008129 1012996 1016040 1013035 1013514
|
||||||
|
0 2740000 1296 1295 896 1306 1304 1293 1306 1288 1009658 1011280 1004420 1008998 1013719 1017627 1013078 1014730
|
||||||
|
0 2750000 1298 1297 899 1307 1307 1295 1305 1287 1009592 1011256 1004567 1009204 1013695 1017592 1012994 1014680
|
||||||
|
0 2760000 1296 1293 897 1306 1306 1294 1305 1287 1009365 1011295 1004433 1009574 1013941 1017235 1012990 1015022
|
||||||
|
0 2770000 1295 1294 898 1308 1306 1294 1306 1288 1009646 1011159 1004484 1008982 1013772 1017861 1013205 1014599
|
||||||
|
0 2780000 1297 1292 897 1304 1303 1296 1305 1288 1009438 1011322 1004597 1008952 1013740 1016525 1013073 1013462
|
||||||
|
0 2790000 1294 1294 895 1304 1304 1291 1305 1286 1008184 1010066 1003480 1007207 1012510 1015170 1012409 1012697
|
||||||
|
0 2800000 1297 1291 897 1303 1304 1291 1305 1287 1008003 1010376 1003500 1006429 1011417 1014905 1011969 1012265
|
||||||
|
0 2810000 1295 1293 895 1305 1304 1291 1306 1287 1007708 1010133 1003077 1006602 1011661 1014525 1011710 1011993
|
||||||
|
0 2820000 1297 1294 897 1303 1305 1291 1306 1287 1007527 1009929 1002928 1006264 1011155 1014248 1011545 1011787
|
||||||
|
0 2830000 1296 1295 896 1306 1307 1292 1306 1288 1007684 1010199 1003455 1007362 1011960 1015125 1012160 1012625
|
||||||
|
0 2840000 1295 1291 900 1304 1303 1292 1304 1287 1007562 1010309 1003410 1006742 1011815 1014507 1012303 1012385
|
||||||
|
0 2850000 1299 1293 896 1306 1304 1292 1304 1287 1007948 1009968 1003526 1006883 1011953 1014348 1011620 1011804
|
||||||
|
0 2860000 1296 1292 898 1307 1304 1292 1305 1286 1007416 1009670 1003214 1006665 1011836 1014010 1011620 1011601
|
||||||
|
0 2870000 1296 1295 898 1304 1302 1291 1304 1286 1007556 1009708 1003171 1006534 1011680 1013747 1011626 1011519
|
||||||
|
0 2880000 1295 1291 896 1302 1303 1291 1304 1286 1007405 1009689 1003132 1006554 1011642 1013779 1011800 1011612
|
||||||
|
0 2890000 1295 1292 895 1304 1303 1287 1302 1286 1007563 1009642 1003506 1006516 1011804 1013927 1011879 1011692
|
||||||
|
0 2900000 1293 1292 896 1305 1304 1290 1303 1286 1007277 1009676 1003154 1006939 1011795 1013868 1011896 1011790
|
||||||
|
0 2910000 1297 1294 898 1304 1304 1293 1304 1286 1008262 1009945 1003730 1007152 1012089 1014649 1012127 1012448
|
||||||
|
0 2920000 1293 1292 898 1303 1305 1290 1304 1286 1008356 1010013 1004029 1006843 1011921 1014206 1011998 1012107
|
||||||
|
0 2930000 1294 1293 898 1301 1302 1289 1303 1287 1008296 1010219 1003933 1006775 1011986 1014163 1012079 1012230
|
||||||
|
0 2940000 1294 1293 897 1304 1303 1290 1303 1286 1008315 1010320 1003972 1006786 1011962 1014185 1012167 1012205
|
||||||
|
0 2950000 1295 1291 896 1304 1303 1290 1303 1285 1008280 1010316 1003931 1006732 1012044 1014146 1012256 1012140
|
||||||
|
0 2960000 1295 1297 895 1302 1302 1290 1305 1285 1008458 1010359 1003916 1006884 1012128 1014418 1012316 1012306
|
||||||
|
0 2970000 1295 1292 897 1302 1303 1289 1303 1285 1008571 1010504 1004138 1006895 1012191 1014381 1012469 1012405
|
||||||
|
0 2980000 1295 1292 896 1303 1304 1291 1304 1285 1008782 1010674 1004179 1007084 1012391 1014583 1012564 1012426
|
||||||
|
0 2990000 1295 1292 896 1305 1302 1292 1303 1286 1008776 1010650 1004221 1007254 1012491 1014635 1012650 1012570
|
||||||
|
0 3000000 1295 1293 897 1304 1306 1290 1306 1286 1008856 1010823 1004311 1007207 1012499 1014519 1012669 1012562
|
||||||
|
0 3010000 1294 1295 897 1303 1304 1293 1306 1285 1008931 1010826 1004335 1007324 1012536 1014684 1012684 1012600
|
||||||
|
0 3020000 1294 1293 896 1305 1303 1291 1306 1286 1009044 1010793 1004427 1007342 1012629 1014629 1012787 1012707
|
||||||
|
0 3030000 1294 1292 896 1302 1304 1288 1303 1285 1009077 1010804 1004313 1007407 1012684 1014933 1012896 1012858
|
||||||
|
0 3040000 1295 1292 896 1304 1302 1289 1303 1286 1009214 1011113 1004538 1007443 1012697 1014889 1012932 1012892
|
||||||
|
0 3050000 1295 1292 899 1303 1301 1291 1303 1286 1009177 1011031 1004611 1007541 1012790 1014939 1012974 1012822
|
||||||
|
0 3060000 1293 1293 898 1302 1305 1290 1305 1285 1009291 1011176 1004649 1007560 1012735 1014866 1013028 1012907
|
||||||
|
0 3070000 1293 1294 896 1303 1305 1291 1307 1286 1009332 1011224 1004676 1007595 1012803 1014666 1013081 1012807
|
||||||
|
0 3080000 1293 1294 894 1305 1304 1289 1306 1286 1009237 1011383 1004765 1007566 1012772 1015029 1013087 1012867
|
||||||
|
0 3090000 1292 1292 897 1305 1304 1291 1305 1286 1009285 1011302 1004677 1007640 1012888 1015189 1013070 1012830
|
||||||
|
0 3100000 1291 1294 898 1305 1305 1291 1304 1285 1009149 1011128 1004757 1007542 1012852 1015129 1013146 1013040
|
||||||
|
0 3110000 1296 1292 899 1304 1305 1291 1305 1289 1009089 1011153 1004556 1007578 1012727 1014839 1012973 1012720
|
||||||
|
0 3120000 1293 1290 896 1303 1303 1290 1305 1286 1009113 1011138 1004440 1007457 1012685 1014981 1012958 1012737
|
||||||
|
0 3130000 1293 1293 897 1303 1304 1290 1304 1289 1009055 1011111 1004409 1007891 1012777 1014828 1012918 1012776
|
||||||
|
0 3140000 1295 1294 896 1305 1303 1292 1306 1286 1009053 1011089 1004333 1007866 1012798 1014816 1012936 1012725
|
||||||
|
0 3150000 1295 1292 897 1301 1304 1291 1305 1287 1008936 1011072 1004285 1007690 1012638 1014906 1012904 1012748
|
||||||
|
0 3160000 1296 1292 897 1303 1306 1291 1305 1286 1008952 1011042 1004298 1007852 1012851 1014931 1013008 1012873
|
||||||
|
0 3170000 1295 1295 896 1300 1304 1292 1304 1287 1008783 1011007 1004172 1007969 1012913 1014982 1013055 1013004
|
||||||
|
0 3180000 1295 1292 896 1302 1303 1290 1304 1287 1008861 1011140 1004221 1008079 1013119 1014944 1012953 1012903
|
||||||
|
0 3190000 1292 1291 897 1303 1302 1289 1303 1286 1008901 1011104 1004233 1007485 1012974 1014710 1013031 1012943
|
||||||
|
0 3200000 1292 1292 897 1302 1304 1289 1304 1285 1008813 1011852 1004692 1007795 1013346 1014602 1013074 1012806
|
||||||
|
0 3210000 1296 1293 897 1304 1304 1290 1305 1287 1008755 1011614 1004787 1007896 1013004 1014328 1012942 1012900
|
||||||
|
0 3220000 1292 1293 895 1303 1305 1291 1304 1284 1008924 1011736 1004561 1007763 1012874 1014359 1012992 1012730
|
||||||
|
0 3230000 1293 1291 897 1303 1304 1290 1304 1284 1008706 1011991 1004798 1008110 1013413 1014916 1012989 1012948
|
||||||
|
0 3240000 1295 1292 894 1304 1303 1292 1303 1287 1008814 1012083 1004790 1008226 1013463 1014777 1013202 1013392
|
||||||
|
0 3250000 1296 1293 896 1304 1304 1291 1304 1285 1008871 1012281 1004839 1008200 1013302 1014951 1013111 1013328
|
||||||
|
0 3260000 1292 1291 896 1308 1302 1289 1304 1286 1008780 1012220 1005112 1008253 1013601 1014940 1013353 1013419
|
||||||
|
0 3270000 1294 1293 900 1305 1305 1290 1305 1285 1009042 1012394 1004995 1008384 1013786 1015076 1013564 1013494
|
||||||
|
0 3280000 1296 1293 896 1303 1304 1291 1306 1288 1009114 1012489 1005077 1008428 1013827 1015296 1013713 1013812
|
||||||
|
0 3290000 1294 1295 897 1306 1305 1291 1304 1285 1009411 1013081 1005605 1009001 1013860 1015290 1013614 1013844
|
||||||
|
0 3300000 1295 1292 897 1304 1305 1290 1306 1286 1009774 1014155 1005912 1009311 1014461 1015691 1013868 1014154
|
||||||
|
0 3310000 1298 1293 898 1304 1303 1291 1305 1287 1010126 1014281 1005843 1009422 1014608 1015923 1014095 1014458
|
||||||
|
0 3320000 1297 1294 897 1304 1305 1291 1307 1286 1010183 1014814 1006158 1009606 1014609 1016112 1014138 1014684
|
||||||
|
|
||||||
|
0 3330000 1295 1291 896 1303 1303 1290 1305 1287 1010382 1014645 1006266 1009773 1014793 1016141 1014274 1014694
|
||||||
|
0 3340000 1296 1291 897 1304 1304 1290 1303 1287 1010419 1014753 1006506 1010036 1014847 1016497 1014486 1014839
|
||||||
|
0 3350000 1297 1291 897 1305 1305 1294 1306 1287 1010788 1014837 1006549 1010031 1015048 1016595 1014632 1015132
|
||||||
|
0 3360000 1294 1293 897 1304 1306 1291 1307 1287 1010952 1015106 1006822 1010375 1015206 1016844 1014738 1015424
|
||||||
|
0 3370000 1295 1292 897 1304 1305 1291 1305 1287 1010972 1015118 1006947 1010480 1015460 1017100 1014985 1015429
|
||||||
|
0 3380000 1297 1294 896 1306 1307 1292 1306 1288 1011134 1015416 1007015 1010597 1015623 1017325 1015233 1015767
|
||||||
|
0 3390000 1295 1293 896 1305 1303 1291 1304 1286 1011554 1015575 1007477 1010832 1016049 1017383 1015665 1015911
|
||||||
|
0 3400000 1296 1293 896 1304 1303 1291 1305 1286 1011662 1016199 1007708 1011168 1016389 1017649 1015869 1016133
|
||||||
|
0 3410000 1299 1292 898 1305 1307 1291 1305 1290 1011635 1015871 1007778 1011259 1016453 1017833 1016151 1016238
|
||||||
|
0 3420000 1297 1294 893 1304 1305 1291 1305 1287 1011872 1016269 1007834 1011409 1016559 1017981 1016333 1016507
|
||||||
|
0 3430000 1296 1297 898 1305 1305 1290 1305 1287 1011936 1016414 1008148 1011730 1016602 1017989 1016288 1016602
|
||||||
|
0 3440000 1297 1293 898 1305 1306 1292 1304 1287 1012088 1016673 1008288 1011740 1016913 1018255 1016453 1016631
|
||||||
|
0 3450000 1295 1293 897 1305 1306 1292 1305 1287 1012225 1016959 1008458 1011906 1017047 1018394 1016730 1016927
|
||||||
|
0 3460000 1293 1295 896 1305 1307 1290 1306 1286 1012556 1017653 1008700 1012118 1017210 1018300 1016786 1017004
|
||||||
|
0 3470000 1297 1294 898 1306 1303 1292 1304 1286 1012662 1017385 1008845 1012356 1017362 1018567 1016909 1017149
|
||||||
|
0 3480000 1295 1292 896 1305 1304 1292 1305 1288 1012832 1017449 1009123 1012396 1017405 1018702 1017105 1017271
|
||||||
|
0 3490000 1296 1292 897 1307 1304 1292 1305 1287 1013009 1017932 1008541 1012527 1017562 1018767 1017189 1017431
|
||||||
|
0 3500000 1296 1296 897 1307 1305 1293 1305 1287 1013106 1018062 1008800 1012653 1017664 1018837 1017287 1017541
|
||||||
|
0 3510000 1298 1294 898 1304 1305 1292 1306 1287 1013193 1018015 1008886 1012749 1017865 1019143 1017398 1017664
|
||||||
|
0 3520000 1297 1293 895 1307 1304 1294 1305 1288 1013393 1019050 1009079 1012626 1017677 1019287 1017492 1017801
|
||||||
|
0 3530000 1296 1295 898 1304 1307 1294 1307 1286 1014525 1018889 1009147 1012700 1017859 1019433 1017560 1017903
|
||||||
|
0 3540000 1297 1294 898 1305 1303 1292 1305 1287 1014707 1018685 1009365 1013308 1018167 1019528 1017641 1017886
|
||||||
|
0 3550000 1297 1292 897 1306 1305 1292 1306 1286 1014828 1018131 1009530 1012789 1018585 1019835 1017715 1017916
|
||||||
|
0 3560000 1296 1294 900 1306 1304 1290 1305 1287 1015140 1017548 1009473 1012718 1018369 1019853 1017686 1017934
|
||||||
|
0 3570000 1296 1293 898 1303 1305 1291 1305 1287 1015219 1016387 1009681 1013216 1018829 1020089 1017832 1018199
|
||||||
|
0 3580000 1296 1297 896 1308 1305 1292 1304 1287 1015142 1016379 1009733 1013146 1018707 1020161 1017860 1018019
|
||||||
|
0 3590000 1294 1296 898 1305 1305 1292 1306 1286 1015092 1016367 1009782 1013183 1018874 1020179 1017917 1018353
|
||||||
|
0 3600000 1297 1295 897 1304 1306 1294 1307 1287 1015314 1016373 1009828 1013260 1018834 1020022 1017910 1018250
|
||||||
|
0 3610000 1296 1294 895 1305 1305 1291 1305 1286 1015422 1016429 1009840 1014085 1020270 1020463 1018085 1018552
|
||||||
|
0 3620000 1293 1294 898 1304 1309 1288 1304 1287 1015501 1016194 1009763 1014323 1020543 1020756 1018480 1018498
|
||||||
|
0 3630000 1298 1300 899 1306 1304 1292 1306 1289 1015759 1016210 1009740 1014507 1020633 1020945 1018418 1018487
|
||||||
|
0 3640000 1296 1296 899 1305 1305 1292 1306 1287 1015993 1016248 1009503 1014621 1020640 1021029 1018541 1018494
|
||||||
|
0 3650000 1297 1295 897 1306 1305 1292 1307 1287 1016171 1016364 1010115 1014622 1020711 1021127 1018587 1018516
|
||||||
|
0 3660000 1295 1295 896 1304 1305 1292 1306 1286 1016290 1016476 1010323 1014513 1020789 1020893 1019229 1018696
|
||||||
|
0 3670000 1296 1294 897 1309 1308 1292 1306 1288 1017097 1017074 1009996 1014684 1020817 1021336 1019371 1018600
|
||||||
|
0 3680000 1296 1297 899 1304 1305 1291 1304 1288 1017249 1017821 1009938 1014858 1020215 1021336 1019332 1018686
|
||||||
|
0 3690000 1296 1293 898 1311 1306 1293 1305 1288 1017217 1017939 1009976 1014940 1020365 1021444 1019586 1018611
|
||||||
|
0 3700000 1297 1296 897 1306 1305 1293 1307 1287 1017613 1017885 1010055 1014951 1020333 1021675 1019638 1018680
|
||||||
|
0 3710000 1297 1297 898 1309 1305 1293 1306 1288 1019599 1024373 1009994 1015186 1020501 1021635 1019970 1018818
|
||||||
|
0 3720000 1296 1295 899 1301 1307 1292 1306 1287 1019277 1024751 1009978 1015420 1020434 1021967 1020031 1019093
|
||||||
|
0 3730000 1294 1296 898 1305 1308 1292 1305 1286 1019084 1024836 1009963 1015419 1020535 1022197 1020223 1019112
|
||||||
|
0 3740000 1294 1295 897 1307 1305 1295 1308 1287 1018407 1025057 1009992 1015458 1020679 1022453 1020207 1019082
|
||||||
|
0 3750000 1298 1294 900 1307 1306 1293 1307 1287 1018064 1027913 1010192 1015702 1020975 1022662 1020306 1019345
|
||||||
|
0 3760000 1298 1295 898 1308 1305 1293 1305 1288 1017877 1028706 1010199 1015600 1020922 1022884 1020382 1019425
|
||||||
|
0 3770000 1297 1295 898 1307 1307 1294 1307 1287 1017830 1029798 1010161 1016042 1021257 1024428 1020566 1019411
|
||||||
|
0 3780000 1297 1294 899 1306 1306 1293 1307 1288 1017746 1031486 1010247 1016171 1021389 1024922 1020643 1019880
|
||||||
|
0 3790000 1296 1296 896 1308 1304 1292 1308 1288 1017601 1031905 1010328 1016214 1021828 1025038 1020810 1020044
|
||||||
|
0 3800000 1297 1296 898 1308 1307 1294 1306 1287 1017763 1032140 1010313 1016067 1021764 1025292 1020922 1020108
|
||||||
|
0 3810000 1296 1298 898 1306 1308 1293 1309 1288 1023395 1034699 1010748 1015883 1021921 1025036 1021032 1020199
|
||||||
|
0 3820000 1299 1297 900 1309 1307 1294 1305 1288 1023942 1034615 1010940 1015465 1022093 1026560 1021322 1020557
|
||||||
|
0 3830000 1296 1294 897 1307 1307 1293 1307 1289 1024186 1035420 1010948 1015332 1022187 1032558 1021589 1021008
|
||||||
|
0 3840000 1297 1297 893 1308 1307 1294 1307 1287 1024228 1036198 1011079 1015232 1022424 1033218 1021808 1021316
|
||||||
|
0 3850000 1301 1295 898 1307 1308 1293 1308 1286 1024196 1038445 1011149 1015235 1022479 1033512 1021820 1021414
|
||||||
|
0 3860000 1299 1297 898 1308 1306 1292 1308 1288 1024260 1039233 1011278 1015320 1022620 1033853 1021905 1021462
|
||||||
|
0 3870000 1297 1294 897 1309 1306 1293 1307 1288 1024492 1045686 1014362 1020329 1023063 1034885 1022242 1021516
|
||||||
|
0 3880000 1296 1295 897 1309 1307 1295 1309 1287 1025599 1209273 1017208 1020598 1023086 1038025 1022356 1024004
|
||||||
|
0 3890000 1297 1297 897 1308 1307 1292 1308 1287 1025143 1256477 1018060 1020638 1023177 1038582 1022649 1024223
|
||||||
|
0 3900000 1297 1297 897 1306 1308 1294 1309 1288 1025845 1267611 1018407 1020855 1023396 1038590 1023011 1024770
|
||||||
|
0 3910000 1304 1294 897 1309 1308 1293 1307 1288 1026421 1270986 1018899 1020839 1023420 1039533 1023471 1025314
|
||||||
|
0 3920000 1297 1298 897 1304 1311 1294 1307 1287 1026549 1278416 1019891 1020980 1023570 1039686 1023490 1025264
|
||||||
|
0 3930000 1298 1297 897 1307 1307 1293 1307 1288 1042571 1282917 1128268 1021059 1023689 1039761 1023624 1025503
|
||||||
|
0 3940000 1297 1296 898 1306 1308 1292 1309 1288 1048204 1297236 1195118 1021155 1024001 1040411 1024070 1025962
|
||||||
|
0 3950000 1297 1298 897 1305 1311 1294 1310 1288 1050506 1308980 1205633 1021196 1023888 1040568 1024289 1026423
|
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0 7040000 2501 2513 1343 2533 2532 2491 2508 2489 2929411 2916336 2938852 2889399 2872679 2852733 2780363 2825553
|
||||||
|
0 7050000 2505 2516 1343 2535 2535 2496 2512 2494 2934515 2921501 2943897 2894633 2878131 2857939 2792518 2836867
|
||||||
|
0 7060000 2510 2520 1346 2540 2538 2496 2515 2496 2944611 2931663 2953813 2899811 2883511 2863241 2798544 2842549
|
||||||
|
0 7070000 2512 2524 1348 2542 2540 2500 2518 2499 2949598 2936634 2958721 2910249 2894133 2868370 2804508 2848068
|
||||||
|
0 7080000 2513 2527 1345 2544 2543 2503 2520 2502 2954518 2941614 2963529 2915223 2899343 2878620 2816220 2853587
|
||||||
|
0 7090000 2518 2531 1348 2546 2546 2507 2524 2506 2964296 2946580 2968303 2920260 2904573 2883699 2821984 2864451
|
||||||
|
0 7100000 2521 2530 1350 2549 2549 2510 2528 2510 2969070 2956282 2977776 2930176 2909806 2888674 2827712 2869809
|
||||||
|
0 7110000 2523 2535 1351 2553 2553 2512 2530 2511 2973809 2961048 2982449 2935028 2919863 2898548 2833413 2875079
|
||||||
|
0 7120000 2528 2535 1353 2555 2556 2517 2532 2517 2978520 2965762 2987017 2939883 2924823 2903498 2844694 2885600
|
||||||
|
0 7130000 2528 2539 1352 2558 2558 2518 2537 2518 2987778 2975089 2991562 2944693 2929826 2908278 2850255 2890766
|
||||||
|
0 7140000 2533 2542 1352 2562 2560 2522 2538 2519 2992324 2979652 3000561 2954140 2939581 2913025 2855862 2895844
|
||||||
|
0 7150000 2535 2544 1352 2561 2563 2525 2541 2524 2996793 2984182 3004927 2958769 2944391 2922519 2866759 2900895
|
||||||
|
0 7160000 2539 2548 1356 2567 2566 2530 2544 2526 3005747 2988679 3009330 2963405 2949163 2927175 2872080 2911018
|
||||||
|
0 7170000 2540 2549 1355 2569 2568 2531 2548 2529 3010140 2997575 3017987 2972516 2953904 2931813 2877303 2915978
|
||||||
|
0 7180000 2543 2555 1357 2572 2573 2533 2549 2531 3014469 3001920 3022212 2977004 2963179 2940904 2882536 2920853
|
||||||
|
0 7190000 2546 2557 1357 2575 2573 2535 2554 2533 3018751 3006232 3026425 2981395 2967795 2945426 2892664 2930467
|
||||||
|
0 7200000 2548 2558 1359 2577 2575 2538 2556 2536 3027265 3014773 3030567 2985800 2972310 2949941 2897713 2935243
|
||||||
|
0 7210000 2551 2561 1360 2577 2576 2541 2557 2539 3031493 3019005 3038866 2994526 2981279 2954388 2902558 2939976
|
||||||
|
0 7220000 2552 2561 1358 2580 2580 2542 2561 2540 3035631 3023155 3042887 2998837 2985690 2963167 2912638 2944679
|
||||||
|
0 7230000 2559 2567 1361 2584 2583 2547 2563 2545 3043816 3027302 3046886 3003041 2990081 2967482 2917519 2953909
|
||||||
|
0 7240000 2558 2566 1361 2585 2584 2549 2566 2547 3047828 3035480 3054807 3007282 2994384 2971799 2922376 2958532
|
||||||
|
0 7250000 2562 2570 1362 2586 2587 2551 2569 2548 3051892 3039496 3058701 3015526 3002992 2980279 2927173 2963023
|
||||||
|
0 7260000 2563 2571 1364 2589 2589 2554 2568 2551 3055804 3043533 3062600 3019696 3007148 2984468 2934919 2971981
|
||||||
|
0 7270000 2563 2574 1363 2592 2592 2558 2574 2555 3063654 3051372 3066396 3023727 3011288 2988643 2939351 2976340
|
||||||
|
0 7280000 2569 2577 1364 2592 2594 2559 2576 2557 3067493 3055208 3073969 3031681 3015341 2992792 2943925 2980699
|
||||||
|
0 7290000 2571 2579 1364 2596 2595 2560 2577 2559 3071324 3059056 3077690 3035649 3023471 3000964 2953210 2985014
|
||||||
|
0 7300000 2574 2581 1365 2598 2599 2565 2579 2561 3078824 3062890 3081385 3039575 3027527 3004965 2957771 2993573
|
||||||
|
0 7310000 2574 2584 1365 2600 2602 2565 2583 2562 3082626 3070426 3088672 3043467 3031533 3008993 2962227 2997847
|
||||||
|
0 7320000 2577 2585 1369 2601 2602 2569 2585 2565 3086301 3074154 3092288 3051127 3039535 3016974 2966747 3002032
|
||||||
|
0 7330000 2579 2589 1370 2603 2605 2570 2586 2569 3089971 3077850 3095879 3054940 3043420 3020856 2975532 3010372
|
||||||
|
0 7340000 2581 2591 1367 2606 2606 2572 2590 2569 3097199 3085150 3099431 3058699 3047287 3024776 2979873 3014512
|
||||||
|
0 7350000 2581 2593 1371 2609 2609 2576 2590 2572 3100808 3088750 3106454 3066106 3051146 3028633 2984158 3018529
|
||||||
|
0 7360000 2586 2593 1367 2609 2609 2577 2592 2576 3104361 3092372 3109922 3069833 3058777 3036290 2992609 3022573
|
||||||
|
0 7370000 2588 2596 1371 2612 2613 2580 2595 2576 3111446 3095879 3113358 3073440 3062496 3040111 2996835 3030589
|
||||||
|
0 7380000 2590 2598 1371 2613 2615 2580 2598 2579 3114893 3102964 3120177 3077094 3066269 3043850 3000916 3034549
|
||||||
|
0 7390000 2591 2599 1371 2615 2616 2583 2599 2579 3118338 3106425 3123550 3084295 3073662 3047629 3005061 3038479
|
||||||
|
0 7400000 2595 2601 1371 2618 2618 2586 2601 2583 3121788 3109850 3126923 3087810 3077300 3054989 3013181 3046298
|
||||||
|
0 7410000 2597 2602 1373 2621 2620 2587 2603 2585 3128591 3116711 3130198 3091366 3080945 3058648 3017025 3050122
|
||||||
|
0 7420000 2596 2605 1374 2622 2622 2590 2604 2586 3131872 3120080 3136748 3098293 3084503 3062335 3020830 3053946
|
||||||
|
0 7430000 2599 2608 1373 2624 2623 2591 2606 2589 3135209 3123422 3139999 3101736 3091602 3069537 3024812 3057745
|
||||||
|
0 7440000 2602 2611 1372 2623 2625 2594 2609 2591 3141783 3126725 3143204 3105156 3095079 3073090 3032431 3065251
|
||||||
|
0 7450000 2606 2611 1376 2625 2629 2594 2611 2593 3145047 3133376 3149601 3108579 3098554 3076656 3036272 3068950
|
||||||
|
0 7460000 2606 2612 1376 2627 2627 2597 2611 2593 3148305 3136634 3152716 3115257 3105417 3080203 3040031 3072679
|
||||||
|
0 7470000 2608 2614 1377 2630 2632 2599 2615 2596 3151489 3139835 3155813 3118577 3108815 3087148 3047645 3079967
|
||||||
|
0 7480000 2612 2617 1377 2636 2633 2601 2618 2598 3157782 3146235 3158964 3121833 3112218 3090643 3051432 3083575
|
||||||
|
0 7490000 2613 2619 1379 2633 2636 2601 2619 2600 3160960 3149366 3165010 3128359 3115629 3094041 3055211 3087159
|
||||||
|
0 7500000 2613 2619 1378 2635 2637 2605 2621 2601 3164000 3152490 3168098 3131624 3122242 3100801 3058942 3090689
|
||||||
|
0 7510000 2616 2622 1379 2637 2639 2608 2621 2604 3170161 3155665 3171108 3134819 3125578 3104201 3066364 3097756
|
||||||
|
0 7520000 2617 2625 1379 2638 2640 2607 2625 2607 3173238 3161859 3177094 3137996 3128877 3107607 3070097 3101274
|
||||||
|
0 7530000 2618 2623 1382 2640 2641 2610 2626 2608 3176251 3164907 3180030 3144320 3135376 3110883 3073738 3104736
|
||||||
|
0 7540000 2620 2626 1381 2642 2644 2612 2627 2609 3179255 3167923 3182980 3147457 3138587 3117460 3080993 3108209
|
||||||
|
0 7550000 2623 2630 1380 2644 2644 2613 2629 2610 3185193 3173935 3185879 3150572 3141802 3120753 3084543 3115013
|
||||||
|
0 7560000 2624 2629 1381 2645 2647 2617 2632 2612 3188162 3176905 3191646 3156732 3145014 3124017 3088125 3118432
|
||||||
|
0 7570000 2626 2631 1381 2646 2647 2618 2634 2616 3191043 3179861 3194481 3159768 3151232 3130426 3091662 3121779
|
||||||
|
0 7580000 2626 2635 1382 2648 2649 2619 2635 2617 3193977 3182821 3197327 3162783 3154414 3133581 3098678 3128390
|
||||||
|
0 7590000 2629 2635 1381 2649 2653 2620 2638 2618 3199689 3188623 3202906 3165790 3157522 3136802 3102112 3131704
|
||||||
|
0 7600000 2631 2638 1384 2652 2646 2622 2637 2620 3202514 3191536 3205695 3171746 3163671 3139908 3105558 3134976
|
||||||
|
0 7610000 2633 2639 1383 2653 2653 2624 2640 2622 3205377 3194419 3208462 3174667 3166689 3146207 3112422 3138270
|
||||||
|
0 7620000 2637 2640 1385 2655 2657 2625 2643 2622 3210938 3200087 3211212 3177600 3169731 3149289 3115759 3144651
|
||||||
|
0 7630000 2634 2643 1383 2656 2658 2629 2644 2624 3213749 3202903 3216661 3183431 3172724 3152368 3119064 3147850
|
||||||
|
0 7640000 2637 2639 1385 2657 2659 2628 2645 2626 3216494 3205728 3219324 3186323 3178664 3158498 3122364 3151064
|
||||||
|
0 7650000 2641 2644 1386 2659 2660 2631 2645 2627 3219227 3208478 3222066 3189159 3181655 3161511 3129045 3157353
|
||||||
|
0 7660000 2641 2646 1386 2659 2662 2632 2650 2630 3224610 3214002 3227352 3191984 3184578 3164521 3132385 3160494
|
||||||
|
0 7670000 2644 2650 1387 2661 2663 2634 2650 2631 3227306 3216764 3229967 3197611 3190401 3167493 3135674 3163615
|
||||||
|
0 7680000 2644 2646 1387 2661 2665 2636 2650 2633 3229996 3219475 3232568 3200433 3193288 3173398 3142218 3166751
|
||||||
|
0 7690000 2646 2651 1387 2666 2665 2637 2652 2635 3235266 3222191 3235132 3203237 3196160 3176346 3145475 3172807
|
||||||
|
0 7700000 2646 2653 1388 2667 2669 2639 2656 2636 3237884 3227587 3240352 3208784 3199027 3179289 3148684 3175870
|
||||||
|
0 7710000 2650 2651 1388 2666 2670 2641 2657 2638 3240532 3230250 3242879 3211465 3204700 3185112 3151903 3178892
|
||||||
|
0 7720000 2650 2656 1394 2669 2671 2641 2658 2638 3243091 3232860 3245416 3214236 3207533 3188031 3158293 3184870
|
||||||
|
0 7730000 2651 2655 1389 2672 2672 2645 2661 2642 3248248 3238125 3247945 3216898 3210313 3190888 3161410 3187846
|
||||||
|
0 7740000 2654 2656 1392 2670 2673 2646 2660 2643 3250794 3240733 3252922 3222303 3215849 3193715 3164572 3190794
|
||||||
|
0 7750000 2656 2657 1390 2671 2672 2646 2660 2645 3253271 3243304 3255409 3224959 3218559 3199389 3170157 3193705
|
||||||
|
0 7760000 2656 2659 1391 2675 2675 2649 2669 2645 3258237 3245858 3257786 3227509 3221224 3202165 3173188 3199475
|
||||||
|
0 7770000 2659 2662 1394 2677 2676 2650 2665 2647 3260691 3250902 3262626 3232716 3223880 3204913 3176228 3202312
|
||||||
|
0 7780000 2661 2662 1390 2676 2677 2651 2667 2648 3263116 3253354 3265027 3235315 3229238 3210385 3179262 3205154
|
||||||
|
0 7790000 2660 2663 1392 2677 2680 2654 2666 2650 3265568 3255922 3267405 3237887 3231936 3213158 3185318 3210824
|
||||||
|
0 7800000 2661 2668 1392 2680 2683 2654 2671 2652 3270399 3260870 3269749 3240426 3234527 3215869 3188197 3213635
|
||||||
|
0 7810000 2663 2668 1391 2680 2681 2654 2671 2652 3272843 3263350 3274434 3245453 3239740 3218559 3191185 3216409
|
||||||
|
0 7820000 2666 2668 1393 2682 2684 2657 2672 2654 3275187 3265761 3276780 3247991 3242343 3223914 3197087 3219167
|
||||||
|
0 7830000 2667 2670 1394 2682 2685 2657 2674 2657 3279911 3268171 3279075 3250482 3244948 3226614 3200100 3224680
|
||||||
|
0 7840000 2668 2670 1396 2685 2686 2659 2673 2657 3282248 3273020 3283717 3252978 3247498 3229220 3203054 3227356
|
||||||
|
0 7850000 2671 2672 1394 2685 2687 2662 2676 2658 3284551 3275462 3285969 3257913 3252653 3234472 3206030 3230111
|
||||||
|
0 7860000 2671 2674 1394 2688 2688 2662 2677 2660 3286895 3277836 3288245 3260335 3255208 3237093 3211859 3235433
|
||||||
|
0 7870000 2672 2673 1396 2689 2690 2664 2679 2661 3291494 3282549 3290508 3262735 3257717 3239648 3214779 3238151
|
||||||
|
0 7880000 2672 2679 1397 2691 2691 2665 2679 2663 3293738 3284887 3294943 3267532 3260217 3242206 3217620 3240760
|
||||||
|
0 7890000 2674 2674 1397 2690 2693 2666 2679 2663 3295971 3287209 3297165 3269920 3265214 3247349 3223441 3243432
|
||||||
|
0 7900000 2678 2678 1397 2692 2694 2666 2684 2666 3300507 3289524 3299442 3272344 3267685 3249898 3226274 3248650
|
||||||
|
0 7910000 2679 2675 1399 2692 2695 2668 2684 2666 3302745 3294178 3303814 3274689 3270176 3252360 3229084 3251256
|
||||||
|
0 7920000 2678 2681 1398 2693 2696 2668 2685 2666 3304921 3296464 3305979 3279428 3275014 3257428 3231885 3253809
|
||||||
|
0 7930000 2680 2680 1399 2696 2699 2672 2685 2668 3307122 3298727 3308060 3281719 3277481 3259850 3237397 3258914
|
||||||
|
0 7940000 2683 2683 1401 2697 2699 2673 2688 2670 3311497 3303205 3310228 3284026 3279883 3262333 3240130 3261483
|
||||||
|
0 7950000 2682 2683 1403 2698 2699 2674 2690 2672 3313654 3305409 3314465 3288629 3282239 3264786 3242906 3263972
|
||||||
|
0 7960000 2685 2685 1398 2700 2700 2675 2689 2674 3315782 3307639 3316553 3290885 3286938 3269664 3248292 3266478
|
||||||
|
0 7970000 2721 2687 1399 2701 2702 2676 2690 2674 3320065 3309870 3318654 3293168 3289335 3272029 3250991 3271431
|
||||||
|
0 7980000 2687 2688 1400 2700 2701 2677 2692 2676 3322190 3314257 3322846 3295414 3291676 3274485 3253661 3273953
|
||||||
|
0 7990000 2689 2687 1399 2701 2704 2679 2693 2676 3324341 3316459 3324921 3299948 3296298 3276879 3256352 3276384
|
||||||
|
0 8000000 2690 2690 1401 2705 2707 2681 2693 2677 3326451 3318622 3326960 3302149 3298615 3281650 3261617 3281264
|
||||||
|
0 8010000 2690 2693 1400 2704 2708 2680 2696 2680 3330618 3322899 3328999 3304357 3300885 3283959 3264229 3283685
|
||||||
|
0 8020000 2691 2693 1402 2706 2706 2681 2696 2680 3332692 3325075 3333026 3308769 3303172 3286333 3266874 3286080
|
||||||
|
0 8030000 2692 2693 1402 2707 2710 2683 2699 2680 3334705 3327180 3335072 3310926 3307695 3291013 3272020 3288476
|
||||||
|
0 8040000 2694 2700 1401 2707 2710 2684 2700 2683 3338853 3329302 3337093 3313087 3309940 3293293 3274569 3293222
|
||||||
|
0 8050000 2696 2694 1402 2708 2711 2685 2703 2684 3340853 3333479 3341042 3315229 3312183 3295635 3277138 3295607
|
||||||
|
0 8060000 2693 2694 1400 2710 2712 2685 2701 2684 3342894 3335524 3343025 3319518 3316583 3297892 3279692 3297942
|
||||||
|
0 8070000 2696 2700 1405 2709 2712 2688 2703 2686 3344892 3337640 3344996 3321623 3318806 3302462 3284435 3302573
|
||||||
|
0 8080000 2697 2697 1403 2710 2714 2688 2705 2688 3348846 3341694 3346883 3323700 3320954 3304694 3286866 3304874
|
||||||
|
0 8090000 2698 2700 1406 2715 2713 2690 2704 2689 3350845 3343686 3350715 3327893 3323111 3306963 3289384 3307134
|
||||||
|
0 8100000 2700 2701 1404 2712 2717 2691 2707 2689 3352759 3345702 3352708 3329945 3327383 3311345 3291848 3309412
|
||||||
|
0 8110000 2703 2701 1404 2716 2718 2694 2708 2691 3356662 3347705 3354525 3331946 3329506 3313550 3296776 3313925
|
||||||
|
0 8120000 2702 2702 1408 2714 2718 2694 2709 2688 3358599 3351658 3358322 3334008 3331640 3315708 3299266 3316172
|
||||||
|
0 8130000 2703 2705 1403 2717 2718 2693 2709 2694 3360451 3353652 3360160 3338053 3335861 3317891 3301708 3318362
|
||||||
|
0 8140000 2705 2702 1405 2718 2720 2694 2708 2694 3362346 3355583 3362014 3340084 3337925 3322198 3306579 3320590
|
||||||
|
0 8150000 2706 2706 1404 2717 2722 2696 2713 2695 3366146 3359455 3363850 3342082 3339977 3324344 3308958 3324976
|
||||||
|
0 8160000 2710 2705 1407 2718 2722 2698 2712 2695 3367992 3361355 3367477 3346035 3342050 3326476 3311320 3327145
|
||||||
|
0 8170000 2707 2708 1406 2721 2724 2698 2714 2696 3369815 3363226 3369260 3347964 3346085 3330676 3313685 3329285
|
||||||
|
0 8180000 2710 2709 1408 2720 2723 2699 2715 2698 3373488 3365105 3371067 3349880 3348090 3332738 3318345 3333573
|
||||||
|
0 8190000 2711 2711 1407 2723 2724 2701 2715 2699 3375302 3368899 3374572 3351843 3350095 3334832 3320606 3335692
|
||||||
|
0 8200000 2710 2711 1406 2723 2724 2702 2715 2700 3377103 3370721 3376354 3355609 3354049 3336857 3322913 3337784
|
||||||
|
0 8210000 2711 2710 1405 2725 2726 2704 2718 2701 3378919 3372557 3378108 3357561 3355979 3340946 3327418 3339910
|
||||||
|
0 8220000 2710 2712 1406 2726 2729 2704 2719 2702 3382492 3376276 3379862 3359427 3357911 3342987 3329697 3344026
|
||||||
|
0 8230000 2716 2715 1409 2727 2728 2706 2719 2704 3384269 3378045 3383315 3363190 3359886 3345032 3331893 3346079
|
||||||
|
0 8240000 2714 2716 1406 2728 2729 2707 2721 2704 3386061 3379862 3385065 3365073 3363765 3349045 3334170 3348160
|
||||||
|
0 8250000 2716 2717 1409 2728 2731 2707 2722 2705 3387800 3381701 3386795 3366910 3365670 3351034 3338549 3352232
|
||||||
|
0 8260000 2717 2717 1409 2727 2731 2706 2724 2706 3391290 3385273 3390174 3368730 3367578 3352972 3340704 3354245
|
||||||
|
0 8270000 2717 2714 1410 2729 2732 2709 2722 2707 3393049 3387049 3391865 3372394 3371295 3354994 3342851 3356269
|
||||||
|
0 8280000 2718 2718 1408 2729 2732 2709 2723 2708 3394801 3388822 3393582 3374254 3373180 3358864 3346557 3358221
|
||||||
|
0 8290000 2719 2720 1409 2731 2734 2711 2726 2709 3398253 3390604 3395266 3375988 3375053 3360812 3348535 3362155
|
||||||
|
0 8300000 2722 2721 1412 2733 2736 2713 2726 2710 3399933 3394077 3398556 3379549 3376815 3362741 3350535 3364131
|
||||||
|
0 8310000 2721 2721 1409 2730 2735 2712 2728 2710 3401662 3395748 3400210 3381336 3380431 3366563 3352570 3366077
|
||||||
|
0 8320000 2720 2725 1413 2735 2735 2713 2728 2711 3403346 3397471 3401833 3383088 3382211 3368459 3356682 3369880
|
||||||
|
0 8330000 2721 2722 1408 2734 2737 2715 2729 2713 3406739 3400907 3405101 3384787 3384032 3370347 3358684 3371798
|
||||||
|
0 8340000 2724 2727 1410 2732 2738 2716 2730 2714 3408376 3402519 3406699 3388248 3387592 3372164 3360643 3373677
|
||||||
|
0 8350000 2724 2722 1411 2734 2738 2716 2729 2711 3410028 3404232 3408354 3390001 3389345 3375891 3364723 3375557
|
||||||
|
0 8360000 2726 2727 1410 2733 2739 2716 2733 2716 3413298 3405931 3409926 3391662 3391106 3377743 3366763 3379314
|
||||||
|
0 8370000 2728 2725 1414 2738 2742 2719 2733 2717 3414977 3409269 3413167 3395085 3392848 3379583 3368760 3381199
|
||||||
|
0 8380000 2727 2726 1412 2737 2742 2718 2733 2717 3416598 3410875 3414735 3396787 3396338 3383226 3370748 3383054
|
||||||
|
0 8390000 2729 2726 1410 2740 2743 2720 2734 2717 3418300 3412504 3416351 3398465 3398086 3385033 3374692 3386779
|
||||||
|
0 8400000 2729 2730 1413 2740 2748 2721 2737 2720 3421492 3415827 3417872 3400128 3399810 3386811 3376645 3388592
|
||||||
|
0 8410000 2729 2728 1412 2740 2743 2721 2735 2719 3423100 3417467 3421008 3403466 3403231 3388646 3378618 3390424
|
||||||
|
0 8420000 2730 2732 1414 2740 2744 2722 2737 2722 3424729 3419066 3422571 3405171 3404925 3392240 3382466 3392224
|
||||||
|
0 8430000 2731 2733 1411 2741 2744 2722 2738 2722 3427899 3420695 3424134 3406778 3406592 3393972 3384353 3395808
|
||||||
|
0 8440000 2731 2731 1414 2744 2745 2723 2738 2722 3429496 3423857 3427199 3408406 3408266 3395731 3386253 3397633
|
||||||
|
0 8450000 2733 2732 1413 2743 2746 2726 2739 2723 3431003 3425479 3428718 3411681 3411602 3399298 3388181 3399408
|
||||||
194
with_opencm3/client-term/tempout_1
Normal file
194
with_opencm3/client-term/tempout_1
Normal file
@ -0,0 +1,194 @@
|
|||||||
|
0 140000 2871 2865 1450 2873 2878 2863 2875 2861 3795520 3790538 3784596 3784886 3790084 3793686 3794314 3796070
|
||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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||||||
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0 1150000 2868 2863 1448 2875 2877 2863 2874 2859 3793148 3788141 3782172 3782325 3787550 3791199 3791852 3793568
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||||||
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0 1160000 2871 2865 1452 2874 2875 2861 2872 2860 3793204 3788226 3782131 3782310 3787607 3791252 3791888 3793556
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||||||
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0 1170000 2869 2863 1451 2873 2876 2862 2873 2858 3793168 3788134 3782159 3782342 3787634 3791269 3791891 3793592
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0 1180000 2870 2865 1450 2872 2879 2861 2873 2859 3793078 3788048 3782050 3782263 3787497 3791117 3791882 3793550
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0 1200000 2870 2867 1449 2874 2877 2862 2875 2860 3792897 3787843 3782010 3782256 3787520 3791111 3791784 3793507
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||||||
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||||||
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0 1230000 2871 2863 1452 2872 2876 2863 2874 2859 3792427 3787431 3781605 3781947 3787236 3790898 3791562 3793281
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||||||
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||||||
|
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||||||
|
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||||||
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0 1300000 2871 2863 1450 2872 2876 2862 2873 2859 3792288 3787376 3781360 3781594 3786902 3790474 3791271 3792854
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||||||
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0 1330000 2868 2865 1449 2874 2878 2862 2874 2858 3792361 3787313 3781270 3781437 3786755 3790427 3791143 3792776
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||||||
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0 1340000 2869 2864 1449 2873 2877 2863 2874 2859 3792320 3787238 3781283 3781398 3786764 3790385 3791165 3792765
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||||||
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0 1350000 2871 2861 1450 2874 2882 2862 2873 2859 3792209 3787291 3781240 3781385 3786798 3790335 3791196 3792741
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||||||
|
0 1360000 2870 2864 1449 2875 2877 2862 2873 2859 3792288 3787311 3781262 3781335 3786666 3790292 3791089 3792639
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||||||
|
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||||||
|
0 1380000 2872 2861 1449 2873 2878 2863 2874 2860 3792110 3787114 3781145 3781276 3786558 3790265 3791034 3792659
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0 1390000 2869 2861 1450 2874 2875 2862 2873 2858 3791930 3787069 3781023 3781357 3786596 3790241 3790998 3792611
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0 1400000 2869 2866 1449 2874 2878 2862 2872 2857 3792109 3787189 3781148 3781385 3786690 3790428 3791071 3792699
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0 1410000 2870 2864 1451 2874 2876 2861 2873 2859 3792438 3787636 3781209 3781426 3786702 3790446 3791054 3792743
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||||||
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0 1420000 2869 2865 1451 2873 2877 2861 2873 2858 3792693 3787866 3781656 3781751 3786816 3790533 3791197 3792818
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||||||
|
0 1430000 2870 2861 1450 2872 2876 2861 2874 2859 3792838 3788025 3781837 3781850 3787132 3790770 3791282 3792990
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||||||
|
0 1440000 2872 2863 1450 2873 2875 2862 2873 2859 3793129 3788071 3781974 3781964 3787241 3790887 3791454 3793240
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||||||
|
0 1450000 2870 2863 1449 2874 2882 2862 2874 2861 3793224 3788339 3782209 3782100 3787357 3791010 3791572 3793302
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||||||
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0 1460000 2869 2863 1450 2873 2877 2861 2872 2859 3793398 3788539 3782383 3782386 3787592 3791114 3791689 3793415
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||||||
|
0 1470000 2868 2862 1453 2874 2877 2862 2873 2859 3793579 3788752 3782560 3782544 3787768 3791348 3791980 3793575
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||||||
|
0 1480000 2870 2864 1449 2873 2878 2862 2874 2860 3793964 3789084 3782783 3782697 3787887 3791478 3792068 3793862
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||||||
|
0 1490000 2872 2865 1451 2874 2877 2861 2873 2859 3794117 3789169 3783059 3782971 3788014 3791534 3792189 3793960
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||||||
|
0 1500000 2869 2863 1448 2874 2878 2862 2875 2860 3794179 3789250 3783171 3783084 3788249 3791741 3792278 3794086
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||||||
|
0 1510000 2872 2862 1451 2872 2877 2863 2874 2859 3794296 3789382 3783264 3783205 3788371 3791888 3792502 3794247
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||||||
|
0 1520000 2870 2863 1448 2873 2879 2861 2874 2859 3794526 3789569 3783559 3783299 3788441 3791935 3792540 3794370
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||||||
|
0 1530000 2869 2864 1448 2873 2877 2862 2874 2859 3794609 3789674 3783619 3783494 3788664 3792017 3792622 3794430
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||||||
|
0 1540000 2869 2864 1451 2874 2877 2863 2875 2861 3794700 3789790 3783750 3783564 3788744 3792143 3792791 3794505
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||||||
|
0 1550000 2871 2864 1449 2873 2877 2859 2875 2861 3794993 3790002 3783887 3783632 3788834 3792232 3792805 3794642
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||||||
|
0 1560000 2871 2865 1450 2874 2878 2863 2874 2859 3795046 3790116 3784129 3783818 3788928 3792322 3792890 3794796
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||||||
|
0 1570000 2870 2863 1450 2875 2879 2864 2874 2860 3795169 3790197 3784234 3783917 3789098 3792395 3793009 3794804
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||||||
|
0 1580000 2871 2865 1451 2872 2877 2864 2874 2861 3795181 3790279 3784265 3783976 3789185 3792434 3793095 3794931
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||||||
|
0 1590000 2871 2864 1452 2874 2878 2863 2874 2860 3795447 3790567 3784517 3784062 3789252 3792517 3793185 3795013
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||||||
|
0 1600000 2870 2864 1448 2874 2877 2862 2875 2860 3795614 3790703 3784673 3784281 3789472 3792563 3793267 3795049
|
||||||
|
0 1610000 2870 2866 1449 2875 2879 2863 2875 2859 3795794 3790845 3784841 3784370 3789592 3792893 3793518 3795205
|
||||||
|
0 1620000 2870 2865 1451 2874 2878 2863 2875 2860 3796096 3791055 3784941 3784514 3789696 3792979 3793577 3795408
|
||||||
|
0 1630000 2871 2867 1451 2873 2879 2861 2874 2859 3796271 3791349 3785296 3784728 3789826 3793090 3793708 3795536
|
||||||
|
0 1640000 2869 2866 1449 2875 2879 2868 2875 2860 3796502 3791594 3785536 3784945 3790083 3793313 3793790 3795658
|
||||||
|
0 1650000 2870 2863 1450 2876 2877 2863 2874 2859 3796664 3791841 3785725 3785095 3790243 3793432 3794117 3795931
|
||||||
|
0 1660000 2873 2864 1451 2874 2879 2864 2875 2862 3796955 3792083 3785901 3785223 3790300 3793551 3794252 3796066
|
||||||
|
0 1670000 2871 2863 1450 2875 2878 2863 2874 2860 3797051 3792133 3786137 3785444 3790610 3793598 3794311 3796169
|
||||||
|
0 1680000 2872 2865 1451 2873 2880 2862 2875 2860 3797163 3792202 3786241 3785585 3790775 3793775 3794510 3796276
|
||||||
|
0 1690000 2877 2866 1448 2876 2876 2864 2876 2860 3797165 3792258 3786312 3785622 3790818 3793842 3794527 3796421
|
||||||
|
0 1700000 2872 2867 1452 2873 2879 2862 2874 2859 3797167 3792221 3786307 3785670 3790836 3793876 3794561 3796458
|
||||||
|
0 1710000 2871 2865 1451 2873 2879 2862 2876 2861 3797199 3792259 3786337 3785781 3790982 3793942 3794623 3796495
|
||||||
|
0 1720000 2872 2866 1450 2876 2879 2863 2874 2860 3797282 3792365 3786420 3785829 3790947 3793986 3794691 3796541
|
||||||
|
0 1730000 2872 2865 1455 2874 2878 2863 2876 2862 3797311 3792408 3786377 3785762 3791011 3793989 3794691 3796623
|
||||||
|
0 1740000 2872 2865 1450 2874 2879 2862 2875 2861 3797351 3792527 3786513 3785847 3791055 3793974 3794730 3796649
|
||||||
|
0 1750000 2871 2867 1450 2876 2878 2863 2875 2858 3797409 3792510 3786580 3785918 3791100 3794090 3794878 3796682
|
||||||
|
0 1760000 2872 2867 1449 2875 2877 2863 2873 2860 3797471 3792546 3786571 3785973 3791152 3794055 3794847 3796764
|
||||||
|
0 1770000 2873 2864 1450 2873 2884 2863 2874 2860 3797483 3792604 3786630 3785959 3791160 3794119 3794886 3796750
|
||||||
|
0 1780000 2870 2865 1450 2876 2879 2864 2875 2861 3797551 3792608 3786705 3786033 3791219 3794177 3794958 3796805
|
||||||
|
0 1790000 2872 2867 1450 2875 2877 2863 2875 2860 3797510 3792604 3786688 3786011 3791261 3794124 3794924 3796828
|
||||||
|
0 1800000 2873 2869 1450 2873 2878 2865 2876 2861 3797579 3792623 3786695 3786066 3791287 3794144 3794981 3796834
|
||||||
|
0 1810000 2873 2866 1452 2876 2878 2862 2876 2861 3797623 3792658 3786755 3786092 3791239 3794156 3794996 3796874
|
||||||
|
0 1820000 2871 2867 1451 2875 2878 2863 2874 2859 3797586 3792616 3786699 3786131 3791307 3794244 3795026 3796917
|
||||||
|
0 1830000 2873 2864 1450 2874 2879 2864 2875 2862 3797560 3792602 3786726 3786069 3791341 3794263 3795042 3796917
|
||||||
|
0 1840000 2872 2864 1452 2875 2880 2864 2874 2860 3797532 3792575 3786678 3786128 3791338 3794245 3795017 3796927
|
||||||
|
0 1850000 2870 2866 1449 2876 2879 2865 2875 2861 3797525 3792585 3786716 3786148 3791298 3794263 3794987 3796915
|
||||||
|
0 1860000 2873 2867 1452 2876 2878 2865 2875 2861 3797521 3792573 3786678 3786114 3791294 3794264 3795044 3796932
|
||||||
|
0 1870000 2872 2863 1450 2875 2878 2864 2876 2862 3797506 3792596 3786673 3786075 3791296 3794251 3795051 3796932
|
||||||
|
0 1880000 2872 2871 1453 2875 2878 2862 2875 2861 3797518 3792647 3786712 3786107 3791325 3794273 3795070 3796937
|
||||||
|
0 1890000 2871 2867 1450 2875 2878 2863 2875 2860 3797536 3792580 3786716 3786100 3791327 3794242 3795051 3796929
|
||||||
|
0 1900000 2872 2865 1450 2875 2879 2863 2875 2860 3797530 3792548 3786653 3786095 3791348 3794290 3795068 3796934
|
||||||
|
0 1910000 2872 2864 1451 2876 2879 2862 2873 2862 3797539 3792587 3786676 3786090 3791305 3794273 3795037 3796927
|
||||||
|
0 1920000 2872 2867 1449 2874 2880 2863 2877 2860 3797544 3792589 3786699 3786145 3791355 3794302 3795075 3796953
|
||||||
|
0 1930000 2871 2867 1450 2876 2878 2863 2875 2860 3797522 3792585 3786700 3786126 3791340 3794310 3795055 3796969
|
||||||
|
0 1940000 2872 2866 1452 2875 2877 2864 2875 2860 3797540 3792653 3786683 3786119 3791359 3794322 3795116 3796973
|
||||||
|
0 1950000 2871 2869 1451 2875 2877 2863 2874 2860 3797538 3792659 3786663 3786151 3791334 3794348 3795094 3797004
|
||||||
|
0 1960000 2876 2865 1450 2874 2878 2864 2875 2861 3797565 3792617 3786780 3786170 3791364 3794372 3795106 3796981
|
||||||
|
0 1970000 2872 2868 1448 2875 2878 2864 2874 2862 3797667 3792688 3786727 3786160 3791422 3794390 3795186 3796996
|
||||||
|
0 1980000 2872 2865 1452 2875 2879 2868 2875 2861 3797623 3792728 3786814 3786159 3791428 3794406 3795150 3797037
|
||||||
|
0 1990000 2869 2866 1448 2875 2879 2864 2876 2860 3797647 3792714 3786800 3786247 3791457 3794423 3795210 3797042
|
||||||
|
0 2000000 2872 2865 1448 2874 2878 2864 2876 2861 3797651 3792743 3786802 3786181 3791434 3794396 3795194 3797085
|
||||||
|
0 2010000 2873 2865 1449 2877 2878 2864 2875 2861 3797731 3792779 3786843 3786243 3791505 3794471 3795213 3797095
|
||||||
|
0 2020000 2871 2867 1450 2875 2877 2863 2876 2861 3797719 3792803 3786851 3786236 3791448 3794516 3795228 3797101
|
||||||
|
0 2030000 2872 2865 1450 2874 2880 2863 2876 2861 3797700 3792825 3786891 3786240 3791504 3794486 3795251 3797132
|
||||||
|
0 2040000 2871 2868 1450 2876 2878 2863 2875 2861 3797802 3792707 3786845 3786286 3791471 3794444 3795259 3797137
|
||||||
|
0 2050000 2872 2867 1452 2874 2880 2863 2875 2861 3797769 3792974 3787153 3786372 3791556 3794484 3795254 3797122
|
||||||
|
0 2060000 2870 2865 1447 2875 2880 2863 2876 2860 3797921 3793130 3786991 3786583 3791802 3794463 3795269 3797008
|
||||||
@ -22,7 +22,7 @@
|
|||||||
#include "main.h"
|
#include "main.h"
|
||||||
#include "hardware_ini.h"
|
#include "hardware_ini.h"
|
||||||
|
|
||||||
volatile uint16_t ADC_value; // ADC DMA value
|
volatile uint16_t ADC_value[8]; // ADC DMA value
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* GPIO initialisaion: clocking + ports setup
|
* GPIO initialisaion: clocking + ports setup
|
||||||
@ -31,6 +31,10 @@ void GPIO_init(){
|
|||||||
rcc_periph_clock_enable(RCC_GPIOC);
|
rcc_periph_clock_enable(RCC_GPIOC);
|
||||||
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
|
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
|
||||||
GPIO_CNF_OUTPUT_PUSHPULL, GPIO11|GPIO12); // LED + USB
|
GPIO_CNF_OUTPUT_PUSHPULL, GPIO11|GPIO12); // LED + USB
|
||||||
|
// AD7794 addr + en
|
||||||
|
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
|
||||||
|
GPIO_CNF_OUTPUT_PUSHPULL, ADC_ADDR_MASK | GPIO10); // ADDRESS: PC6..9; EN: PC10
|
||||||
|
GPIO_BSRR(GPIOC) = (ADC_ADDR_MASK | GPIO10) << 16; // clear address & disable com
|
||||||
}
|
}
|
||||||
|
|
||||||
void SysTick_init(){
|
void SysTick_init(){
|
||||||
@ -44,8 +48,10 @@ void ADC_init(){
|
|||||||
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN); // enable clocking
|
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN); // enable clocking
|
||||||
rcc_periph_clock_enable(RCC_ADC1);
|
rcc_periph_clock_enable(RCC_ADC1);
|
||||||
rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV4);
|
rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV4);
|
||||||
rcc_periph_clock_enable(RCC_GPIOB); // clocking for ADC port
|
rcc_periph_clock_enable(RCC_GPIOB | RCC_GPIOC); // clocking for ADC ports
|
||||||
gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, GPIO0); // ADC8 - PB0
|
gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, 3); // ADC8 - PB0, ADC9 -PB1
|
||||||
|
gpio_set_mode(GPIOC, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, 63); // ADC10-15: PC0-PC5
|
||||||
|
|
||||||
// Make sure the ADC doesn't run during config
|
// Make sure the ADC doesn't run during config
|
||||||
adc_off(ADC1);
|
adc_off(ADC1);
|
||||||
|
|
||||||
@ -53,10 +59,10 @@ void ADC_init(){
|
|||||||
rcc_periph_clock_enable(RCC_DMA1); // RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
rcc_periph_clock_enable(RCC_DMA1); // RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
||||||
dma_channel_reset(DMA1, DMA_CHANNEL1); //DMA_DeInit(DMA1_Channel1);
|
dma_channel_reset(DMA1, DMA_CHANNEL1); //DMA_DeInit(DMA1_Channel1);
|
||||||
dma_set_peripheral_address(DMA1, DMA_CHANNEL1, (uint32_t) &(ADC_DR(ADC1))); // DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;
|
dma_set_peripheral_address(DMA1, DMA_CHANNEL1, (uint32_t) &(ADC_DR(ADC1))); // DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;
|
||||||
dma_set_memory_address(DMA1, DMA_CHANNEL1, (uint32_t)&ADC_value); // DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ADC_value;
|
dma_set_memory_address(DMA1, DMA_CHANNEL1, (uint32_t) ADC_value); // DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ADC_value;
|
||||||
dma_set_number_of_data(DMA1, DMA_CHANNEL1, 1); // DMA_InitStructure.DMA_BufferSize = 1;
|
dma_set_number_of_data(DMA1, DMA_CHANNEL1, 8); // DMA_InitStructure.DMA_BufferSize = 1;
|
||||||
dma_set_read_from_peripheral(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
|
dma_set_read_from_peripheral(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
|
||||||
dma_disable_memory_increment_mode(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
|
dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
|
||||||
dma_disable_peripheral_increment_mode(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
dma_disable_peripheral_increment_mode(DMA1, DMA_CHANNEL1); // DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||||
dma_set_peripheral_size(DMA1, DMA_CHANNEL1, DMA_CCR_PSIZE_16BIT); // DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
|
dma_set_peripheral_size(DMA1, DMA_CHANNEL1, DMA_CCR_PSIZE_16BIT); // DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
|
||||||
dma_set_memory_size(DMA1, DMA_CHANNEL1, DMA_CCR_MSIZE_16BIT); // DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
|
dma_set_memory_size(DMA1, DMA_CHANNEL1, DMA_CCR_MSIZE_16BIT); // DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
|
||||||
@ -81,10 +87,10 @@ void ADC_init(){
|
|||||||
* First call ADC_init(), than wait a little and call this function
|
* First call ADC_init(), than wait a little and call this function
|
||||||
*/
|
*/
|
||||||
void ADC_calibrate_and_start(){
|
void ADC_calibrate_and_start(){
|
||||||
uint8_t channel_array[16];
|
uint8_t channel_array[16] = {8,9,10,11,12,13,14,15};
|
||||||
// adc_set_regular_sequence 1 channel -- 0 // ADC_InitStructure.ADC_NbrOfChannel = 1;
|
// adc_set_regular_sequence 1 channel -- 0 // ADC_InitStructure.ADC_NbrOfChannel = 1;
|
||||||
channel_array[0] = ADC_CHANNEL8;
|
channel_array[0] = ADC_CHANNEL8;
|
||||||
adc_set_regular_sequence(ADC1, 1, channel_array);
|
adc_set_regular_sequence(ADC1, 8, channel_array);
|
||||||
adc_reset_calibration(ADC1);
|
adc_reset_calibration(ADC1);
|
||||||
adc_calibration(ADC1);
|
adc_calibration(ADC1);
|
||||||
adc_start_conversion_regular(ADC1); // ADC_SoftwareStartConvCmd(ADC1, ENABLE);
|
adc_start_conversion_regular(ADC1); // ADC_SoftwareStartConvCmd(ADC1, ENABLE);
|
||||||
|
|||||||
@ -23,7 +23,10 @@
|
|||||||
#ifndef __HARDWARE_INI_H__
|
#ifndef __HARDWARE_INI_H__
|
||||||
#define __HARDWARE_INI_H__
|
#define __HARDWARE_INI_H__
|
||||||
|
|
||||||
extern volatile uint16_t ADC_value; // ADC DMA value
|
extern volatile uint16_t ADC_value[]; // ADC DMA value
|
||||||
|
|
||||||
|
#define ADC_ADDR_MASK (GPIO6|GPIO7|GPIO8|GPIO9)
|
||||||
|
#define TRD_NO 8 // number of TRD devices
|
||||||
|
|
||||||
void GPIO_init();
|
void GPIO_init();
|
||||||
void SysTick_init();
|
void SysTick_init();
|
||||||
|
|||||||
Binary file not shown.
@ -23,14 +23,109 @@
|
|||||||
#include "hardware_ini.h"
|
#include "hardware_ini.h"
|
||||||
#include "cdcacm.h"
|
#include "cdcacm.h"
|
||||||
#include "uart.h"
|
#include "uart.h"
|
||||||
|
#include "spi.h"
|
||||||
|
|
||||||
uint32_t Timer = 0; // global timer (milliseconds)
|
volatile uint32_t Timer = 0, tOVRFL = 0; // global timer (milliseconds), overflow counter
|
||||||
|
usbd_device *usbd_dev;
|
||||||
|
|
||||||
|
uint8_t ADC_monitoring = 0; // ==1 to make continuous monitoring
|
||||||
|
|
||||||
|
uint32_t ad7794_on = 0;
|
||||||
|
uint32_t ad7794_values[TRD_NO];
|
||||||
|
uint8_t doubleconv = 1; // ==0 to single conversion; 1 to double (with currents reversing)
|
||||||
|
#define ADC_direct() setup_AD7794(EXTREFIN_1 | REF_DETECTION | UNIPOLAR_CODING, IEXC_DIRECT | IEXC_1MA)
|
||||||
|
#define ADC_reverse() setup_AD7794(EXTREFIN_1 | REF_DETECTION | UNIPOLAR_CODING, IEXC_SWAPPED | IEXC_1MA)
|
||||||
|
/**
|
||||||
|
* reads next value of voltage on TRD
|
||||||
|
* function calls from anywhere
|
||||||
|
* internal counter step counts number of operation: because of very long
|
||||||
|
* work of ADC function should be called several times to measure all
|
||||||
|
*
|
||||||
|
* @param doubleconv == 1 to do double conversion (with currents reversing)
|
||||||
|
*/
|
||||||
|
void read_next_TRD(){
|
||||||
|
static uint8_t step = 0; // step of operation
|
||||||
|
static uint8_t N = 0; // number of current device
|
||||||
|
static uint32_t val0 = 0, val1 = 0; // readed values
|
||||||
|
// "default" in switch will process last step
|
||||||
|
switch (step){ // now we should do something depending on current step value
|
||||||
|
case 0: // step 0: set address
|
||||||
|
if(N == 0) AD7794_init(); // reset ADC in beginning of each set
|
||||||
|
GPIO_BSRR(GPIOC) = N << 6; // set address
|
||||||
|
GPIO_BSRR(GPIOC) = GPIO10; // enable com
|
||||||
|
N++; // and increment TRD counter
|
||||||
|
if(N == TRD_NO) N = 0;
|
||||||
|
val0 = val1 = 0;
|
||||||
|
step++;
|
||||||
|
break;
|
||||||
|
case 1: // step 1: prepare reading in 1st current direction or single reading
|
||||||
|
if(!val0){ // 1st value isn't ready yet
|
||||||
|
if(!ADC_direct()){ // error: we can't setup reading
|
||||||
|
ad7794_values[N] = 0;
|
||||||
|
ad7794_on = 0;
|
||||||
|
step++;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
val0 = AD7794_NOTRDY;
|
||||||
|
}
|
||||||
|
if(val0 == AD7794_NOTRDY){ // data not ready yet
|
||||||
|
val0 = read_AD7794(0);
|
||||||
|
if(!val0 || val0 == AD7794_NOTRDY) break; // we'll process error in next time
|
||||||
|
// All OK, prepare second reading
|
||||||
|
if(doubleconv){ // double conversion -> prepare
|
||||||
|
if(!ADC_reverse()){ // we can't setup it, but we have 1st value
|
||||||
|
val1 = val0;
|
||||||
|
}else{
|
||||||
|
val1 = read_AD7794(0); // process it later
|
||||||
|
}
|
||||||
|
}else{ // simply copy value instead of multiplying by 2
|
||||||
|
val1 = val0;
|
||||||
|
}
|
||||||
|
}else{ // val0 ready, check val1
|
||||||
|
if(doubleconv && !val1){ // error
|
||||||
|
ad7794_values[N] = 0;
|
||||||
|
ad7794_on = 0;
|
||||||
|
step++;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if(doubleconv && (val1 == AD7794_NOTRDY)){ // val1 not ready yet
|
||||||
|
val1 = read_AD7794(0);
|
||||||
|
}else{ // all OK, we can put sum of val0 & val1 into array
|
||||||
|
ad7794_values[N] = val0 + val1;
|
||||||
|
step++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default: // last step - turn off multiplexer
|
||||||
|
step = 0;
|
||||||
|
GPIO_BSRR(GPIOC) = (ADC_ADDR_MASK | GPIO10) << 16; // disable com & clear address bytes
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void AD7794_init(){
|
||||||
|
uint8_t i;
|
||||||
|
ad7794_on = 0;
|
||||||
|
i = reset_AD7794();
|
||||||
|
if(i != ADC_NO_ERROR){
|
||||||
|
if(i == ADC_ERR_NO_DEVICE){
|
||||||
|
MSG("ADC signal is absent! Check connection.\r\n");
|
||||||
|
}
|
||||||
|
}else{
|
||||||
|
if(!setup_AD7794(INTREFIN | REF_DETECTION | UNIPOLAR_CODING, IEXC_DIRECT | IEXC_1MA)
|
||||||
|
|| !AD7794_calibration(0)){
|
||||||
|
MSG("Error: can't initialize AD7794!\r\n");
|
||||||
|
}else{
|
||||||
|
ad7794_on = 1;
|
||||||
|
DBG("ADC ready\r\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
int main(){
|
int main(){
|
||||||
int i;
|
int i;
|
||||||
uint32_t Old_timer = 0;
|
uint32_t Old_timer = 0, lastTRDread = 0, lastTmon = 0;
|
||||||
|
//SPI_read_status SPI_stat;
|
||||||
|
|
||||||
usbd_device *usbd_dev;
|
|
||||||
//rcc_clock_setup_in_hsi_out_48mhz();
|
//rcc_clock_setup_in_hsi_out_48mhz();
|
||||||
// RCC clocking: 8MHz oscillator -> 72MHz system
|
// RCC clocking: 8MHz oscillator -> 72MHz system
|
||||||
rcc_clock_setup_in_hse_8mhz_out_72mhz();
|
rcc_clock_setup_in_hse_8mhz_out_72mhz();
|
||||||
@ -52,6 +147,8 @@ int main(){
|
|||||||
// SysTick is a system timer with 1mc period
|
// SysTick is a system timer with 1mc period
|
||||||
SysTick_init();
|
SysTick_init();
|
||||||
|
|
||||||
|
SPI1_init();
|
||||||
|
|
||||||
// wait a little and then turn on USB pullup
|
// wait a little and then turn on USB pullup
|
||||||
for (i = 0; i < 0x800000; i++)
|
for (i = 0; i < 0x800000; i++)
|
||||||
__asm__("nop");
|
__asm__("nop");
|
||||||
@ -60,18 +157,66 @@ int main(){
|
|||||||
|
|
||||||
while(1){
|
while(1){
|
||||||
usbd_poll(usbd_dev);
|
usbd_poll(usbd_dev);
|
||||||
if(Timer - Old_timer > 1000){ // write out time in seconds
|
if(usbdatalen){ // there's something in USB buffer
|
||||||
|
parce_incoming_buf(usbdatabuf, usbdatalen, usb_send);
|
||||||
|
usbdatalen = 0; // all data have been processed - prepare to get new portion
|
||||||
|
}
|
||||||
|
check_and_parce_UART(); // also check data in UART buffers
|
||||||
|
if(ad7794_on){
|
||||||
|
if(Timer != lastTRDread){ // run this not more than once in 1ms
|
||||||
|
lastTRDread = Timer;
|
||||||
|
read_next_TRD();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if(Timer - Old_timer > 999){ // write out time in seconds
|
||||||
Old_timer += 1000;
|
Old_timer += 1000;
|
||||||
gpio_toggle(GPIOC, GPIO12); // toggle LED
|
gpio_toggle(GPIOC, GPIO12); // toggle LED
|
||||||
|
if(!ad7794_on) AD7794_init(); // try to init ADC
|
||||||
//print_int(Timer/1000, usb_send);
|
//print_int(Timer/1000, usb_send);
|
||||||
|
}else if(Timer < Old_timer){ // Timer overflow
|
||||||
|
Old_timer = 0;
|
||||||
|
tOVRFL++; // this is an overflow counter - for workinkg in long-long time interval
|
||||||
|
}
|
||||||
|
|
||||||
|
if((Timer - lastTmon > 9999) || (Timer < lastTmon)){ // run constant monitoring of ADC values each 10 seconds
|
||||||
|
lastTmon += 10000;
|
||||||
|
if(ADC_monitoring){
|
||||||
|
print_time(lastsendfun);
|
||||||
|
lastsendfun(' ');
|
||||||
|
for(i = 0; i < 8; i++){
|
||||||
|
print_int(ADC_value[i], lastsendfun);
|
||||||
|
lastsendfun(' ');
|
||||||
|
}
|
||||||
|
print_ad_vals(lastsendfun);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* SysTick interrupt: increment global time & send data buffer through USB
|
* SysTick interrupt: increment global time & send data buffer through USB
|
||||||
*/
|
*/
|
||||||
void sys_tick_handler(){
|
void sys_tick_handler(){
|
||||||
usb_send_buffer();
|
|
||||||
Timer++;
|
Timer++;
|
||||||
|
usbd_poll(usbd_dev);
|
||||||
|
usb_send_buffer();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// pause function, delay in ms
|
||||||
|
void Delay(uint16_t _U_ time){
|
||||||
|
uint32_t waitto = Timer + time;
|
||||||
|
while(Timer < waitto);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* print current time in milliseconds: 4 bytes for ovrvlow + 4 bytes for time
|
||||||
|
* with ' ' as delimeter
|
||||||
|
*/
|
||||||
|
void print_time(sendfun s){
|
||||||
|
print_int(tOVRFL, s);
|
||||||
|
s(' ');
|
||||||
|
print_int(Timer, s);
|
||||||
|
}
|
||||||
|
|
||||||
|
// D = dlmread('file')
|
||||||
|
|||||||
@ -35,7 +35,26 @@
|
|||||||
#include <libopencm3/stm32/rcc.h>
|
#include <libopencm3/stm32/rcc.h>
|
||||||
#include <libopencm3/stm32/adc.h>
|
#include <libopencm3/stm32/adc.h>
|
||||||
#include <libopencm3/stm32/dma.h>
|
#include <libopencm3/stm32/dma.h>
|
||||||
|
#include <libopencm3/stm32/spi.h>
|
||||||
|
|
||||||
#include "user_proto.h"
|
#include "user_proto.h"
|
||||||
|
#include "AD7794.h"
|
||||||
|
|
||||||
|
#define _U_ __attribute__((__unused__))
|
||||||
|
#define U8(x) ((uint8_t) x)
|
||||||
|
#define U16(x) ((uint16_t) x)
|
||||||
|
#define U32(x) ((uint32_t) x)
|
||||||
|
|
||||||
|
extern uint32_t ad7794_values[]; // array with ADC data
|
||||||
|
extern uint8_t doubleconv; // single/double ADC conversion
|
||||||
|
extern uint32_t ad7794_on; // ==1 after AD7794 initialisation
|
||||||
|
extern uint8_t ADC_monitoring; // ==1 to make continuous monitoring
|
||||||
|
void AD7794_init();
|
||||||
|
|
||||||
|
extern volatile uint32_t Timer; // global timer (milliseconds)
|
||||||
|
void Delay(uint16_t time);
|
||||||
|
|
||||||
|
void print_time(sendfun s); // print current time in milliseconds: 4 bytes for ovrvlow + 4 bytes for time
|
||||||
|
|
||||||
#endif // __MAIN_H__
|
#endif // __MAIN_H__
|
||||||
|
|
||||||
|
|||||||
175
with_opencm3/spi.c
Normal file
175
with_opencm3/spi.c
Normal file
@ -0,0 +1,175 @@
|
|||||||
|
/*
|
||||||
|
* spi.c
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "main.h"
|
||||||
|
#include "spi.h"
|
||||||
|
|
||||||
|
// Rx/Tx buffer
|
||||||
|
volatile uint8_t SPI_TxBuffer[SPI_BUFFERSIZE];
|
||||||
|
volatile uint8_t SPI_RxBuffer[SPI_BUFFERSIZE];
|
||||||
|
#ifndef SPI_USE_DMA
|
||||||
|
volatile uint8_t SPI_RxIndex = 0; // omit first byte
|
||||||
|
volatile uint8_t SPI_TxIndex = 0;
|
||||||
|
volatile uint8_t SPI_datalen = 0;
|
||||||
|
#endif
|
||||||
|
volatile uint8_t SPI_EOT_FLAG = 1; // end of transmission flag, set by interrupt
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Configure SPI port
|
||||||
|
*/
|
||||||
|
void SPI1_init(){
|
||||||
|
rcc_periph_clock_enable(RCC_SPI1);
|
||||||
|
//rcc_periph_clock_enable(RCC_GPIOB); // PB3..5
|
||||||
|
rcc_periph_clock_enable(RCC_GPIOA); // PA5..7
|
||||||
|
// PA5 - SCK, PA6 - MISO, PA7 - MOSI
|
||||||
|
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
|
||||||
|
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO5 | GPIO7 );
|
||||||
|
gpio_set_mode(GPIOA, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO6);
|
||||||
|
|
||||||
|
spi_reset(SPI1);
|
||||||
|
/* Set up SPI in Master mode with:
|
||||||
|
* Clock baud rate: 1/128 of peripheral clock frequency
|
||||||
|
* Clock polarity: Idle High
|
||||||
|
* Clock phase: Data valid on 2nd clock pulse
|
||||||
|
* Data frame format: 8-bit
|
||||||
|
* Frame format: MSB First
|
||||||
|
*/
|
||||||
|
spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_128, SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE,
|
||||||
|
SPI_CR1_CPHA_CLK_TRANSITION_2, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST);
|
||||||
|
nvic_enable_irq(NVIC_SPI1_IRQ); // enable SPI interrupt
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
//uint32_t read_end; // read timeout
|
||||||
|
/**
|
||||||
|
* Write data to SPI1
|
||||||
|
* @param data - buffer with data
|
||||||
|
* @param len - buffer length (<= DMA_BUFFERSIZE)
|
||||||
|
* @return 0 in case of error (or 1 in case of success)
|
||||||
|
*/
|
||||||
|
uint8_t write_SPI(uint8_t *data, uint8_t len){
|
||||||
|
//DBG("Write SPI.."); //return 1;
|
||||||
|
uint8_t i;
|
||||||
|
uint32_t tend = Timer + 10; // we will wait for end of previous transmission not more than 10ms
|
||||||
|
//DBG("check\r\n");
|
||||||
|
while(!SPI_EOT_FLAG && Timer < tend); // wait for previous DMA interrupt
|
||||||
|
if(!SPI_EOT_FLAG){
|
||||||
|
//DBG("ERR!\r\n");
|
||||||
|
return 0; // error: there's no receiver???
|
||||||
|
}
|
||||||
|
if(len > SPI_BUFFERSIZE) len = SPI_BUFFERSIZE;
|
||||||
|
SPI_EOT_FLAG = 0;
|
||||||
|
//DBG("OK\r\n");
|
||||||
|
//read_end = Timer + 100; // we will wait for end of previous transmission not more than 0.1s
|
||||||
|
for(i = 0; i < len; i++)
|
||||||
|
SPI_TxBuffer[i] = data[i];
|
||||||
|
#ifdef SPI_USE_DMA
|
||||||
|
DMA_Cmd(SPIx_TX_DMA_STREAM, ENABLE);
|
||||||
|
#else // !SPI_USE_DMA
|
||||||
|
SPI_RxIndex = 0;
|
||||||
|
SPI_TxIndex = 0;
|
||||||
|
SPI_datalen = len; // set length of data to transmit
|
||||||
|
// start transmission - enable interrupts
|
||||||
|
SPI_CR2(SPI1) |= SPI_CR2_TXEIE | SPI_CR2_RXNEIE; //spi_enable_rx_buffer_not_empty_interrupt(SPI1); spi_enable_tx_buffer_empty_interrupt(SPI1);
|
||||||
|
// Enable the SPI peripheral
|
||||||
|
spi_enable(SPI1);
|
||||||
|
#endif // SPI_USE_DMA
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* read data from SPI
|
||||||
|
* @param data - buffer to which data will be copied
|
||||||
|
* @param len - length of waiting data
|
||||||
|
* @return buffer with data or NULL
|
||||||
|
*/
|
||||||
|
uint8_t *read_SPI(uint8_t *data, uint8_t len){
|
||||||
|
//DBG("read SPI.. "); //return NULL;
|
||||||
|
uint8_t i;
|
||||||
|
uint32_t tend = Timer + 100; // we will wait for end of previous transmission not more than 0.1s
|
||||||
|
//DBG("check\r\n");
|
||||||
|
while((!SPI_EOT_FLAG || len != SPI_RxIndex) && Timer < tend);
|
||||||
|
if(len != SPI_RxIndex){
|
||||||
|
//DBG("ERR\r\n");
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
//DBG("OK\r\n");
|
||||||
|
for(i = 0; i < len; i++){
|
||||||
|
data[i] = SPI_RxBuffer[i];
|
||||||
|
//print_int(SPI_RxBuffer[i], usb_send);
|
||||||
|
}
|
||||||
|
//read_end = 0; // clear timeout: it mean that now we shouldn't wait any data
|
||||||
|
return data;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Check SPI read complete
|
||||||
|
* @return reading status:
|
||||||
|
* SPI_NO_DATA - data isn't ready yet
|
||||||
|
* SPI_DATA_READY - all OK, we can read buffer
|
||||||
|
* SPI_READ_ERROR - there have been error in data receiving
|
||||||
|
*
|
||||||
|
SPI_read_status check_SPI(){
|
||||||
|
if(!read_end) return SPI_NO_DATA; // there's nothing to read
|
||||||
|
if(!SPI_EOT_FLAG){
|
||||||
|
if(Timer > read_end){// read timeout
|
||||||
|
read_end = 0;
|
||||||
|
return SPI_READ_ERROR; // timeout
|
||||||
|
}else
|
||||||
|
return SPI_NO_DATA;
|
||||||
|
}
|
||||||
|
return SPI_DATA_READY; // all OK: timeout haven't been reached yet
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
|
// SPI interrupt
|
||||||
|
void spi_isr(uint32_t spi){
|
||||||
|
// RX not empty
|
||||||
|
if(SPI_SR(spi) & SPI_SR_RXNE){
|
||||||
|
if(SPI_RxIndex < SPI_datalen){ // we haven't receive all data yet
|
||||||
|
// Receive Transaction data
|
||||||
|
SPI_RxBuffer[SPI_RxIndex++] = SPI_DR(spi);
|
||||||
|
}else{ // disable RXNE interrupt & turn off SPI
|
||||||
|
spi_disable_rx_buffer_not_empty_interrupt(spi);
|
||||||
|
spi_disable(spi);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
// TX empty
|
||||||
|
if(SPI_SR(spi) & SPI_SR_TXE){
|
||||||
|
if(SPI_TxIndex < SPI_datalen){ // buffer still not sent fully
|
||||||
|
// Send Transaction data
|
||||||
|
SPI_DR(spi) = SPI_TxBuffer[SPI_TxIndex++];
|
||||||
|
}else{ // disable TXE interrupt + set EOT flag
|
||||||
|
spi_disable_tx_buffer_empty_interrupt(spi);
|
||||||
|
SPI_EOT_FLAG = 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
SPI_SR(spi) = 0; // clear all interrupt flags
|
||||||
|
}
|
||||||
|
|
||||||
|
// interrupts for SPI1 & SPI2
|
||||||
|
void spi1_isr(){
|
||||||
|
spi_isr(SPI1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi2_isr(){
|
||||||
|
spi_isr(SPI2);
|
||||||
|
}
|
||||||
39
with_opencm3/spi.h
Normal file
39
with_opencm3/spi.h
Normal file
@ -0,0 +1,39 @@
|
|||||||
|
/*
|
||||||
|
* spi.h
|
||||||
|
*
|
||||||
|
* Copyright 2014 Edward V. Emelianov <eddy@sao.ru, edward.emelianoff@gmail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||||
|
* MA 02110-1301, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#pragma once
|
||||||
|
#ifndef __SPI_H__
|
||||||
|
#define __SPI_H__
|
||||||
|
|
||||||
|
#define SPI_BUFFERSIZE 4
|
||||||
|
|
||||||
|
typedef enum{
|
||||||
|
SPI_NO_DATA,
|
||||||
|
SPI_DATA_READY,
|
||||||
|
SPI_READ_ERROR
|
||||||
|
} SPI_read_status;
|
||||||
|
|
||||||
|
void SPI1_init();
|
||||||
|
uint8_t write_SPI(uint8_t *data, uint8_t len);
|
||||||
|
SPI_read_status check_SPI();
|
||||||
|
uint8_t *read_SPI(uint8_t *data, uint8_t len);
|
||||||
|
|
||||||
|
#endif // __SPI_H__
|
||||||
@ -29,9 +29,11 @@ typedef struct {
|
|||||||
uint8_t start; // index from where to start reading
|
uint8_t start; // index from where to start reading
|
||||||
uint8_t end; // index from where to start writing
|
uint8_t end; // index from where to start writing
|
||||||
} UART_buff;
|
} UART_buff;
|
||||||
static UART_buff TX_buffer[3]; // buffers for all three ports
|
static UART_buff TX_buffer[3]; // Tx buffers for all three ports
|
||||||
|
static UART_buff RX_buffer[3]; // Rx buffers for all three ports
|
||||||
|
|
||||||
void fill_uart_buff(uint32_t UART, uint8_t byte);
|
void fill_uart_buff(uint32_t UART, uint8_t byte);
|
||||||
|
void fill_uart_RXbuff(uint32_t UART, uint8_t byte);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Set UART speed
|
* Set UART speed
|
||||||
@ -40,6 +42,8 @@ void fill_uart_buff(uint32_t UART, uint8_t byte);
|
|||||||
void UART_setspeed(uint32_t UART, struct usb_cdc_line_coding *lc){
|
void UART_setspeed(uint32_t UART, struct usb_cdc_line_coding *lc){
|
||||||
uint32_t tmp;
|
uint32_t tmp;
|
||||||
if(!lc) lc = &linecoding; // default linecoding from cdcacm.c
|
if(!lc) lc = &linecoding; // default linecoding from cdcacm.c
|
||||||
|
if(!(lc->dwDTERate)) lc->dwDTERate = 115200;
|
||||||
|
if(!(lc->bDataBits)) lc->bDataBits = 8;
|
||||||
usart_set_baudrate(UART, lc->dwDTERate);
|
usart_set_baudrate(UART, lc->dwDTERate);
|
||||||
usart_set_databits(UART, lc->bDataBits);
|
usart_set_databits(UART, lc->bDataBits);
|
||||||
switch(lc->bCharFormat){
|
switch(lc->bCharFormat){
|
||||||
@ -128,29 +132,14 @@ void UART_init(uint32_t UART){
|
|||||||
void UART_isr(uint32_t UART){
|
void UART_isr(uint32_t UART){
|
||||||
uint8_t bufidx = 0, data;
|
uint8_t bufidx = 0, data;
|
||||||
UART_buff *curbuff;
|
UART_buff *curbuff;
|
||||||
sendfun sf = uart1_send;
|
|
||||||
// Check if we were called because of RXNE
|
// Check if we were called because of RXNE
|
||||||
if(USART_SR(UART) & USART_SR_RXNE){
|
if(USART_SR(UART) & USART_SR_RXNE){
|
||||||
// parce incoming byte
|
// parce incoming byte
|
||||||
data = usart_recv(UART);
|
data = usart_recv(UART);
|
||||||
switch(UART){
|
fill_uart_RXbuff(UART, data);
|
||||||
case USART1:
|
|
||||||
sf = uart1_send;
|
|
||||||
break;
|
|
||||||
case USART2:
|
|
||||||
sf = uart2_send;
|
|
||||||
break;
|
|
||||||
case USART3:
|
|
||||||
sf = uart3_send;
|
|
||||||
break;
|
|
||||||
default: // error - return
|
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
parce_incoming_buf((char*)&data, 1, sf);
|
// Check if we were called because of TXE -> send next byte in buffer
|
||||||
//fill_uart_buff(UART, data);
|
if((USART_CR1(UART) & USART_CR1_TXEIE) && (USART_SR(UART) & USART_SR_TXE)){
|
||||||
}
|
|
||||||
// Check if we were called because of TXE
|
|
||||||
if((USART_CR1(USART1) & USART_CR1_TXEIE) && (USART_SR(UART) & USART_SR_TXE)){
|
|
||||||
switch(UART){
|
switch(UART){
|
||||||
case USART1:
|
case USART1:
|
||||||
bufidx = 0;
|
bufidx = 0;
|
||||||
@ -179,7 +168,7 @@ void UART_isr(uint32_t UART){
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// particular
|
// particular interrupt handlers
|
||||||
void usart1_isr(){
|
void usart1_isr(){
|
||||||
UART_isr(USART1);
|
UART_isr(USART1);
|
||||||
}
|
}
|
||||||
@ -190,10 +179,13 @@ void usart3_isr(){
|
|||||||
UART_isr(USART3);
|
UART_isr(USART3);
|
||||||
}
|
}
|
||||||
|
|
||||||
// put data into buffer
|
// put byte into Tx buffer
|
||||||
void fill_uart_buff(uint32_t UART, uint8_t byte){
|
void fill_uart_buff(uint32_t UART, uint8_t byte){
|
||||||
UART_buff *curbuff;
|
UART_buff *curbuff;
|
||||||
uint8_t bufidx = 0, endidx;
|
uint8_t bufidx = 0, endidx;
|
||||||
|
if(!(USART_CR1(UART) & USART_CR1_UE)) return; // UART disabled
|
||||||
|
USART_CR1(UART) &= ~USART_CR1_TXEIE; // disable TX interrupt while buffer filling
|
||||||
|
while ((USART_SR(UART) & USART_SR_TXE) == 0); // wait until last byte send
|
||||||
switch(UART){
|
switch(UART){
|
||||||
case USART1:
|
case USART1:
|
||||||
bufidx = 0;
|
bufidx = 0;
|
||||||
@ -222,7 +214,6 @@ void fill_uart_buff(uint32_t UART, uint8_t byte){
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
// overflow: purge all data
|
// overflow: purge all data
|
||||||
USART_CR1(UART) &= ~USART_CR1_TXEIE; // disable TX interrupt - all will be done "by hands"
|
|
||||||
bufidx = curbuff->start; // refresh data index
|
bufidx = curbuff->start; // refresh data index
|
||||||
for(endidx = bufidx; endidx < UART_TX_DATA_SIZE; endidx++) // first data porion
|
for(endidx = bufidx; endidx < UART_TX_DATA_SIZE; endidx++) // first data porion
|
||||||
usart_send(UART, curbuff->buf[endidx]);
|
usart_send(UART, curbuff->buf[endidx]);
|
||||||
@ -236,6 +227,7 @@ void fill_uart_buff(uint32_t UART, uint8_t byte){
|
|||||||
// enable interrupts to send data from buffer
|
// enable interrupts to send data from buffer
|
||||||
USART_CR1(UART) |= USART_CR1_TXEIE;
|
USART_CR1(UART) |= USART_CR1_TXEIE;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* send data over UART - one function for each uart
|
* send data over UART - one function for each uart
|
||||||
* @param byte - one byte to put in UART queue
|
* @param byte - one byte to put in UART queue
|
||||||
@ -250,3 +242,59 @@ void uart3_send(uint8_t byte){
|
|||||||
fill_uart_buff(USART3, byte);
|
fill_uart_buff(USART3, byte);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Check buffers for non-empty & run parsing function
|
||||||
|
*/
|
||||||
|
void check_and_parce_UART(){
|
||||||
|
int i;
|
||||||
|
sendfun sf;
|
||||||
|
UART_buff *curbuff;
|
||||||
|
uint8_t datalen; // length of data in buffer - here we use param "end"
|
||||||
|
for(i = 0; i < 3; i++){
|
||||||
|
curbuff = &RX_buffer[i];
|
||||||
|
datalen = curbuff->end;
|
||||||
|
if(!datalen) continue; // buffer is empty
|
||||||
|
// buffer isn't empty: process data in it
|
||||||
|
switch (i){
|
||||||
|
case 0:
|
||||||
|
sf = uart1_send;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
sf = uart2_send;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
sf = uart3_send;
|
||||||
|
}
|
||||||
|
parce_incoming_buf((char*)curbuff->buf, datalen, sf); // process data
|
||||||
|
curbuff->end = 0; // and zero counter
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Fill data in RX buffer to prepare it for further work
|
||||||
|
* we don't use "start" parameter here, it's 0 always
|
||||||
|
* @param UART - device to fill buffer
|
||||||
|
* @param byte - data byte
|
||||||
|
*/
|
||||||
|
void fill_uart_RXbuff(uint32_t UART, uint8_t byte){
|
||||||
|
UART_buff *curbuff;
|
||||||
|
uint8_t bufidx;
|
||||||
|
switch(UART){
|
||||||
|
case USART1:
|
||||||
|
bufidx = 0;
|
||||||
|
break;
|
||||||
|
case USART2:
|
||||||
|
bufidx = 1;
|
||||||
|
break;
|
||||||
|
case USART3:
|
||||||
|
bufidx = 2;
|
||||||
|
break;
|
||||||
|
default: // error - return
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
curbuff = &RX_buffer[bufidx];
|
||||||
|
if(curbuff->end == UART_TX_DATA_SIZE){ // end of buffer - forget about data
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
curbuff->buf[curbuff->end++] = byte; // put byte into buffer
|
||||||
|
}
|
||||||
|
|||||||
@ -33,5 +33,7 @@ void uart1_send(uint8_t byte);
|
|||||||
void uart2_send(uint8_t byte);
|
void uart2_send(uint8_t byte);
|
||||||
void uart3_send(uint8_t byte);
|
void uart3_send(uint8_t byte);
|
||||||
|
|
||||||
|
void check_and_parce_UART();
|
||||||
|
|
||||||
|
|
||||||
#endif // __UART_H__
|
#endif // __UART_H__
|
||||||
|
|||||||
@ -26,6 +26,8 @@
|
|||||||
|
|
||||||
// integer value given by user
|
// integer value given by user
|
||||||
static volatile int32_t User_value = 0;
|
static volatile int32_t User_value = 0;
|
||||||
|
// last active send function - to post "anonymous" replies
|
||||||
|
sendfun lastsendfun = usb_send; // make it usb_send by default (to prevent suspension)
|
||||||
// flag: !=0 when user value reading ends - for character terminals
|
// flag: !=0 when user value reading ends - for character terminals
|
||||||
enum{
|
enum{
|
||||||
UVAL_START, // user start to write integer value
|
UVAL_START, // user start to write integer value
|
||||||
@ -43,9 +45,25 @@ intfun I = NULL; // function to process entered integer
|
|||||||
#define READINT() do{i += read_int(&buf[i+1], len-i-1);}while(0)
|
#define READINT() do{i += read_int(&buf[i+1], len-i-1);}while(0)
|
||||||
#define WRONG_COMMAND() do{command = '?';}while(0)
|
#define WRONG_COMMAND() do{command = '?';}while(0)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* displays all TRD values
|
||||||
|
* @param s -- current output
|
||||||
|
*/
|
||||||
|
void print_ad_vals(sendfun s){
|
||||||
|
int j;
|
||||||
|
if(ad7794_on){
|
||||||
|
for(j = 0; j < TRD_NO; j++){
|
||||||
|
print_int(ad7794_values[j], s);
|
||||||
|
s(' ');
|
||||||
|
}
|
||||||
|
newline(s);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void parce_incoming_buf(char *buf, int len, sendfun s){
|
void parce_incoming_buf(char *buf, int len, sendfun s){
|
||||||
uint8_t command;
|
uint8_t command;
|
||||||
int i = 0;
|
int i = 0, j;
|
||||||
|
lastsendfun = s;
|
||||||
if(Uval_ready == UVAL_START){ // we are in process of user's value reading
|
if(Uval_ready == UVAL_START){ // we are in process of user's value reading
|
||||||
i += read_int(buf, len);
|
i += read_int(buf, len);
|
||||||
}
|
}
|
||||||
@ -61,10 +79,19 @@ void parce_incoming_buf(char *buf, int len, sendfun s){
|
|||||||
command = buf[i];
|
command = buf[i];
|
||||||
if(!command) continue; // omit zero
|
if(!command) continue; // omit zero
|
||||||
switch (command){
|
switch (command){
|
||||||
|
case '1': // single conversion
|
||||||
|
doubleconv = 0;
|
||||||
|
break;
|
||||||
|
case '2': // double conversion
|
||||||
|
doubleconv = 1;
|
||||||
|
break;
|
||||||
case 'A': // show ADC value
|
case 'A': // show ADC value
|
||||||
//adc_start_conversion_direct(ADC1);
|
//adc_start_conversion_direct(ADC1);
|
||||||
P("\r\n ADC value: ", s);
|
P("\r\n ADC value: ", s);
|
||||||
print_int(ADC_value, s);
|
for(j = 0; j < 8; j++){
|
||||||
|
print_int(ADC_value[j], s);
|
||||||
|
P("\t", s);
|
||||||
|
}
|
||||||
newline(s);
|
newline(s);
|
||||||
break;
|
break;
|
||||||
case 'b': // turn LED off
|
case 'b': // turn LED off
|
||||||
@ -77,6 +104,9 @@ void parce_incoming_buf(char *buf, int len, sendfun s){
|
|||||||
I = process_int;
|
I = process_int;
|
||||||
READINT();
|
READINT();
|
||||||
break;
|
break;
|
||||||
|
case 'i': // init AD7794
|
||||||
|
AD7794_init();
|
||||||
|
break;
|
||||||
case '+': // user check number value & confirm it's right
|
case '+': // user check number value & confirm it's right
|
||||||
if(Uval_ready == UVAL_PRINTED) Uval_ready = UVAL_CHECKED;
|
if(Uval_ready == UVAL_PRINTED) Uval_ready = UVAL_CHECKED;
|
||||||
else WRONG_COMMAND();
|
else WRONG_COMMAND();
|
||||||
@ -85,16 +115,34 @@ void parce_incoming_buf(char *buf, int len, sendfun s){
|
|||||||
if(Uval_ready == UVAL_PRINTED) Uval_ready = UVAL_BAD;
|
if(Uval_ready == UVAL_PRINTED) Uval_ready = UVAL_BAD;
|
||||||
else WRONG_COMMAND();
|
else WRONG_COMMAND();
|
||||||
break;
|
break;
|
||||||
|
case 'g': // change gain
|
||||||
|
I = set_ADC_gain;
|
||||||
|
READINT();
|
||||||
|
break;
|
||||||
|
case 's': // read ADC val through SPI
|
||||||
|
if(!ad7794_on){
|
||||||
|
AD7794_init();
|
||||||
|
P("wait: values aren't ready yet\n", s);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
P("AD7794 values: ", s);
|
||||||
|
print_ad_vals(s);
|
||||||
|
break;
|
||||||
case 'u': // check USB connection
|
case 'u': // check USB connection
|
||||||
P("\r\nUSB ", s);
|
P("\r\nUSB ", s);
|
||||||
if(!USB_connected) P("dis", s);
|
if(!USB_connected) P("dis", s);
|
||||||
P("connected\r\n",s);
|
P("connected\r\n",s);
|
||||||
break;
|
break;
|
||||||
/*
|
case 'M': // ADC monitoring ON
|
||||||
|
ADC_monitoring = !ADC_monitoring;
|
||||||
|
break;
|
||||||
|
case 'T': // print time
|
||||||
|
print_time(s);
|
||||||
|
newline(s);
|
||||||
|
break;
|
||||||
case 'U': // test: init USART1
|
case 'U': // test: init USART1
|
||||||
UART_init(USART1);
|
UART_init(USART1);
|
||||||
break;
|
break;
|
||||||
*/
|
|
||||||
case '\n': // show newline as is
|
case '\n': // show newline as is
|
||||||
break;
|
break;
|
||||||
case '\r':
|
case '\r':
|
||||||
@ -114,9 +162,11 @@ void prnt(uint8_t *wrd, sendfun s){
|
|||||||
while(*wrd) s(*wrd++);
|
while(*wrd) s(*wrd++);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
void newline(sendfun s){
|
void newline(sendfun s){
|
||||||
P("\r\n", s);
|
P("\r\n", s);
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
// sign of readed value
|
// sign of readed value
|
||||||
int32_t sign;
|
int32_t sign;
|
||||||
@ -186,3 +236,13 @@ void process_int(int32_t v, sendfun s){
|
|||||||
print_int(v, s);
|
print_int(v, s);
|
||||||
newline(s);
|
newline(s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void set_ADC_gain(int32_t v, sendfun s){
|
||||||
|
if(ad7794_on){
|
||||||
|
P("Change gain to ", s);
|
||||||
|
print_int(v, s);
|
||||||
|
newline(s);
|
||||||
|
change_AD7794_gain(v);
|
||||||
|
AD7794_calibration(0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|||||||
@ -23,18 +23,35 @@
|
|||||||
#ifndef __USER_PROTO_H__
|
#ifndef __USER_PROTO_H__
|
||||||
#define __USER_PROTO_H__
|
#define __USER_PROTO_H__
|
||||||
|
|
||||||
typedef void (*sendfun)(uint8_t); // function to send a byte
|
#include "cdcacm.h"
|
||||||
typedef void (*intfun)(int32_t, sendfun); // function to process entered integer value at end of input
|
#include "uart.h"
|
||||||
|
|
||||||
// shorthand for prnt
|
// shorthand for prnt
|
||||||
#define P(arg, s) prnt((uint8_t*)arg, s)
|
#define P(arg, s) prnt((uint8_t*)arg, s)
|
||||||
|
// debug message - over USB
|
||||||
|
#ifdef EBUG
|
||||||
|
#define DBG(a) prnt((uint8_t*)a, usb_send)
|
||||||
|
#else
|
||||||
|
#define DBG(a)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define MSG(arg) prnt((uint8_t*)arg, lastsendfun)
|
||||||
|
|
||||||
|
typedef void (*sendfun)(uint8_t); // function to send a byte
|
||||||
|
typedef void (*intfun)(int32_t, sendfun); // function to process entered integer value at end of input
|
||||||
|
|
||||||
|
extern sendfun lastsendfun; // last active send function - to post "anonymous" replies
|
||||||
|
|
||||||
void prnt(uint8_t *wrd, sendfun s);
|
void prnt(uint8_t *wrd, sendfun s);
|
||||||
void newline(sendfun s);
|
//void newline(sendfun s);
|
||||||
|
#define newline(s) s('\n')
|
||||||
|
|
||||||
void print_int(int32_t N, sendfun s);
|
void print_int(int32_t N, sendfun s);
|
||||||
|
|
||||||
void parce_incoming_buf(char *buf, int len, sendfun s);
|
void parce_incoming_buf(char *buf, int len, sendfun s);
|
||||||
|
|
||||||
void process_int(int32_t v, sendfun s);
|
void process_int(int32_t v, sendfun s);
|
||||||
|
void set_ADC_gain(int32_t v, sendfun s);
|
||||||
|
void print_ad_vals(sendfun s);
|
||||||
|
|
||||||
#endif // __USER_PROTO_H__
|
#endif // __USER_PROTO_H__
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user