mirror of
https://github.com/eddyem/ARMsingleboard.git
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91 lines
3.4 KiB
C
91 lines
3.4 KiB
C
/*
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* This file is part of the mxl90640wPi project.
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* Copyright 2022 Edward V. Emelianov <edward.emelianoff@gmail.com>.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define REG_STATUS 0x8000
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#define REG_STATUS_OVWEN (1<<4)
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#define REG_STATUS_NEWDATA (1<<3)
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#define REG_STATUS_SPNO (1<<0)
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#define REG_STATUS_SPMASK (3<<0)
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#define REG_CONTROL 0x800D
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#define REG_CONTROL_CHESS (1<<12)
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#define REG_CONTROL_RES16 (0<<10)
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#define REG_CONTROL_RES17 (1<<10)
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#define REG_CONTROL_RES18 (2<<10)
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#define REG_CONTROL_RES19 (3<<10)
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#define REG_CONTROL_RESMASK (3<<10)
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#define REG_CONTROL_REFR_05HZ (0<<7)
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#define REG_CONTROL_REFR_1HZ (1<<7)
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#define REG_CONTROL_REFR_2HZ (2<<7)
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#define REG_CONTROL_REFR_4HZ (3<<7)
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#define REG_CONTROL_REFR_8HZ (4<<7)
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#define REG_CONTROL_REFR_16HZ (5<<7)
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#define REG_CONTROL_REFR_32HZ (6<<7)
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#define REG_CONTROL_REFR_64HZ (7<<7)
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#define REG_CONTROL_SUBP1 (1<<4)
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#define REG_CONTROL_SUBPMASK (3<<4)
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#define REG_CONTROL_SUBPSEL (1<<3)
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#define REG_CONTROL_DATAHOLD (1<<2)
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#define REG_CONTROL_SUBPEN (1<<0)
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// default value
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#define REG_CONTROL_DEFAULT (REG_CONTROL_CHESS|REG_CONTROL_RES18|REG_CONTROL_REFR_2HZ|REG_CONTROL_SUBPEN)
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// calibration data start & len
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#define REG_CALIDATA 0x2410
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#define REG_CALIDATA_LEN 816
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#define REG_APTATOCCS 0x2410
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#define REG_OSAVG 0x2411
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#define REG_OCCROW14 0x2412
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#define REG_OCCCOL14 0x2418
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#define REG_SCALEACC 0x2420
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#define REG_SENSIVITY 0x2421
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#define REG_ACCROW14 0x2422
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#define REG_ACCCOL14 0x2428
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#define REG_GAIN 0x2430
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#define REG_PTAT 0x2431
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#define REG_KVTPTAT 0x2432
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#define REG_VDD 0x2433
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#define REG_KVAVG 0x2434
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#define REG_ILCHESS 0x2435
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#define REG_KTAAVGODDCOL 0x2436
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#define REG_KTAAVGEVENCOL 0x2437
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#define REG_KTAVSCALE 0x2438
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#define REG_ALPHA 0x2439
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#define REG_CPOFF 0x243A
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#define REG_KVTACP 0x243B
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#define REG_KSTATGC 0x243C
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#define REG_KSTO12 0x243D
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#define REG_KSTO34 0x243E
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#define REG_CT34 0x243F
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#define REG_OFFAK1 0x2440
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// index of register in array (from REG_CALIDATA)
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#define CREG_IDX(addr) ((addr)-REG_CALIDATA)
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#define REG_IMAGEDATA 0x0400
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#define REG_ITAVBE 0x0700
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#define REG_ICPSP0 0x0708
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#define REG_IGAIN 0x070A
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#define REG_ITAPTAT 0x0720
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#define REG_ICPSP1 0x0728
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#define REG_IVDDPIX 0x072A
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// indeg of register in array (from REG_IMAGEDATA)
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#define IMD_IDX(addr) ((addr)-REG_IMAGEDATA)
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